mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
Merge branches 'pci/host-generic', 'pci/host-mvebu', 'pci/host-rcar', 'pci/host-tegra', 'pci/msi', 'pci/misc', 'pci/resource' and 'pci/virtualization' into next
* pci/host-generic: PCI: generic: Fix GPL v2 license string typo * pci/host-mvebu: PCI: mvebu: Fix GPL v2 license string typo * pci/host-rcar: PCI: rcar: Fix GPL v2 license string typo * pci/host-tegra: PCI: tegra: Fix GPL v2 license string typo * pci/msi: PCI/MSI: Use irq_get_msi_desc() to simplify code PCI/MSI: Remove unused list access in __pci_restore_msix_state() PCI/MSI: Retrieve first MSI IRQ from msi_desc rather than pci_dev PCI/MSI: Remove unused function msi_remove_pci_irq_vectors() PCI/MSI: Add msi_setup_entry() to clean up MSI initialization * pci/misc: PCI: Configure ASPM when enabling device x86: don't exclude low BIOS area when allocating address space for non-PCI cards PCI: Add include guard to include/linux/pci_ids.h x86, ia64: Move EFI_FB vga_default_device() initialization to pci_vga_fixup() * pci/resource: PCI: Tidy resource assignment messages PCI: Return conventional error values from pci_revert_fw_address() PCI: Cleanup control flow PCI: Support BAR sizes up to 128GB PCI: Keep original resource if we fail to expand it * pci/virtualization: powerpc/pci: Remove duplicate logic PCI: Make resetting secondary bus logic common
This commit is contained in:
Bjorn Helgaas
parent
1d0df48692
eed6542dd5
505d8655f7
68947eb175
d975cb5703
e11ece5a5e
1f6ae47ecf
64da465e98
21dd5a43d0
commit
792688fde4
17 changed files with 151 additions and 156 deletions
|
|
@ -385,4 +385,4 @@ module_platform_driver(gen_pci_driver);
|
|||
|
||||
MODULE_DESCRIPTION("Generic PCI host driver");
|
||||
MODULE_AUTHOR("Will Deacon <[email protected]>");
|
||||
MODULE_LICENSE("GPLv2");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -1094,4 +1094,4 @@ module_platform_driver(mvebu_pcie_driver);
|
|||
|
||||
MODULE_AUTHOR("Thomas Petazzoni <[email protected]>");
|
||||
MODULE_DESCRIPTION("Marvell EBU PCIe driver");
|
||||
MODULE_LICENSE("GPLv2");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -1716,4 +1716,4 @@ module_platform_driver(tegra_pcie_driver);
|
|||
|
||||
MODULE_AUTHOR("Thierry Reding <[email protected]>");
|
||||
MODULE_DESCRIPTION("NVIDIA Tegra PCIe driver");
|
||||
MODULE_LICENSE("GPLv2");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -989,4 +989,4 @@ module_platform_driver(rcar_pcie_driver);
|
|||
|
||||
MODULE_AUTHOR("Phil Edworthy <[email protected]>");
|
||||
MODULE_DESCRIPTION("Renesas R-Car PCIe driver");
|
||||
MODULE_LICENSE("GPLv2");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -235,7 +235,7 @@ static void msi_set_mask_bit(struct irq_data *data, u32 flag)
|
|||
msix_mask_irq(desc, flag);
|
||||
readl(desc->mask_base); /* Flush write to device */
|
||||
} else {
|
||||
unsigned offset = data->irq - desc->dev->irq;
|
||||
unsigned offset = data->irq - desc->irq;
|
||||
msi_mask_irq(desc, 1 << offset, flag << offset);
|
||||
}
|
||||
}
|
||||
|
|
@ -463,7 +463,6 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
|
|||
if (!dev->msix_enabled)
|
||||
return;
|
||||
BUG_ON(list_empty(&dev->msi_list));
|
||||
entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
|
||||
|
||||
/* route the table */
|
||||
pci_intx_for_msi(dev, 0);
|
||||
|
|
@ -488,7 +487,6 @@ EXPORT_SYMBOL_GPL(pci_restore_msi_state);
|
|||
static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(dev);
|
||||
struct msi_desc *entry;
|
||||
unsigned long irq;
|
||||
int retval;
|
||||
|
|
@ -497,12 +495,11 @@ static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
|
|||
if (retval)
|
||||
return retval;
|
||||
|
||||
list_for_each_entry(entry, &pdev->msi_list, list) {
|
||||
if (entry->irq == irq) {
|
||||
return sprintf(buf, "%s\n",
|
||||
entry->msi_attrib.is_msix ? "msix" : "msi");
|
||||
}
|
||||
}
|
||||
entry = irq_get_msi_desc(irq);
|
||||
if (entry)
|
||||
return sprintf(buf, "%s\n",
|
||||
entry->msi_attrib.is_msix ? "msix" : "msi");
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
|
@ -581,6 +578,38 @@ error_attrs:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
|
||||
{
|
||||
u16 control;
|
||||
struct msi_desc *entry;
|
||||
|
||||
/* MSI Entry Initialization */
|
||||
entry = alloc_msi_entry(dev);
|
||||
if (!entry)
|
||||
return NULL;
|
||||
|
||||
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
|
||||
|
||||
entry->msi_attrib.is_msix = 0;
|
||||
entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
|
||||
entry->msi_attrib.entry_nr = 0;
|
||||
entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
|
||||
entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
|
||||
entry->msi_attrib.pos = dev->msi_cap;
|
||||
entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
|
||||
|
||||
if (control & PCI_MSI_FLAGS_64BIT)
|
||||
entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
|
||||
else
|
||||
entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
|
||||
|
||||
/* Save the initial mask status */
|
||||
if (entry->msi_attrib.maskbit)
|
||||
pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
|
||||
|
||||
return entry;
|
||||
}
|
||||
|
||||
/**
|
||||
* msi_capability_init - configure device's MSI capability structure
|
||||
* @dev: pointer to the pci_dev data structure of MSI device function
|
||||
|
|
@ -596,32 +625,15 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
|
|||
{
|
||||
struct msi_desc *entry;
|
||||
int ret;
|
||||
u16 control;
|
||||
unsigned mask;
|
||||
|
||||
msi_set_enable(dev, 0); /* Disable MSI during set up */
|
||||
|
||||
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
|
||||
/* MSI Entry Initialization */
|
||||
entry = alloc_msi_entry(dev);
|
||||
entry = msi_setup_entry(dev);
|
||||
if (!entry)
|
||||
return -ENOMEM;
|
||||
|
||||
entry->msi_attrib.is_msix = 0;
|
||||
entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
|
||||
entry->msi_attrib.entry_nr = 0;
|
||||
entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
|
||||
entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
|
||||
entry->msi_attrib.pos = dev->msi_cap;
|
||||
entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
|
||||
|
||||
if (control & PCI_MSI_FLAGS_64BIT)
|
||||
entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
|
||||
else
|
||||
entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
|
||||
/* All MSIs are unmasked by default, Mask them all */
|
||||
if (entry->msi_attrib.maskbit)
|
||||
pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
|
||||
mask = msi_mask(entry->msi_attrib.multi_cap);
|
||||
msi_mask_irq(entry, mask, mask);
|
||||
|
||||
|
|
@ -999,24 +1011,6 @@ void pci_disable_msix(struct pci_dev *dev)
|
|||
}
|
||||
EXPORT_SYMBOL(pci_disable_msix);
|
||||
|
||||
/**
|
||||
* msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
|
||||
* @dev: pointer to the pci_dev data structure of MSI(X) device function
|
||||
*
|
||||
* Being called during hotplug remove, from which the device function
|
||||
* is hot-removed. All previous assigned MSI/MSI-X irqs, if
|
||||
* allocated for this device function, are reclaimed to unused state,
|
||||
* which may be used later on.
|
||||
**/
|
||||
void msi_remove_pci_irq_vectors(struct pci_dev *dev)
|
||||
{
|
||||
if (!pci_msi_enable || !dev)
|
||||
return;
|
||||
|
||||
if (dev->msi_enabled || dev->msix_enabled)
|
||||
free_msi_irqs(dev);
|
||||
}
|
||||
|
||||
void pci_no_msi(void)
|
||||
{
|
||||
pci_msi_enable = 0;
|
||||
|
|
|
|||
|
|
@ -839,12 +839,6 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
|
|||
|
||||
if (!__pci_complete_power_transition(dev, state))
|
||||
error = 0;
|
||||
/*
|
||||
* When aspm_policy is "powersave" this call ensures
|
||||
* that ASPM is configured.
|
||||
*/
|
||||
if (!error && dev->bus->self)
|
||||
pcie_aspm_powersave_config_link(dev->bus->self);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
|
@ -1195,12 +1189,18 @@ int __weak pcibios_enable_device(struct pci_dev *dev, int bars)
|
|||
static int do_pci_enable_device(struct pci_dev *dev, int bars)
|
||||
{
|
||||
int err;
|
||||
struct pci_dev *bridge;
|
||||
u16 cmd;
|
||||
u8 pin;
|
||||
|
||||
err = pci_set_power_state(dev, PCI_D0);
|
||||
if (err < 0 && err != -EIO)
|
||||
return err;
|
||||
|
||||
bridge = pci_upstream_bridge(dev);
|
||||
if (bridge)
|
||||
pcie_aspm_powersave_config_link(bridge);
|
||||
|
||||
err = pcibios_enable_device(dev, bars);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
|
@ -3193,7 +3193,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
|
||||
void pci_reset_secondary_bus(struct pci_dev *dev)
|
||||
{
|
||||
u16 ctrl;
|
||||
|
||||
|
|
@ -3219,6 +3219,11 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
|
|||
ssleep(1);
|
||||
}
|
||||
|
||||
void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
|
||||
{
|
||||
pci_reset_secondary_bus(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge.
|
||||
* @dev: Bridge device
|
||||
|
|
|
|||
|
|
@ -925,7 +925,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
|
|||
{
|
||||
struct pci_dev *dev;
|
||||
resource_size_t min_align, align, size, size0, size1;
|
||||
resource_size_t aligns[14]; /* Alignments from 1Mb to 8Gb */
|
||||
resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
|
||||
int order, max_order;
|
||||
struct resource *b_res = find_free_bus_resource(bus,
|
||||
mask | IORESOURCE_PREFETCH, type);
|
||||
|
|
|
|||
|
|
@ -166,11 +166,10 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
|
|||
{
|
||||
struct resource *root, *conflict;
|
||||
resource_size_t fw_addr, start, end;
|
||||
int ret = 0;
|
||||
|
||||
fw_addr = pcibios_retrieve_fw_addr(dev, resno);
|
||||
if (!fw_addr)
|
||||
return 1;
|
||||
return -ENOMEM;
|
||||
|
||||
start = res->start;
|
||||
end = res->end;
|
||||
|
|
@ -189,14 +188,13 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
|
|||
resno, res);
|
||||
conflict = request_resource_conflict(root, res);
|
||||
if (conflict) {
|
||||
dev_info(&dev->dev,
|
||||
"BAR %d: %pR conflicts with %s %pR\n", resno,
|
||||
res, conflict->name, conflict);
|
||||
dev_info(&dev->dev, "BAR %d: %pR conflicts with %s %pR\n",
|
||||
resno, res, conflict->name, conflict);
|
||||
res->start = start;
|
||||
res->end = end;
|
||||
ret = 1;
|
||||
return -EBUSY;
|
||||
}
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
|
||||
|
|
@ -250,10 +248,8 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
|
|||
static int _pci_assign_resource(struct pci_dev *dev, int resno,
|
||||
resource_size_t size, resource_size_t min_align)
|
||||
{
|
||||
struct resource *res = dev->resource + resno;
|
||||
struct pci_bus *bus;
|
||||
int ret;
|
||||
char *type;
|
||||
|
||||
bus = dev->bus;
|
||||
while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
|
||||
|
|
@ -262,21 +258,6 @@ static int _pci_assign_resource(struct pci_dev *dev, int resno,
|
|||
bus = bus->parent;
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
if (res->flags & IORESOURCE_MEM)
|
||||
if (res->flags & IORESOURCE_PREFETCH)
|
||||
type = "mem pref";
|
||||
else
|
||||
type = "mem";
|
||||
else if (res->flags & IORESOURCE_IO)
|
||||
type = "io";
|
||||
else
|
||||
type = "unknown";
|
||||
dev_info(&dev->dev,
|
||||
"BAR %d: can't assign %s (size %#llx)\n",
|
||||
resno, type, (unsigned long long) resource_size(res));
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -302,17 +283,24 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
|
|||
* where firmware left it. That at least has a chance of
|
||||
* working, which is better than just leaving it disabled.
|
||||
*/
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
dev_info(&dev->dev, "BAR %d: no space for %pR\n", resno, res);
|
||||
ret = pci_revert_fw_address(res, dev, resno, size);
|
||||
|
||||
if (!ret) {
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
}
|
||||
return ret;
|
||||
|
||||
if (ret < 0) {
|
||||
dev_info(&dev->dev, "BAR %d: failed to assign %pR\n", resno,
|
||||
res);
|
||||
return ret;
|
||||
}
|
||||
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_assign_resource);
|
||||
|
||||
|
|
@ -320,9 +308,11 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz
|
|||
resource_size_t min_align)
|
||||
{
|
||||
struct resource *res = dev->resource + resno;
|
||||
unsigned long flags;
|
||||
resource_size_t new_size;
|
||||
int ret;
|
||||
|
||||
flags = res->flags;
|
||||
res->flags |= IORESOURCE_UNSET;
|
||||
if (!res->parent) {
|
||||
dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR\n",
|
||||
|
|
@ -333,14 +323,21 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz
|
|||
/* already aligned with min_align */
|
||||
new_size = resource_size(res) + addsize;
|
||||
ret = _pci_assign_resource(dev, resno, new_size, min_align);
|
||||
if (!ret) {
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
if (ret) {
|
||||
res->flags = flags;
|
||||
dev_info(&dev->dev, "BAR %d: %pR (failed to expand by %#llx)\n",
|
||||
resno, res, (unsigned long long) addsize);
|
||||
return ret;
|
||||
}
|
||||
return ret;
|
||||
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: reassigned %pR (expanded by %#llx)\n",
|
||||
resno, res, (unsigned long long) addsize);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pci_enable_resources(struct pci_dev *dev, int mask)
|
||||
|
|
|
|||
Loading…
Reference in a new issue