mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-31 04:01:48 -04:00
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (82 commits) mtd: fix build error in m25p80.c mtd: Remove redundant mutex from mtd_blkdevs.c MTD: Fix wrong check register_blkdev return value Revert "mtd: cleanup Kconfig dependencies" mtd: cfi_cmdset_0002: make sector erase command variable mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY mode mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of hardcoded one block2mtd: dubious assignment P4080/mtd: Fix the freescale lbc issue with 36bit mode P4080/eLBC: Make Freescale elbc interrupt common to elbc devices mtd: phram: use KBUILD_MODNAME mtd: OneNAND: S5PC110: Fix double call suspend & resume function mtd: nand: fix MTD_MODE_RAW writes jffs2: use kmemdup mtd: sm_ftl: cosmetic, use bool when possible mtd: r852: remove useless pci powerup/down from suspend/resume routines mtd: blktrans: fix a race vs kthread_stop mtd: blktrans: kill BKL mtd: allow to unload the mtdtrans module if its block devices aren't open ... Fix up trivial whitespace-introduced conflict in drivers/mtd/mtdchar.c
This commit is contained in:
commit
79346507ad
71 changed files with 3412 additions and 1159 deletions
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@ -66,7 +66,7 @@ static DEFINE_SPINLOCK(syscon_resetreg_lock);
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* AMBA bus
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* |
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* +- CPU
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* +- NANDIF NAND Flash interface
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* +- FSMC NANDIF NAND Flash interface
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* +- SEMI Shared Memory interface
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* +- ISP Image Signal Processor (U335 only)
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* +- CDS (U335 only)
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@ -726,7 +726,7 @@ static struct clk cpu_clk = {
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};
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static struct clk nandif_clk = {
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.name = "NANDIF",
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.name = "FSMC",
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.parent = &amba_clk,
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.hw_ctrld = false,
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.reset = true,
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@ -1259,7 +1259,7 @@ static struct clk_lookup lookups[] = {
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/* Connected directly to the AMBA bus */
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DEF_LOOKUP("amba", &amba_clk),
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DEF_LOOKUP("cpu", &cpu_clk),
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DEF_LOOKUP("fsmc", &nandif_clk),
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DEF_LOOKUP("fsmc-nand", &nandif_clk),
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DEF_LOOKUP("semi", &semi_clk),
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#ifdef CONFIG_MACH_U300_BS335
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DEF_LOOKUP("isp", &isp_clk),
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@ -21,7 +21,8 @@
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#include <linux/gpio.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <mach/coh901318.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/fsmc.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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@ -30,6 +31,7 @@
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/coh901318.h>
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#include <mach/hardware.h>
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#include <mach/syscon.h>
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#include <mach/dma_channels.h>
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@ -285,6 +287,13 @@ static struct resource rtc_resources[] = {
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*/
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static struct resource fsmc_resources[] = {
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{
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.name = "nand_data",
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.start = U300_NAND_CS0_PHYS_BASE,
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.end = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fsmc_regs",
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.start = U300_NAND_IF_PHYS_BASE,
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.end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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@ -1429,11 +1438,39 @@ static struct platform_device rtc_device = {
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.resource = rtc_resources,
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};
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static struct platform_device fsmc_device = {
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.name = "nandif",
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static struct mtd_partition u300_partitions[] = {
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{
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.name = "bootrecords",
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.offset = 0,
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.size = SZ_128K,
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},
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{
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.name = "free",
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.offset = SZ_128K,
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.size = 8064 * SZ_1K,
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},
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{
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.name = "platform",
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.offset = 8192 * SZ_1K,
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.size = 253952 * SZ_1K,
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},
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};
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static struct fsmc_nand_platform_data nand_platform_data = {
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.partitions = u300_partitions,
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.nr_partitions = ARRAY_SIZE(u300_partitions),
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.options = NAND_SKIP_BBTSCAN,
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.width = FSMC_NAND_BW8,
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};
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static struct platform_device nand_device = {
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.name = "fsmc-nand",
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.id = -1,
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.num_resources = ARRAY_SIZE(fsmc_resources),
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.resource = fsmc_resources,
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.num_resources = ARRAY_SIZE(fsmc_resources),
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.dev = {
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.platform_data = &nand_platform_data,
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},
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};
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static struct platform_device ave_device = {
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@ -1465,7 +1502,7 @@ static struct platform_device *platform_devs[] __initdata = {
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&keypad_device,
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&rtc_device,
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&gpio_device,
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&fsmc_device,
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&nand_device,
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&wdog_device,
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&ave_device
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};
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@ -20,11 +20,9 @@
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/* NAND Flash CS0 */
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#define U300_NAND_CS0_PHYS_BASE 0x80000000
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#define U300_NAND_CS0_VIRT_BASE 0xff040000
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/* NFIF */
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#define U300_NAND_IF_PHYS_BASE 0x9f800000
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#define U300_NAND_IF_VIRT_BASE 0xff030000
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/* AHB Peripherals */
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#define U300_AHB_PER_PHYS_BASE 0xa0000000
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@ -30,15 +30,15 @@ struct pxa3xx_nand_cmdset {
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};
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struct pxa3xx_nand_flash {
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const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
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const struct pxa3xx_nand_cmdset *cmdset;
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uint32_t chip_id;
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unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */
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unsigned int page_size; /* Page size in bytes (PAGE_SZ) */
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unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */
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unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
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unsigned int num_blocks; /* Number of physical blocks in Flash */
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uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */
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uint32_t page_size; /* Page size in bytes (PAGE_SZ) */
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uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */
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uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */
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uint32_t num_blocks; /* Number of physical blocks in Flash */
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uint32_t chip_id;
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struct pxa3xx_nand_cmdset *cmdset; /* NAND command set */
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struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
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};
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struct pxa3xx_nand_platform_data {
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