mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
"This is the main drm pull, it has a shared branch with some alsa
crossover but everything should be acked by relevant people.
New drivers:
- ATMEL HLCDC driver
- designware HDMI core support (used in multiple SoCs).
core:
- lots more atomic modesetting work, properties and atomic ioctl
(hidden under option)
- bridge rework allows support for Samsung exynos chromebooks to
work finally.
- some more panels supported
i915:
- atomic plane update support
- DSI uses shared DSI infrastructure
- Skylake basic support is all merged now
- component framework used for i915/snd-hda interactions
- write-combine cpu memory mappings
- engine init code refactored
- full ppgtt enabled where execlists are enabled.
- cherryview rps/gpu turbo and pipe CRC support.
radeon:
- indirect draw support for evergreen/cayman
- SMC and manual fan control for SI/CI
- Displayport audio support
amdkfd:
- SDMA usermode queue support
- replace suballocator usage with more suitable one
- rework for allowing interfacing to more than radeon
nouveau:
- major renaming in prep for later splitting work
- merge arm platform driver into nouveau
- GK20A reclocking support
msm:
- conversion to atomic modesetting
- YUV support for mdp4/5
- eDP support
- hw cursor for mdp5
tegra:
- conversion to atomic modesetting
- better suspend/resume support for child devices
rcar-du:
- interlaced support
imx:
- move to using dw_hdmi shared support
- mode_fixup support
sti:
- DVO support
- HDMI infoframe support
exynos:
- refactoring and cleanup, removed lots of internal unnecessary
abstraction
- exynos7 DECON display controller support
Along with the usual bunch of fixes, cleanups etc"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (724 commits)
drm/radeon: fix voltage setup on hawaii
drm/radeon/dp: Set EDP_CONFIGURATION_SET for bridge chips if necessary
drm/radeon: only enable kv/kb dpm interrupts once v3
drm/radeon: workaround for CP HW bug on CIK
drm/radeon: Don't try to enable write-combining without PAT
drm/radeon: use 0-255 rather than 0-100 for pwm fan range
drm/i915: Clamp efficient frequency to valid range
drm/i915: Really ignore long HPD pulses on eDP
drm/exynos: Add DECON driver
drm/i915: Correct the base value while updating LP_OUTPUT_HOLD in MIPI_PORT_CTRL
drm/i915: Insert a command barrier on BLT/BSD cache flushes
drm/i915: Drop vblank wait from intel_dp_link_down
drm/exynos: fix NULL pointer reference
drm/exynos: remove exynos_plane_dpms
drm/exynos: remove mode property of exynos crtc
drm/exynos: Remove exynos_plane_dpms() call with no effect
drm/i915: Squelch overzealous uncore reset WARN_ON
drm/i915: Take runtime pm reference on hangcheck_info
drm/i915: Correct the IOSF Dev_FN field for IOSF transfers
drm/exynos: fix DMA_ATTR_NO_KERNEL_MAPPING usage
...
This commit is contained in:
commit
796e1c5571
1138 changed files with 50782 additions and 34680 deletions
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@ -239,6 +239,14 @@
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Driver supports dedicated render nodes.
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_ATOMIC</term>
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<listitem><para>
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Driver supports atomic properties. In this case the driver
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must implement appropriate obj->atomic_get_property() vfuncs
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for any modeset objects with driver specific properties.
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</para></listitem>
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</varlistentry>
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</variablelist>
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</sect3>
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<sect3>
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@ -1377,7 +1385,7 @@ int max_width, max_height;</synopsis>
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<itemizedlist>
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<listitem>
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DRM_PLANE_TYPE_PRIMARY represents a "main" plane for a CRTC. Primary
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planes are the planes operated upon by by CRTC modesetting and flipping
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planes are the planes operated upon by CRTC modesetting and flipping
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operations described in <xref linkend="drm-kms-crtcops"/>.
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</listitem>
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<listitem>
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@ -2362,6 +2370,7 @@ void intel_crt_init(struct drm_device *dev)
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</sect2>
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<sect2>
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<title>Modeset Helper Functions Reference</title>
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!Iinclude/drm/drm_crtc_helper.h
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!Edrivers/gpu/drm/drm_crtc_helper.c
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!Pdrivers/gpu/drm/drm_crtc_helper.c overview
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</sect2>
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@ -2564,8 +2573,8 @@ void intel_crt_init(struct drm_device *dev)
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<td valign="top" >Description/Restrictions</td>
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</tr>
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<tr>
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<td rowspan="25" valign="top" >DRM</td>
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<td rowspan="4" valign="top" >Generic</td>
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<td rowspan="36" valign="top" >DRM</td>
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<td rowspan="5" valign="top" >Connector</td>
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<td valign="top" >“EDID”</td>
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<td valign="top" >BLOB | IMMUTABLE</td>
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<td valign="top" >0</td>
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@ -2594,7 +2603,14 @@ void intel_crt_init(struct drm_device *dev)
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<td valign="top" >Contains tiling information for a connector.</td>
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</tr>
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<tr>
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<td rowspan="1" valign="top" >Plane</td>
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<td valign="top" >“CRTC_ID”</td>
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<td valign="top" >OBJECT</td>
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<td valign="top" >DRM_MODE_OBJECT_CRTC</td>
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<td valign="top" >Connector</td>
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<td valign="top" >CRTC that connector is attached to (atomic)</td>
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</tr>
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<tr>
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<td rowspan="11" valign="top" >Plane</td>
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<td valign="top" >“type”</td>
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<td valign="top" >ENUM | IMMUTABLE</td>
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<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
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@ -2602,6 +2618,76 @@ void intel_crt_init(struct drm_device *dev)
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<td valign="top" >Plane type</td>
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</tr>
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<tr>
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<td valign="top" >“SRC_X”</td>
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<td valign="top" >RANGE</td>
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<td valign="top" >Min=0, Max=UINT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout source x coordinate in 16.16 fixed point (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“SRC_Y”</td>
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<td valign="top" >RANGE</td>
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<td valign="top" >Min=0, Max=UINT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout source y coordinate in 16.16 fixed point (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“SRC_W”</td>
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<td valign="top" >RANGE</td>
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<td valign="top" >Min=0, Max=UINT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout source width in 16.16 fixed point (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“SRC_H”</td>
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<td valign="top" >RANGE</td>
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<td valign="top" >Min=0, Max=UINT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout source height in 16.16 fixed point (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“CRTC_X”</td>
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<td valign="top" >SIGNED_RANGE</td>
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<td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout CRTC (destination) x coordinate (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“CRTC_Y”</td>
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<td valign="top" >SIGNED_RANGE</td>
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<td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout CRTC (destination) y coordinate (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“CRTC_W”</td>
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<td valign="top" >RANGE</td>
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<td valign="top" >Min=0, Max=UINT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout CRTC (destination) width (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“CRTC_H”</td>
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<td valign="top" >RANGE</td>
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<td valign="top" >Min=0, Max=UINT_MAX</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout CRTC (destination) height (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“FB_ID”</td>
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<td valign="top" >OBJECT</td>
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<td valign="top" >DRM_MODE_OBJECT_FB</td>
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<td valign="top" >Plane</td>
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<td valign="top" >Scanout framebuffer (atomic)</td>
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</tr>
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<tr>
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<td valign="top" >“CRTC_ID”</td>
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<td valign="top" >OBJECT</td>
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<td valign="top" >DRM_MODE_OBJECT_CRTC</td>
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<td valign="top" >Plane</td>
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<td valign="top" >CRTC that plane is attached to (atomic)</td>
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</tr>
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<tr>
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<td rowspan="2" valign="top" >DVI-I</td>
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<td valign="top" >“subconnector”</td>
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<td valign="top" >ENUM</td>
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@ -3883,6 +3969,7 @@ int num_ioctls;</synopsis>
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<title>Runtime Power Management</title>
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!Pdrivers/gpu/drm/i915/intel_runtime_pm.c runtime pm
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!Idrivers/gpu/drm/i915/intel_runtime_pm.c
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!Idrivers/gpu/drm/i915/intel_uncore.c
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</sect2>
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<sect2>
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<title>Interrupt Handling</title>
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@ -3931,6 +4018,11 @@ int num_ioctls;</synopsis>
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framebuffer compression and panel self refresh.
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</para>
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</sect2>
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<sect2>
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<title>Atomic Plane Helpers</title>
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!Pdrivers/gpu/drm/i915/intel_atomic_plane.c atomic plane helpers
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!Idrivers/gpu/drm/i915/intel_atomic_plane.c
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</sect2>
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<sect2>
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<title>Output Probing</title>
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<para>
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@ -3949,6 +4041,11 @@ int num_ioctls;</synopsis>
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<title>Panel Self Refresh PSR (PSR/SRD)</title>
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!Pdrivers/gpu/drm/i915/intel_psr.c Panel Self Refresh (PSR/SRD)
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!Idrivers/gpu/drm/i915/intel_psr.c
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</sect2>
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<sect2>
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<title>Frame Buffer Compression (FBC)</title>
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!Pdrivers/gpu/drm/i915/intel_fbc.c Frame Buffer Compression (FBC)
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!Idrivers/gpu/drm/i915/intel_fbc.c
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</sect2>
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<sect2>
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<title>DPIO</title>
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@ -4052,12 +4149,33 @@ int num_ioctls;</synopsis>
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<title>Batchbuffer Parsing</title>
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!Pdrivers/gpu/drm/i915/i915_cmd_parser.c batch buffer command parser
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!Idrivers/gpu/drm/i915/i915_cmd_parser.c
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</sect2>
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<sect2>
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<title>Batchbuffer Pools</title>
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!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
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!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
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</sect2>
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<sect2>
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<title>Logical Rings, Logical Ring Contexts and Execlists</title>
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!Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and Execlists
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!Idrivers/gpu/drm/i915/intel_lrc.c
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</sect2>
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<sect2>
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<title>Global GTT views</title>
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!Pdrivers/gpu/drm/i915/i915_gem_gtt.c Global GTT views
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!Idrivers/gpu/drm/i915/i915_gem_gtt.c
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</sect2>
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<sect2>
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<title>Buffer Object Eviction</title>
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<para>
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This section documents the interface function for evicting buffer
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objects to make space available in the virtual gpu address spaces.
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Note that this is mostly orthogonal to shrinking buffer objects
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caches, which has the goal to make main memory (shared with the gpu
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through the unified memory architecture) available.
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</para>
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!Idrivers/gpu/drm/i915/i915_gem_evict.c
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</sect2>
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</sect1>
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<sect1>
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