From 798fddcadc2eb3bc62a3674d9e729a91eb615b22 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Kalikot Veetil Date: Thu, 10 Oct 2019 22:59:33 -0700 Subject: [PATCH] qcacld-3.0: Fix pm_qos update logic If the CPU latency requirement is not there, set the pm qos vote to default value. The target values of resume latency and active state latency tolerance are the minimum of the request values held in the parameter list elements. Change-Id: Ia5a68c024c08043da840490b6207803523f5a34a CRs-Fixed: 2554446 --- core/hdd/src/wlan_hdd_main.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/core/hdd/src/wlan_hdd_main.c b/core/hdd/src/wlan_hdd_main.c index 62e56ffe6dfe..76fb3b41aa92 100644 --- a/core/hdd/src/wlan_hdd_main.c +++ b/core/hdd/src/wlan_hdd_main.c @@ -8169,8 +8169,13 @@ static inline void hdd_pm_qos_update_request(struct hdd_context *hdd_ctx, cpumask_t *pm_qos_cpu_mask) { cpumask_copy(&hdd_ctx->pm_qos_req.cpus_affine, pm_qos_cpu_mask); + /* Latency value to be read from INI */ - pm_qos_update_request(&hdd_ctx->pm_qos_req, 1); + if (cpumask_empty(pm_qos_cpu_mask)) + pm_qos_update_request(&hdd_ctx->pm_qos_req, + PM_QOS_DEFAULT_VALUE); + else + pm_qos_update_request(&hdd_ctx->pm_qos_req, 1); } #ifdef CONFIG_SMP