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Merge "asoc: msm-cdc-pinctrl: Add alternate pinctrl state for DSD input"

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This commit is contained in:
qctecmdr 2020-06-05 01:54:03 -07:00 • committed by Gerrit - the friendly Code Review server
commit 7a2578cd8a
4 changed files with 94 additions and 5 deletions
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50
asoc/codecs/ep92/ep92.c
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#include <linux/init.h>
@ -40,6 +40,10 @@ static const unsigned int ep92_samp_freq_table[8] = {
32000, 44100, 48000, 88200, 96000, 176400, 192000, 768000
};
static const unsigned int ep92_dsd_freq_table[4] = {
64, 128, 256, 0
};
static bool ep92_volatile_register(struct device *dev, unsigned int reg)
{
/* do not cache register state in regmap */
@ -549,6 +553,23 @@ static void ep92_read_audio_info(struct snd_soc_component *component,
send_uevent = true;
}
old = ep92->ai.system_status_1;
ep92->ai.system_status_1 = snd_soc_read(codec,
EP92_AUDIO_INFO_SYSTEM_STATUS_1);
if (ep92->ai.system_status_1 == 0xff) {
dev_dbg(codec->dev,
"ep92 EP92_AUDIO_INFO_SYSTEM_STATUS_1 read 0xff\n");
ep92->ai.system_status_1 = old;
}
change = ep92->ai.system_status_1 ^ old;
if (change & EP92_AI_DSD_RATE_MASK) {
dev_dbg(codec->dev, "ep92 dsd rate changed to %d\n",
ep92_dsd_freq_table[(ep92->ai.system_status_1 &
EP92_AI_DSD_RATE_MASK)
>> EP92_AI_DSD_RATE_SHIFT]);
send_uevent = true;
}
old = ep92->ai.audio_status;
ep92->ai.audio_status = snd_soc_component_read32(component,
EP92_AUDIO_INFO_AUDIO_STATUS);
@ -580,7 +601,9 @@ static void ep92_read_audio_info(struct snd_soc_component *component,
}
new_mode = ep92->old_mode;
if (ep92->ai.audio_status & EP92_AI_STD_ADO_MASK) {
if (ep92->ai.audio_status & EP92_AI_DSD_ADO_MASK)
new_mode = 2; /* One bit audio */
else if (ep92->ai.audio_status & EP92_AI_STD_ADO_MASK) {
if (ep92->ai.cs[0] & EP92_AI_NPCM_MASK)
new_mode = 1; /* Compr */
else
@ -897,6 +920,27 @@ static ssize_t ep92_sysfs_rda_audio_format(struct device *dev,
return ret;
}
static ssize_t ep92_sysfs_rda_dsd_rate(struct device *dev,
struct device_attribute *attr, char *buf)
{
ssize_t ret = 0;
int val;
struct ep92_pdata *ep92 = dev_get_drvdata(dev);
if (!ep92 || !ep92->codec) {
dev_err(dev, "%s: device error\n", __func__);
return -ENODEV;
}
val = ep92_dsd_freq_table[(ep92->ai.system_status_1 &
EP92_AI_DSD_RATE_MASK) >> EP92_AI_DSD_RATE_SHIFT];
ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
dev_dbg(dev, "%s: '%d'\n", __func__, val);
return ret;
}
static ssize_t ep92_sysfs_rda_audio_rate(struct device *dev,
struct device_attribute *attr, char *buf)
{
@ -1621,6 +1665,7 @@ static DEVICE_ATTR(cec_volume, 0644, ep92_sysfs_rda_cec_volume,
static DEVICE_ATTR(runout, 0444, ep92_sysfs_rda_runout, NULL);
static DEVICE_ATTR(force_inactive, 0644, ep92_sysfs_rda_force_inactive,
ep92_sysfs_wta_force_inactive);
static DEVICE_ATTR(dsd_rate, 0444, ep92_sysfs_rda_dsd_rate, NULL);
static struct attribute *ep92_fs_attrs[] = {
&dev_attr_chipid.attr,
@ -1647,6 +1692,7 @@ static struct attribute *ep92_fs_attrs[] = {
&dev_attr_cec_volume.attr,
&dev_attr_runout.attr,
&dev_attr_force_inactive.attr,
&dev_attr_dsd_rate.attr,
NULL,
};

6
asoc/codecs/ep92/ep92.h
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#ifndef __EP92_H__
@ -175,6 +175,10 @@ static struct reg_default ep92_reg_defaults[] = {
#define EP92_AI_PREEMPH_MASK 0x38
#define EP92_AI_CH_COUNT_MASK 0x07
#define EP92_AI_CH_ALLOC_MASK 0xff
#define EP92_AI_DSD_ADO_SHIFT 4
#define EP92_AI_DSD_ADO_MASK 0x10
#define EP92_AI_DSD_RATE_SHIFT 4
#define EP92_AI_DSD_RATE_MASK 0x30
#define EP92_2CHOICE_MASK 1
#define EP92_GC_CEC_VOLUME_MIN 0

36
asoc/codecs/msm-cdc-pinctrl.c
View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#include <linux/kernel.h>
@ -21,6 +21,7 @@ struct msm_cdc_pinctrl_info {
struct pinctrl *pinctrl;
struct pinctrl_state *pinctrl_active;
struct pinctrl_state *pinctrl_sleep;
struct pinctrl_state *pinctrl_alt_active;
int gpio;
bool state;
u32 tlmm_gpio[MAX_GPIOS];
@ -104,6 +105,31 @@ int msm_cdc_pinctrl_select_sleep_state(struct device_node *np)
}
EXPORT_SYMBOL(msm_cdc_pinctrl_select_sleep_state);
/*
* msm_cdc_pinctrl_select_alt_active_state: select pinctrl alt_active state
* @np: pointer to struct device_node
*
* Returns error code for failure
*/
int msm_cdc_pinctrl_select_alt_active_state(struct device_node *np)
{
struct msm_cdc_pinctrl_info *gpio_data;
gpio_data = msm_cdc_pinctrl_get_gpiodata(np);
if (!gpio_data)
return -EINVAL;
if (!gpio_data->pinctrl_alt_active) {
pr_err("%s: pinctrl alt_active state is null\n", __func__);
return -EINVAL;
}
gpio_data->state = true;
return pinctrl_select_state(gpio_data->pinctrl,
gpio_data->pinctrl_alt_active);
}
EXPORT_SYMBOL(msm_cdc_pinctrl_select_alt_active_state);
/*
* msm_cdc_pinctrl_select_active_state: select pinctrl active state
* @np: pointer to struct device_node
@ -231,6 +257,14 @@ static int msm_cdc_pinctrl_probe(struct platform_device *pdev)
ret = PTR_ERR(gpio_data->pinctrl_sleep);
goto err_lookup_state;
}
gpio_data->pinctrl_alt_active = pinctrl_lookup_state(
gpio_data->pinctrl, "aud_alt_active");
if (IS_ERR_OR_NULL(gpio_data->pinctrl_alt_active)) {
dev_dbg(&pdev->dev, "%s: Cannot get aud_alt_active pinctrl state:%ld\n",
__func__, PTR_ERR(gpio_data->pinctrl_alt_active));
}
/* skip setting to sleep state for LPI_TLMM GPIOs */
if (!of_property_read_bool(pdev->dev.of_node, "qcom,lpi-gpios")) {
/* Set pinctrl state to aud_sleep by default */

7
include/asoc/msm-cdc-pinctrl.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#ifndef __MFD_CDC_PINCTRL_H_
@ -11,6 +11,7 @@
#if IS_ENABLED(CONFIG_MSM_CDC_PINCTRL)
extern int msm_cdc_pinctrl_select_sleep_state(struct device_node *np);
extern int msm_cdc_pinctrl_select_active_state(struct device_node *np);
extern int msm_cdc_pinctrl_select_alt_active_state(struct device_node *np);
extern int msm_cdc_pinctrl_get_state(struct device_node *np);
extern int msm_cdc_get_gpio_state(struct device_node *np);
extern int msm_cdc_pinctrl_set_wakeup_capable(struct device_node *np,
@ -27,6 +28,10 @@ int msm_cdc_pinctrl_select_active_state(struct device_node *np)
{
return 0;
}
int msm_cdc_pinctrl_select_alt_active_state(struct device_node *np)
{
return 0;
}
int msm_cdc_get_gpio_state(struct device_node *np)
{
return 0;