diff --git a/qcom/monaco-idp-v1.dtsi b/qcom/monaco-idp-v1.dtsi
index e69de29bb2d1..1147544aa013 100644
--- a/qcom/monaco-idp-v1.dtsi
+++ b/qcom/monaco-idp-v1.dtsi
@@ -0,0 +1,18 @@
+
+&sdhc_1 {
+	status = "ok";
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+
+	vdd-supply = <&L25A>;
+	qcom,vdd-voltage-level = <2950000 2950000>;
+	qcom,vdd-current-level = <0 270000>;
+
+	vdd-io-supply = <&L15A>;
+	qcom,vdd-io-always-on;
+	qcom,vdd-io-lpm-sup;
+	qcom,vdd-io-voltage-level = <1800000 1800000>;
+	qcom,vdd-io-current-level = <0 250000>;
+};
diff --git a/qcom/monaco-pinctrl.dtsi b/qcom/monaco-pinctrl.dtsi
index fc3bff370d59..a5ad5c9e3b73 100644
--- a/qcom/monaco-pinctrl.dtsi
+++ b/qcom/monaco-pinctrl.dtsi
@@ -777,56 +777,56 @@
 				};
 			};
 		};
-	};
-	/* SDC pin type */
-	sdc1_on: sdc1_on {
-		clk {
-			pins = "sdc1_clk";
-			bias-disable;
-			drive-strength = <16>;
+
+		/* SDC pin type */
+		sdc1_on: sdc1_on {
+			clk {
+				pins = "sdc1_clk";
+				bias-disable;
+				drive-strength = <16>;
+			};
+
+			cmd {
+				pins = "sdc1_cmd";
+				bias-pull-up;
+				drive-strength = <10>;
+			};
+
+			data {
+				pins = "sdc1_data";
+				bias-pull-up;
+				drive-strength = <10>;
+			};
+
+			rclk {
+				pins = "sdc1_rclk";
+				bias-pull-down;
+			};
 		};
 
-		cmd {
-			pins = "sdc1_cmd";
-			bias-pull-up;
-			drive-strength = <10>;
-		};
+		sdc1_off: sdc1_off {
+			clk {
+				pins = "sdc1_clk";
+				bias-disable;
+				drive-strength = <2>;
+			};
 
-		data {
-			pins = "sdc1_data";
-			bias-pull-up;
-			drive-strength = <10>;
-		};
+			cmd {
+				pins = "sdc1_cmd";
+				bias-pull-up;
+				drive-strength = <2>;
+			};
 
-		rclk {
-			pins = "sdc1_rclk";
-			bias-pull-down;
+			data {
+				pins = "sdc1_data";
+				bias-pull-up;
+				drive-strength = <2>;
+			};
+
+			rclk {
+				pins = "sdc1_rclk";
+				bias-pull-down;
+			};
 		};
 	};
-
-	sdc1_off: sdc1_off {
-		clk {
-			pins = "sdc1_clk";
-			bias-disable;
-			drive-strength = <2>;
-		};
-
-		cmd {
-			pins = "sdc1_cmd";
-			bias-pull-up;
-			drive-strength = <2>;
-		};
-
-		data {
-			pins = "sdc1_data";
-			bias-pull-up;
-			drive-strength = <2>;
-		};
-
-		rclk {
-			pins = "sdc1_rclk";
-			bias-pull-down;
-		};
-	};
-
 };
diff --git a/qcom/monaco-rumi.dtsi b/qcom/monaco-rumi.dtsi
index 0d2189e70578..839ffe865bc0 100644
--- a/qcom/monaco-rumi.dtsi
+++ b/qcom/monaco-rumi.dtsi
@@ -19,6 +19,10 @@
 	cap-mmc-highspeed;
 	max-frequency = <50000000>;
 
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+
 	vdd-supply = <&L25A>;
 	qcom,vdd-voltage-level = <2950000 2950000>;
 	qcom,vdd-current-level = <0 270000>;
diff --git a/qcom/monaco-standalone-idp-v1.dtsi b/qcom/monaco-standalone-idp-v1.dtsi
index e69de29bb2d1..1147544aa013 100644
--- a/qcom/monaco-standalone-idp-v1.dtsi
+++ b/qcom/monaco-standalone-idp-v1.dtsi
@@ -0,0 +1,18 @@
+
+&sdhc_1 {
+	status = "ok";
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+
+	vdd-supply = <&L25A>;
+	qcom,vdd-voltage-level = <2950000 2950000>;
+	qcom,vdd-current-level = <0 270000>;
+
+	vdd-io-supply = <&L15A>;
+	qcom,vdd-io-always-on;
+	qcom,vdd-io-lpm-sup;
+	qcom,vdd-io-voltage-level = <1800000 1800000>;
+	qcom,vdd-io-current-level = <0 250000>;
+};
diff --git a/qcom/monaco.dtsi b/qcom/monaco.dtsi
index 93697a91f5fc..87f4fb5e6894 100644
--- a/qcom/monaco.dtsi
+++ b/qcom/monaco.dtsi
@@ -1194,6 +1194,14 @@
 		/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
 		qcom,dll-hsr-list = <0x000F642E 0x0 0x01 0x2c010800 0x80040868>;
 
+		qcom,devfreq,freq-table = <50000000 200000000>;
+		qcom,scaling-lower-bus-speed-mode = "DDR52";
+
+		mmc-ddr-1_8v;
+		mmc-hs200-1_8v;
+		mmc-hs400-1_8v;
+		mmc-hs400-enhanced-strobe;
+
 		no-sd;
 		no-sdio;
 
@@ -1201,6 +1209,12 @@
 		non-removable;
 		supports-cqe;
 
+		cap-mmc-hw-reset;
+
+		/* Add dt entry for gcc hw reset */
+		resets = <&gcc GCC_SDCC1_BCR>;
+		reset-names = "core_reset";
+
 		status = "disabled";
 
 		qos0 {