From 7a5fc06936472c64b6f6bdf12b3b271e3adc2bf6 Mon Sep 17 00:00:00 2001
From: Odelu Kukatla <okukatla@qti.qualcomm.com>
Date: Thu, 27 Aug 2020 20:42:34 +0530
Subject: [PATCH] ARM: dts: msm: Enable L3 interconnect driver for Shima

Enable L3 interconnect driver so that consumers are
able to obtain their path handles properly.

Change-Id: I088da57a382840050c2c539c97b1b5dc2f5d86b3
---
 qcom/shima.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index 4af7105c1cbf..f920dc959727 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -1992,12 +1992,11 @@
 
 	epss_l3_cpu: l3_cpu@18590000 {
 		reg = <0x18590000 0x4000>;
-		compatible = "qcom,shima-epss-l3-cpu";
+		compatible = "qcom,lahaina-epss-l3-cpu";
 		#interconnect-cells = <1>;
 		clock-names = "xo", "alternate";
 		clocks = <&rpmhcc RPMH_CXO_CLK>,
 			<&gcc GCC_GPLL0>;
-		status = "disabled";
 	};
 
 	llcc_pmu: llcc-pmu@9095000 {