From 83562006560706b642f9833f9eec2372717efd33 Mon Sep 17 00:00:00 2001
From: Manu Gautam <mgautam@qti.qualcomm.com>
Date: Mon, 21 Sep 2020 17:32:41 +0530
Subject: [PATCH] ARM: dts: msm: Use PCIe_MSI for Shima

Rely on PCIe controller to use MSI interrupts.

Change-Id: I64ecb84d791c83a4710e6570eebd17454dba61d7
---
 qcom/shima-pcie.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/qcom/shima-pcie.dtsi b/qcom/shima-pcie.dtsi
index 32573d6def76..fbe74ebfb44d 100644
--- a/qcom/shima-pcie.dtsi
+++ b/qcom/shima-pcie.dtsi
@@ -33,7 +33,7 @@
 				0 0 0 3 &intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH
 				0 0 0 4 &intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 
-		msi-parent = <&pcie0_msi>;
+		msi-parent = <&pcie0_msi_snps>;
 
 		perst-gpio = <&tlmm 94 0>;
 		wake-gpio = <&tlmm 96 0>;
@@ -194,6 +194,15 @@
 		};
 	};
 
+	pcie0_msi_snps: qcom,pcie0_msi@a0000000 {
+		compatible = "qcom,pci-msi";
+		msi-controller;
+		reg = <0xa0000000 0x0>;
+		interrupt-parent = <&intc>;
+		interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+		qcom,snps;
+	};
+
 	pcie0_msi: qcom,pcie0_msi@17a10040 {
 		compatible = "qcom,pci-msi";
 		msi-controller;