mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-linus-1
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6: (9356 commits) [media] rc: update for bitop name changes fs: simplify iget & friends fs: pull inode->i_lock up out of writeback_single_inode fs: rename inode_lock to inode_hash_lock fs: move i_wb_list out from under inode_lock fs: move i_sb_list out from under inode_lock fs: remove inode_lock from iput_final and prune_icache fs: Lock the inode LRU list separately fs: factor inode disposal fs: protect inode->i_state with inode->i_lock lib, arch: add filter argument to show_mem and fix private implementations SLUB: Write to per cpu data when allocating it slub: Fix debugobjects with lockless fastpath autofs4: Do not potentially dereference NULL pointer returned by fget() in autofs_dev_ioctl_setpipefd() autofs4 - remove autofs4_lock autofs4 - fix d_manage() return on rcu-walk autofs4 - fix autofs4_expire_indirect() traversal autofs4 - fix dentry leak in autofs4_expire_direct() autofs4 - reinstate last used update on access vfs - check non-mountpoint dentry might block in __follow_mount_rcu() ... NOTE! This merge commit was created to fix compilation error. The block tree was merged upstream and removed the 'elv_queue_empty()' function which the new 'mtdswap' driver is using. So a simple merge of the mtd tree with upstream does not compile. And the mtd tree has already be published, so re-basing it is not an option. To fix this unfortunate situation, I had to merge upstream into the mtd-2.6.git tree without committing, put the fixup patch on top of this, and then commit this. The result is that we do not have commits which do not compile. In other words, this merge commit "merges" 3 things: the MTD tree, the upstream tree, and the fixup patch.
This commit is contained in:
Artem Bityutskiy
commit
7bf7e370d5
8541 changed files with 572189 additions and 268560 deletions
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@ -56,6 +56,7 @@ config CRIS
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select HAVE_IDE
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select HAVE_GENERIC_HARDIRQS
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select GENERIC_HARDIRQS_NO_DEPRECATED
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select GENERIC_IRQ_SHOW
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config HZ
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int
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@ -199,7 +199,7 @@ init_IRQ(void)
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/* Initialize IRQ handler descriptors. */
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for(i = 2; i < NR_IRQS; i++) {
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set_irq_desc_and_handler(i, &crisv10_irq_type,
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irq_set_chip_and_handler(i, &crisv10_irq_type,
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handle_simple_irq);
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set_int_vector(i, interrupt[i]);
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}
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@ -140,7 +140,7 @@ stop_watchdog(void)
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "do_timer()" routine every clocktick
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* as well as call the "xtime_update()" routine every clocktick
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*/
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//static unsigned short myjiff; /* used by our debug routine print_timestamp */
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@ -176,7 +176,7 @@ timer_interrupt(int irq, void *dev_id)
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/* call the real timer interrupt handler */
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do_timer(1);
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xtime_update(1);
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cris_do_profile(regs); /* Save profiling information */
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return IRQ_HANDLED;
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@ -241,7 +241,7 @@ flush_etrax_cacherange(void *startadr, int length)
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}
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/* Due to a bug in Etrax100(LX) all versions, receiving DMA buffers
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* will occationally corrupt certain CPU writes if the DMA buffers
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* will occasionally corrupt certain CPU writes if the DMA buffers
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* happen to be hot in the cache.
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*
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* As a workaround, we have to flush the relevant parts of the cache
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@ -451,16 +451,16 @@ init_IRQ(void)
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/* Point all IRQ's to bad handlers. */
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for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
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set_irq_chip_and_handler(j, &crisv32_irq_type,
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irq_set_chip_and_handler(j, &crisv32_irq_type,
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handle_simple_irq);
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set_exception_vector(i, interrupt[j]);
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}
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/* Mark Timer and IPI IRQs as CPU local */
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/* Mark Timer and IPI IRQs as CPU local */
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irq_allocations[TIMER0_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
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irq_desc[TIMER0_INTR_VECT].status |= IRQ_PER_CPU;
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irq_set_status_flags(TIMER0_INTR_VECT, IRQ_PER_CPU);
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irq_allocations[IPI_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
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irq_desc[IPI_INTR_VECT].status |= IRQ_PER_CPU;
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irq_set_status_flags(IPI_INTR_VECT, IRQ_PER_CPU);
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set_exception_vector(0x00, nmi_interrupt);
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set_exception_vector(0x30, multiple_interrupt);
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@ -26,7 +26,9 @@
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#define FLUSH_ALL (void*)0xffffffff
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/* Vector of locks used for various atomic operations */
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spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
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spinlock_t cris_atomic_locks[] = {
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[0 ... LOCK_COUNT - 1] = __SPIN_LOCK_UNLOCKED(cris_atomic_locks)
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};
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/* CPU masks */
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cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
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@ -183,7 +183,7 @@ void handle_watchdog_bite(struct pt_regs *regs)
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "do_timer()" routine every clocktick.
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* as well as call the "xtime_update()" routine every clocktick.
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*/
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extern void cris_do_profile(struct pt_regs *regs);
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@ -216,9 +216,7 @@ static inline irqreturn_t timer_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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/* Call the real timer interrupt handler */
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write_seqlock(&xtime_lock);
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do_timer(1);
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write_sequnlock(&xtime_lock);
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xtime_update(1);
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return IRQ_HANDLED;
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}
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@ -154,12 +154,11 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/lock.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#include <asm-generic/bitops/le.h>
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#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
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#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
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#include <asm-generic/bitops/minix.h>
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#include <asm-generic/bitops/sched.h>
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#endif /* __KERNEL__ */
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@ -68,7 +68,7 @@ struct thread_info {
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#define init_thread_info (init_thread_union.thread_info)
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/* thread information allocation */
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#define alloc_thread_info(tsk) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
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#define alloc_thread_info(tsk, node) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
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#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
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#endif /* !__ASSEMBLY__ */
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@ -16,15 +16,6 @@ typedef unsigned short umode_t;
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#define BITS_PER_LONG 32
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#ifndef __ASSEMBLY__
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/* Dma addresses are 32-bits wide, just like our other addresses. */
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typedef u32 dma_addr_t;
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typedef u32 dma64_addr_t;
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif
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@ -37,45 +37,6 @@
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#include <asm/io.h>
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%d ",j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
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action = irq_desc[i].action;
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if (!action)
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goto skip;
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seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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#endif
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seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
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seq_printf(p, " %s", action->name);
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for (action=action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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}
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return 0;
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}
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/* called by the assembler IRQ entry functions defined in irq.h
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* to dispatch the interrupts to registered handlers
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* interrupts are disabled upon entry - depending on if the
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@ -72,11 +72,6 @@ SECTIONS
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INIT_TEXT_SECTION(PAGE_SIZE)
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.init.data : { INIT_DATA }
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.init.setup : { INIT_SETUP(16) }
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#ifdef CONFIG_ETRAX_ARCH_V32
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__start___param = .;
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__param : { *(__param) }
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__stop___param = .;
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#endif
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.initcall.init : {
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INIT_CALLS
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}
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@ -107,7 +102,7 @@ SECTIONS
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#endif
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__vmlinux_end = .; /* Last address of the physical file. */
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#ifdef CONFIG_ETRAX_ARCH_V32
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PERCPU(PAGE_SIZE)
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PERCPU(32, PAGE_SIZE)
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.init.ramfs : {
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INIT_RAM_FS
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