From 7c64e606aebae1e28a1412f453e9c23c6fd214ac Mon Sep 17 00:00:00 2001 From: Adam Brickman Date: Tue, 25 Sep 2018 16:36:56 -0500 Subject: [PATCH] ASoC: cs35l41: Use same frame sync for ASP RX/TX Distortion can occur if the RX and TX paths do not use the same frame sync signal. This forces the FS1 and FS2 signals to use the same frame sync signal and also ensures common sample rates between the RX and TX paths. SQA-1135 Mot-Crs-fixed:(CR) Change-Id: Id7f1dbbcca6247f0ad22b631fc6d499fc7e9827b Signed-off-by: Adam Brickman Reviewed-on: https://gerrit.mot.com/1253047 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Guobin Zhang Submit-Approved: Jira Key Reviewed-on: https://gerrit.mot.com/1253077 Reviewed-by: Rav(CR) Vembu Reviewed-by: Yuesheng Huang --- sound/soc/codecs/cs35l41.c | 4 ++++ sound/soc/codecs/cs35l41.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c index 0e5883771fdb..da03c2dfca52 100644 --- a/sound/soc/codecs/cs35l41.c +++ b/sound/soc/codecs/cs35l41.c @@ -1735,6 +1735,7 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = { {0x00000040, 0x00005555}, {0x00000040, 0x0000AAAA}, {0x00003854, 0x05180240}, + {CS35L41_VIMON_SPKMON_RESYNC, 0x00000000}, {CS35L41_OTP_TRIM_30, 0x9091A1C8}, {0x00003014, 0x0200EE0E}, {CS35L41_BSTCVRT_DCM_CTRL, 0x00000051}, @@ -1743,6 +1744,7 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = { {CS35L41_IRQ2_DB3, 0x00000000}, {CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000}, {CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000}, + {CS35L41_ASP_CONTROL4, 0x00000000}, {0x00000040, 0x0000CCCC}, {0x00000040, 0x00003333}, }; @@ -1750,9 +1752,11 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = { static const struct reg_sequence cs35l41_revb0_errata_patch[] = { {0x00000040, 0x00005555}, {0x00000040, 0x0000AAAA}, + {CS35L41_VIMON_SPKMON_RESYNC, 0x00000000}, {CS35L41_BSTCVRT_DCM_CTRL, 0x00000051}, {CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000}, {CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000}, + {CS35L41_ASP_CONTROL4, 0x00000000}, {0x00000040, 0x0000CCCC}, {0x00000040, 0x00003333}, }; diff --git a/sound/soc/codecs/cs35l41.h b/sound/soc/codecs/cs35l41.h index 9a75eae48de0..1dc2242f6510 100644 --- a/sound/soc/codecs/cs35l41.h +++ b/sound/soc/codecs/cs35l41.h @@ -71,6 +71,7 @@ #define CS35L41_BSTCVRT_DCM_MODE_FORCE 0x00003820 #define CS35L41_BSTCVRT_OVERVOLT_CTRL 0x00003830 #define CS35L41_VI_VOL_POL 0x00004000 +#define CS35L41_VIMON_SPKMON_RESYNC 0x00004100 #define CS35L41_DTEMP_WARN_THLD 0x00004220 #define CS35L41_DTEMP_CFG 0x00004224 #define CS35L41_DTEMP_EN 0x00004308 @@ -83,6 +84,7 @@ #define CS35L41_SP_FRAME_RX_SLOT 0x00004820 #define CS35L41_SP_TX_WL 0x00004830 #define CS35L41_SP_RX_WL 0x00004840 +#define CS35L41_ASP_CONTROL4 0x00004854 #define CS35L41_DAC_PCM1_SRC 0x00004C00 #define CS35L41_ASP_TX1_SRC 0x00004C20 #define CS35L41_ASP_TX2_SRC 0x00004C24