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ARM: dts: msm: Add I2C NFC device node and LDO voting for yupik

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Device node changes required on yupik describing the GPIO
configuration for Nfc controller chip.

Modified corresponding Nfc device node for ATP, MTP & QRD
platforms.

Add device node properties to support NFC LDO voting.

Change-Id: Ic41b05505db6970be002578255c21242f75fdbc4
This commit is contained in:
Tapas Dey 2021-01-07 15:23:25 +05:30
commit 7ca19cba08
4 changed files with 132 additions and 0 deletions
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24
qcom/yupik-atp.dtsi
View file

@ -23,6 +23,30 @@
};
};
&qupv3_se9_i2c {
status = "ok"
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 41 0x00>;
qcom,sn-ven = <&tlmm 38 0x00>;
qcom,sn-firm = <&tlmm 40 0x00>;
qcom,sn-clkreq = <&tlmm 39 0x00>;
qcom,sn-vdd-1p8-supply = <&L18B>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <41 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&pmk8350_vadc {
pm8350b_ref_gnd {
reg = <PM8350B_ADC7_REF_GND>;

24
qcom/yupik-idp.dtsi
View file

@ -24,6 +24,30 @@
};
};
&qupv3_se9_i2c {
status = "ok"
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 41 0x00>;
qcom,sn-ven = <&tlmm 38 0x00>;
qcom,sn-firm = <&tlmm 40 0x00>;
qcom,sn-clkreq = <&tlmm 39 0x00>;
qcom,sn-vdd-1p8-supply = <&L18B>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <41 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&pmk8350_vadc {
pm7325b_ref_gnd {
reg = <PM7325B_ADC7_REF_GND>;

60
qcom/yupik-pinctrl.dtsi
View file

@ -670,6 +670,66 @@
};
};
nfc {
nfc_int_active: nfc_int_active {
/* active state */
mux {
/* GPIO 41: NFC Read Interrupt */
pins = "gpio41";
function = "gpio";
};
config {
pins = "gpio41";
drive-strength = <2>; /* 2 MA */
bias-pull-down;
};
};
nfc_int_suspend: nfc_int_suspend {
/* sleep state */
mux {
/* GPIO 41: NFC Read Interrupt */
pins = "gpio41";
function = "gpio";
};
config {
pins = "gpio41";
drive-strength = <2>; /* 2 MA */
bias-pull-down;
};
};
nfc_enable_active: nfc_enable_active {
mux {
/* 38: Enable, 40: Firmware, 39: CLOCK */
pins = "gpio38", "gpio40", "gpio39";
function = "gpio";
};
config {
pins = "gpio38", "gpio40", "gpio39";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
nfc_enable_suspend: nfc_enable_suspend {
mux {
/* 38: Enable, 40: Firmware, 39: CLOCK */
pins = "gpio38", "gpio40", "gpio39";
function = "gpio";
};
config {
pins = "gpio38", "gpio40", "gpio39";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
};
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
qupv3_se9_spi_active: qupv3_se9_spi_active {
mux {

24
qcom/yupik-qrd.dtsi
View file

@ -25,6 +25,30 @@
};
};
&qupv3_se9_i2c {
status = "ok"
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 41 0x00>;
qcom,sn-ven = <&tlmm 38 0x00>;
qcom,sn-firm = <&tlmm 40 0x00>;
qcom,sn-clkreq = <&tlmm 39 0x00>;
qcom,sn-vdd-1p8-supply = <&L18B>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <41 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&pmk8350_vadc {
pm8350b_ref_gnd {
reg = <PM8350B_ADC7_REF_GND>;