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Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: PCI: fix 4x section mismatch warnings PCI: fix section mismatch warnings referring to pci_do_scan_bus pci: pci_enable_device_bars() fix for lpfc driver Revert "PCI: PCIE ASPM support"
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commit
7cf7669143
14 changed files with 28 additions and 920 deletions
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@ -1,44 +0,0 @@
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/*
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* aspm.h
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*
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* PCI Express ASPM defines and function prototypes
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*
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* Copyright (C) 2007 Intel Corp.
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* Zhang Yanmin (yanmin.zhang@intel.com)
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* Shaohua Li (shaohua.li@intel.com)
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*
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* For more information, please consult the following manuals (look at
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* http://www.pcisig.com/ for how to get them):
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*
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* PCI Express Specification
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*/
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#ifndef LINUX_ASPM_H
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#define LINUX_ASPM_H
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#include <linux/pci.h>
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#define PCIE_LINK_STATE_L0S 1
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#define PCIE_LINK_STATE_L1 2
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#define PCIE_LINK_STATE_CLKPM 4
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#ifdef CONFIG_PCIEASPM
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extern void pcie_aspm_init_link_state(struct pci_dev *pdev);
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extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
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extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
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extern void pci_disable_link_state(struct pci_dev *pdev, int state);
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#else
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#define pcie_aspm_init_link_state(pdev) do {} while (0)
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#define pcie_aspm_exit_link_state(pdev) do {} while (0)
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#define pcie_aspm_pm_state_change(pdev) do {} while (0)
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#define pci_disable_link_state(pdev, state) do {} while (0)
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#endif
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#ifdef CONFIG_PCIEASPM_DEBUG /* this depends on CONFIG_PCIEASPM */
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extern void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev);
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extern void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev);
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#else
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#define pcie_aspm_create_sysfs_dev_files(pdev) do {} while (0)
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#define pcie_aspm_remove_sysfs_dev_files(pdev) do {} while (0)
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#endif
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#endif /* LINUX_ASPM_H */
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@ -128,7 +128,6 @@ struct pci_cap_saved_state {
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u32 data[0];
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};
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struct pcie_link_state;
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/*
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* The pci_dev structure is used to describe PCI devices.
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*/
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@ -164,10 +163,6 @@ struct pci_dev {
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this is D0-D3, D0 being fully functional,
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and D3 being off. */
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#ifdef CONFIG_PCIEASPM
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struct pcie_link_state *link_state; /* ASPM link state. */
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#endif
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pci_channel_state_t error_state; /* current connectivity state */
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struct device dev; /* Generic device interface */
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@ -395,17 +395,9 @@
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#define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */
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#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */
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#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
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#define PCI_EXP_LNKCAP_ASPMS 0xc00 /* ASPM Support */
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#define PCI_EXP_LNKCAP_L0SEL 0x7000 /* L0s Exit Latency */
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#define PCI_EXP_LNKCAP_L1EL 0x38000 /* L1 Exit Latency */
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#define PCI_EXP_LNKCAP_CLKPM 0x40000 /* L1 Clock Power Management */
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#define PCI_EXP_LNKCTL 16 /* Link Control */
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#define PCI_EXP_LNKCTL_RL 0x20 /* Retrain Link */
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#define PCI_EXP_LNKCTL_CCC 0x40 /* Common Clock COnfiguration */
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#define PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */
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#define PCI_EXP_LNKSTA 18 /* Link Status */
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#define PCI_EXP_LNKSTA_LT 0x800 /* Link Training */
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#define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */
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#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
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#define PCI_EXP_SLTCTL 24 /* Slot Control */
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#define PCI_EXP_SLTSTA 26 /* Slot Status */
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