diff --git a/drivers/gpu/msm/adreno-gpulist.h b/drivers/gpu/msm/adreno-gpulist.h
index f5a0cef7d3fc..33c7ac12b21b 100644
--- a/drivers/gpu/msm/adreno-gpulist.h
+++ b/drivers/gpu/msm/adreno-gpulist.h
@@ -1577,6 +1577,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a660 = {
 	.disable_tseskip = true,
 	.highest_bank_bit = 16,
 	.pdc_in_aop = true,
+	.ctxt_record_size = 2496 * 1024,
 };
 
 static const struct adreno_a6xx_core adreno_gpu_core_a660_shima = {
@@ -1606,6 +1607,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a660_shima = {
 	.disable_tseskip = true,
 	.highest_bank_bit = 15,
 	.pdc_in_aop = true,
+	.ctxt_record_size = 2496 * 1024,
 };
 
 static const struct adreno_gpu_core *adreno_gpulist[] = {
diff --git a/drivers/gpu/msm/adreno_a6xx.h b/drivers/gpu/msm/adreno_a6xx.h
index 60c155836b7d..42b70964b4bf 100644
--- a/drivers/gpu/msm/adreno_a6xx.h
+++ b/drivers/gpu/msm/adreno_a6xx.h
@@ -89,6 +89,8 @@ struct adreno_a6xx_core {
 	bool gx_cpr_toggle;
 	/** @highest_bank_bit: The bit of the highest DDR bank */
 	u32 highest_bank_bit;
+	/** @ctxt_record_size: Size of the preemption record in bytes */
+	u64 ctxt_record_size;
 };
 
 #define CP_CLUSTER_FE		0x0
diff --git a/drivers/gpu/msm/adreno_a6xx_preempt.c b/drivers/gpu/msm/adreno_a6xx_preempt.c
index 21cfcf7811de..33236c8bfa05 100644
--- a/drivers/gpu/msm/adreno_a6xx_preempt.c
+++ b/drivers/gpu/msm/adreno_a6xx_preempt.c
@@ -615,19 +615,24 @@ static int a6xx_preemption_ringbuffer_init(struct adreno_device *adreno_dev,
 	struct adreno_ringbuffer *rb)
 {
 	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
+	const struct adreno_a6xx_core *a6xx_core = to_a6xx_core(adreno_dev);
+	u64 ctxt_record_size = A6XX_CP_CTXRECORD_SIZE_IN_BYTES;
 	u32 cp_rb_cntl = A6XX_CP_RB_CNTL_DEFAULT |
 		(ADRENO_FEATURE(adreno_dev, ADRENO_APRIV) ? 0 : (1 << 27));
 
+	if (a6xx_core->ctxt_record_size)
+		ctxt_record_size = a6xx_core->ctxt_record_size;
+
 	if (IS_ERR_OR_NULL(rb->preemption_desc))
 		rb->preemption_desc = kgsl_allocate_global(device,
-			A6XX_CP_CTXRECORD_SIZE_IN_BYTES, 0,
+			ctxt_record_size, 0,
 			KGSL_MEMDESC_PRIVILEGED, "preemption_desc");
 	if (IS_ERR(rb->preemption_desc))
 		return PTR_ERR(rb->preemption_desc);
 
 	if (IS_ERR_OR_NULL(rb->secure_preemption_desc))
 		rb->secure_preemption_desc = kgsl_allocate_global(device,
-			A6XX_CP_CTXRECORD_SIZE_IN_BYTES,
+			ctxt_record_size,
 			KGSL_MEMFLAGS_SECURE, KGSL_MEMDESC_PRIVILEGED,
 			"secure_preemption_desc");