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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-08 12:58:12 -04:00
Merge "scsi: ufshcd-qti: Port the new crypto framework to QTI ufs"
This commit is contained in:
commit
7da699bec8
1 changed files with 56 additions and 4 deletions
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@ -17,6 +17,7 @@
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#include "ufs-sysfs.h"
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#include "ufs-qcom.h"
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#include "ufs_bsg.h"
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#include "ufshcd-crypto.h"
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#define ufshcd_hex_dump(prefix_str, buf, len) do { \
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size_t __len = (len); \
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@ -1296,6 +1297,11 @@ static inline void ufshcd_hba_start(struct ufs_hba *hba)
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{
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u32 val = CONTROLLER_ENABLE;
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if (ufshcd_hba_is_crypto_supported(hba)) {
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ufshcd_crypto_enable(hba);
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val |= CRYPTO_GENERAL_ENABLE;
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}
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ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
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}
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@ -2883,9 +2889,21 @@ static int ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
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dword_0 |= UTP_REQ_DESC_INT_CMD;
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/* Transfer request descriptor header fields */
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if (lrbp->crypto_enable) {
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dword_0 |= UTP_REQ_DESC_CRYPTO_ENABLE_CMD;
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dword_0 |= lrbp->crypto_key_slot;
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req_desc->header.dword_1 =
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cpu_to_le32((u32)lrbp->data_unit_num);
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req_desc->header.dword_3 =
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cpu_to_le32((u32)(lrbp->data_unit_num >> 32));
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} else {
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/* dword_1 and dword_3 are reserved, hence they are set to 0 */
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req_desc->header.dword_1 = 0;
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req_desc->header.dword_3 = 0;
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}
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req_desc->header.dword_0 = cpu_to_le32(dword_0);
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/* dword_1 is reserved, hence it is set to 0 */
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req_desc->header.dword_1 = 0;
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/*
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* assigning invalid value for command status. Controller
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* updates OCS on command completion, with the command
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@ -2893,8 +2911,6 @@ static int ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
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*/
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req_desc->header.dword_2 =
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cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
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/* dword_3 is reserved, hence it is set to 0 */
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req_desc->header.dword_3 = 0;
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req_desc->prd_table_length = 0;
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@ -3226,6 +3242,13 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
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lrbp->task_tag = tag;
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lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
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lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
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err = ufshcd_prepare_lrbp_crypto(hba, cmd, lrbp);
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if (err) {
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lrbp->cmd = NULL;
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clear_bit_unlock(tag, &hba->lrb_in_use);
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goto out;
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}
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lrbp->req_abort_skip = false;
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err = ufshcd_comp_scsi_upiu(hba, lrbp);
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@ -3286,6 +3309,7 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
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lrbp->task_tag = tag;
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lrbp->lun = 0; /* device management cmd is not specific to any LUN */
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lrbp->intr_cmd = true; /* No interrupt aggregation */
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lrbp->crypto_enable = false; /* No crypto operations */
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hba->dev_cmd.type = cmd_type;
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return ufshcd_comp_devman_upiu(hba, lrbp);
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@ -5214,6 +5238,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
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{
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int err;
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ufshcd_crypto_disable(hba);
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ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
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err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
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CONTROLLER_ENABLE, CONTROLLER_DISABLE,
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@ -5613,6 +5638,7 @@ static int ufshcd_slave_configure(struct scsi_device *sdev)
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if (hba->scsi_cmd_timeout)
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blk_queue_rq_timeout(q, hba->scsi_cmd_timeout * HZ);
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ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
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return 0;
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}
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@ -5623,6 +5649,7 @@ static int ufshcd_slave_configure(struct scsi_device *sdev)
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static void ufshcd_slave_destroy(struct scsi_device *sdev)
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{
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struct ufs_hba *hba;
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struct request_queue *q = sdev->request_queue;
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hba = shost_priv(sdev->host);
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/* Drop the reference as it won't be needed anymore */
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@ -5633,6 +5660,8 @@ static void ufshcd_slave_destroy(struct scsi_device *sdev)
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hba->sdev_ufs_device = NULL;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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}
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ufshcd_crypto_destroy_rq_keyslot_manager(hba, q);
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}
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/**
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@ -5756,6 +5785,8 @@ ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
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case OCS_PEER_COMM_FAILURE:
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case OCS_FATAL_ERROR:
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case OCS_DEVICE_FATAL_ERROR:
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case OCS_INVALID_CRYPTO_CONFIG:
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case OCS_GENERAL_CRYPTO_ERROR:
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default:
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result |= DID_ERROR << 16;
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dev_err(hba->dev,
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@ -5857,6 +5888,7 @@ static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
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result = ufshcd_transfer_rsp_status(hba, lrbp);
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scsi_dma_unmap(cmd);
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cmd->result = result;
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ufshcd_complete_lrbp_crypto(hba, cmd, lrbp);
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clear_bit_unlock(index, &hba->lrb_in_use);
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lrbp->compl_time_stamp = ktime_get();
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update_req_stats(hba, lrbp);
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@ -9284,6 +9316,9 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
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req_link_state = UIC_LINK_OFF_STATE;
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}
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ret = ufshcd_crypto_suspend(hba, pm_op);
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if (ret)
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goto out;
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/*
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* If we can't transition into any of the low power modes
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* just gate the clocks.
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@ -9399,6 +9434,7 @@ enable_gating:
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ufshcd_resume_clkscaling(hba);
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hba->clk_gating.is_suspended = false;
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ufshcd_release_all(hba);
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ufshcd_crypto_resume(hba, pm_op);
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out:
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hba->pm_op_in_progress = 0;
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@ -9422,10 +9458,12 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
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{
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int ret;
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enum uic_link_state old_link_state;
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enum ufs_dev_pwr_mode old_pwr_mode;
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hba->pm_op_in_progress = 1;
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old_link_state = hba->uic_link_state;
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old_pwr_mode = hba->curr_dev_pwr_mode;
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ufshcd_hba_vreg_set_hpm(hba);
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/* Make sure clocks are enabled before accessing controller */
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ret = ufshcd_enable_clocks(hba);
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@ -9477,6 +9515,10 @@ static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
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goto set_old_link_state;
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}
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ret = ufshcd_crypto_resume(hba, pm_op);
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if (ret)
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goto set_old_dev_pwr_mode;
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if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
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ufshcd_enable_auto_bkops(hba);
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else
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@ -9499,6 +9541,9 @@ skip_dev_ops:
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ufshcd_release_all(hba);
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goto out;
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set_old_dev_pwr_mode:
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if (old_pwr_mode != hba->curr_dev_pwr_mode)
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ufshcd_set_dev_pwr_mode(hba, old_pwr_mode);
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set_old_link_state:
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ufshcd_link_state_transition(hba, old_link_state, 0);
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vendor_suspend:
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@ -9986,6 +10031,13 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
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if (hba->force_g4)
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hba->phy_init_g4 = true;
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/* Init crypto */
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err = ufshcd_hba_init_crypto(hba);
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if (err) {
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dev_err(hba->dev, "crypto setup failed\n");
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goto out_remove_scsi_host;
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}
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/* Host controller enable */
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err = ufshcd_hba_enable(hba);
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if (err) {
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