Merge "ARM: dts: msm: Update GPU Fmax to 676MHz for Shima default and AC SKU"

This commit is contained in:
qctecmdr 2020-08-28 07:15:58 -07:00 • committed by Gerrit - the friendly Code Review server
commit 7dbed56dff

View file

@ -141,12 +141,12 @@
#size-cells = <0>;
qcom,speed-bin = <0>;
qcom,initial-pwrlevel = <2>;
qcom,initial-pwrlevel = <4>;
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <490000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,gpu-freq = <676000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <10>;
@ -159,6 +159,34 @@
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <608000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq-ddr7 = <10>;
qcom,bus-min-ddr7 = <9>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <8>;
qcom,bus-max-ddr8 = <11>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <540000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq-ddr7 = <9>;
qcom,bus-min-ddr7 = <8>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <8>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <10>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <443000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@ -171,8 +199,8 @@
qcom,bus-max-ddr8 = <9>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <285000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
@ -277,24 +305,10 @@
#size-cells = <0>;
qcom,speed-bin = <158>;
qcom,initial-pwrlevel = <5>;
qcom,initial-pwrlevel = <4>;
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <747000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <11>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <11>;
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <11>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <676000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
@ -302,13 +316,13 @@
qcom,bus-min-ddr7 = <10>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <10>;
qcom,bus-freq-ddr8 = <11>;
qcom,bus-min-ddr8 = <9>;
qcom,bus-max-ddr8 = <11>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <608000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
@ -321,8 +335,8 @@
qcom,bus-max-ddr8 = <11>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <540000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
@ -335,8 +349,8 @@
qcom,bus-max-ddr8 = <10>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <443000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@ -349,8 +363,8 @@
qcom,bus-max-ddr8 = <9>;
};
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <285000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;