mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-06 03:45:24 -04:00
This is the 5.4.62 stable release
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Merge 5.4.62 into android11-5.4-lts
Changes in 5.4.62
powerpc/64s: Don't init FSCR_DSCR in __init_FSCR()
binfmt_flat: revert "binfmt_flat: don't offset the data start"
gre6: Fix reception with IP6_TNL_F_RCV_DSCP_COPY
net: Fix potential wrong skb->protocol in skb_vlan_untag()
net: nexthop: don't allow empty NHA_GROUP
net: qrtr: fix usage of idr in port assignment to socket
net: sctp: Fix negotiation of the number of data streams.
net/smc: Prevent kernel-infoleak in __smc_diag_dump()
tipc: fix uninit skb->data in tipc_nl_compat_dumpit()
net: ena: Make missed_tx stat incremental
net/sched: act_ct: Fix skb double-free in tcf_ct_handle_fragments() error flow
ipvlan: fix device features
ALSA: hda/hdmi: Add quirk to force connectivity
ALSA: pci: delete repeated words in comments
ALSA: hda/realtek: Fix pin default on Intel NUC 8 Rugged
ALSA: hda/hdmi: Use force connectivity quirk on another HP desktop
ASoC: img: Fix a reference count leak in img_i2s_in_set_fmt
ASoC: img-parallel-out: Fix a reference count leak
ASoC: tegra: Fix reference count leaks.
mfd: intel-lpss: Add Intel Emmitsburg PCH PCI IDs
arm64: dts: qcom: msm8916: Pull down PDM GPIOs during sleep
powerpc/xive: Ignore kmemleak false positives
media: pci: ttpci: av7110: fix possible buffer overflow caused by bad DMA value in debiirq()
blktrace: ensure our debugfs dir exists
scsi: target: tcmu: Fix crash on ARM during cmd completion
mfd: intel-lpss: Add Intel Tiger Lake PCH-H PCI IDs
iommu/iova: Don't BUG on invalid PFNs
drm/amdkfd: Fix reference count leaks.
drm/radeon: fix multiple reference count leak
drm/amdgpu: fix ref count leak in amdgpu_driver_open_kms
drm/amd/display: fix ref count leak in amdgpu_drm_ioctl
drm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config
drm/amdgpu/display: fix ref count leak when pm_runtime_get_sync fails
scsi: lpfc: Fix shost refcount mismatch when deleting vport
xfs: Don't allow logging of XFS_ISTALE inodes
scsi: target: Fix xcopy sess release leak
selftests/powerpc: Purge extra count_pmc() calls of ebb selftests
f2fs: fix error path in do_recover_data()
omapfb: fix multiple reference count leaks due to pm_runtime_get_sync
PCI: Fix pci_create_slot() reference count leak
ARM: dts: ls1021a: output PPS signal on FIPER2
rtlwifi: rtl8192cu: Prevent leaking urb
mips/vdso: Fix resource leaks in genvdso.c
ALSA: hda: Add support for Loongson 7A1000 controller
cec-api: prevent leaking memory through hole in structure
HID: quirks: add NOGET quirk for Logitech GROUP
f2fs: fix use-after-free issue
drm/nouveau/drm/noveau: fix reference count leak in nouveau_fbcon_open
drm/nouveau: fix reference count leak in nv50_disp_atomic_commit
drm/nouveau: Fix reference count leak in nouveau_connector_detect
locking/lockdep: Fix overflow in presentation of average lock-time
btrfs: file: reserve qgroup space after the hole punch range is locked
btrfs: make btrfs_qgroup_check_reserved_leak take btrfs_inode
scsi: iscsi: Do not put host in iscsi_set_flashnode_param()
ceph: fix potential mdsc use-after-free crash
ceph: do not access the kiocb after aio requests
scsi: fcoe: Memory leak fix in fcoe_sysfs_fcf_del()
EDAC/ie31200: Fallback if host bridge device is already initialized
hugetlbfs: prevent filesystem stacking of hugetlbfs
media: davinci: vpif_capture: fix potential double free
KVM: arm64: Fix symbol dependency in __hyp_call_panic_nvhe
powerpc/spufs: add CONFIG_COREDUMP dependency
USB: sisusbvga: Fix a potential UB casued by left shifting a negative value
brcmfmac: Set timeout value when configuring power save
efi: provide empty efi_enter_virtual_mode implementation
arm64: Fix __cpu_logical_map undefined issue
Revert "ath10k: fix DMA related firmware crashes on multiple devices"
sched/uclamp: Protect uclamp fast path code with static key
sched/uclamp: Fix a deadlock when enabling uclamp static key
usb: cdns3: gadget: always zeroed TRB buffer when enable endpoint
PM / devfreq: rk3399_dmc: Add missing of_node_put()
PM / devfreq: rk3399_dmc: Disable devfreq-event device when fails
PM / devfreq: rk3399_dmc: Fix kernel oops when rockchip,pmu is absent
drm/xen: fix passing zero to 'PTR_ERR' warning
drm/xen-front: Fix misused IS_ERR_OR_NULL checks
s390/numa: set node distance to LOCAL_DISTANCE
btrfs: factor out inode items copy loop from btrfs_log_inode()
btrfs: only commit the delayed inode when doing a full fsync
btrfs: only commit delayed items at fsync if we are logging a directory
mm/shuffle: don't move pages between zones and don't read garbage memmaps
mm: fix kthread_use_mm() vs TLB invalidate
mm/cma.c: switch to bitmap_zalloc() for cma bitmap allocation
cma: don't quit at first error when activating reserved areas
gpu/drm: ingenic: Use the plane's src_[x,y] to configure DMA length
drm/ingenic: Fix incorrect assumption about plane->index
drm/amd/display: Trigger modesets on MST DSC connectors
drm/amd/display: Add additional config guards for DCN
drm/amd/display: Fix dmesg warning from setting abm level
mm/vunmap: add cond_resched() in vunmap_pmd_range
EDAC: sb_edac: get rid of unused vars
EDAC: skx_common: get rid of unused type var
EDAC/{i7core,sb,pnd2,skx}: Fix error event severity
PCI: qcom: Add missing ipq806x clocks in PCIe driver
PCI: qcom: Change duplicate PCI reset to phy reset
PCI: qcom: Add missing reset for ipq806x
cpufreq: intel_pstate: Fix EPP setting via sysfs in active mode
ALSA: usb-audio: Add capture support for Saffire 6 (USB 1.1)
media: gpio-ir-tx: improve precision of transmitted signal due to scheduling
block: respect queue limit of max discard segment
block: virtio_blk: fix handling single range discard request
drm/msm/adreno: fix updating ring fence
block: Fix page_is_mergeable() for compound pages
bfq: fix blkio cgroup leakage v4
hwmon: (nct7904) Correct divide by 0
blk-mq: insert request not through ->queue_rq into sw/scheduler queue
blkcg: fix memleak for iolatency
nvme-fc: Fix wrong return value in __nvme_fc_init_request()
nvme: multipath: round-robin: fix single non-optimized path case
null_blk: fix passing of REQ_FUA flag in null_handle_rq
i2c: core: Don't fail PRP0001 enumeration when no ID table exist
i2c: rcar: in slave mode, clear NACK earlier
usb: gadget: f_tcm: Fix some resource leaks in some error paths
spi: stm32: clear only asserted irq flags on interrupt
jbd2: make sure jh have b_transaction set in refile/unfile_buffer
ext4: don't BUG on inconsistent journal feature
ext4: handle read only external journal device
jbd2: abort journal if free a async write error metadata buffer
ext4: handle option set by mount flags correctly
ext4: handle error of ext4_setup_system_zone() on remount
ext4: correctly restore system zone info when remount fails
fs: prevent BUG_ON in submit_bh_wbc()
spi: stm32h7: fix race condition at end of transfer
spi: stm32: fix fifo threshold level in case of short transfer
spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
spi: stm32: always perform registers configuration prior to transfer
drm/amd/powerplay: correct Vega20 cached smu feature state
drm/amd/powerplay: correct UVD/VCE PG state on custom pptable uploading
drm/amd/display: Switch to immediate mode for updating infopackets
netfilter: avoid ipv6 -> nf_defrag_ipv6 module dependency
can: j1939: transport: j1939_xtp_rx_dat_one(): compare own packets to detect corruptions
ALSA: hda/realtek: Add model alc298-samsung-headphone
s390/cio: add cond_resched() in the slow_eval_known_fn() loop
ASoC: wm8994: Avoid attempts to read unreadable registers
selftests: disable rp_filter for icmp_redirect.sh
scsi: fcoe: Fix I/O path allocation
scsi: ufs: Fix possible infinite loop in ufshcd_hold
scsi: ufs: Improve interrupt handling for shared interrupts
scsi: ufs: Clean up completed request without interrupt notification
scsi: qla2xxx: Fix login timeout
scsi: qla2xxx: Check if FW supports MQ before enabling
scsi: qla2xxx: Fix null pointer access during disconnect from subsystem
Revert "scsi: qla2xxx: Fix crash on qla2x00_mailbox_command"
macvlan: validate setting of multiple remote source MAC addresses
net: gianfar: Add of_node_put() before goto statement
powerpc/perf: Fix soft lockups due to missed interrupt accounting
arm64: Move handling of erratum 1418040 into C code
arm64: Allow booting of late CPUs affected by erratum 1418040
block: fix get_max_io_size()
block: loop: set discard granularity and alignment for block device backed loop
HID: i2c-hid: Always sleep 60ms after I2C_HID_PWR_ON commands
blk-mq: order adding requests to hctx->dispatch and checking SCHED_RESTART
btrfs: reset compression level for lzo on remount
btrfs: check the right error variable in btrfs_del_dir_entries_in_log
btrfs: fix space cache memory leak after transaction abort
btrfs: detect nocow for swap after snapshot delete
fbcon: prevent user font height or width change from causing potential out-of-bounds access
USB: lvtest: return proper error code in probe
vt: defer kfree() of vc_screenbuf in vc_do_resize()
vt_ioctl: change VT_RESIZEX ioctl to check for error return from vc_resize()
serial: samsung: Removes the IRQ not found warning
serial: pl011: Fix oops on -EPROBE_DEFER
serial: pl011: Don't leak amba_ports entry on driver register error
serial: stm32: avoid kernel warning on absence of optional IRQ
serial: 8250_exar: Fix number of ports for Commtech PCIe cards
serial: 8250: change lock order in serial8250_do_startup()
writeback: Protect inode->i_io_list with inode->i_lock
writeback: Avoid skipping inode writeback
writeback: Fix sync livelock due to b_dirty_time processing
XEN uses irqdesc::irq_data_common::handler_data to store a per interrupt XEN data pointer which contains XEN specific information.
usb: host: xhci: fix ep context print mismatch in debugfs
xhci: Do warm-reset when both CAS and XDEV_RESUME are set
xhci: Always restore EP_SOFT_CLEAR_TOGGLE even if ep reset failed
arm64: vdso32: make vdso32 install conditional
PM: sleep: core: Fix the handling of pending runtime resume requests
powerpc/perf: Fix crashes with generic_compat_pmu & BHRB
device property: Fix the secondary firmware node handling in set_primary_fwnode()
crypto: af_alg - Work around empty control messages without MSG_MORE
genirq/matrix: Deal with the sillyness of for_each_cpu() on UP
irqchip/stm32-exti: Avoid losing interrupts due to clearing pending bits by mistake
x86/hotplug: Silence APIC only after all interrupts are migrated
drm/amdgpu: Fix buffer overflow in INFO ioctl
drm/amdgpu/gfx10: refine mgcg setting
drm/amd/powerplay: Fix hardmins not being sent to SMU for RV
drm/amd/pm: correct Vega10 swctf limit setting
drm/amd/pm: correct Vega12 swctf limit setting
drm/amd/pm: correct Vega20 swctf limit setting
drm/amd/pm: correct the thermal alert temperature limit settings
USB: yurex: Fix bad gfp argument
usb: uas: Add quirk for PNY Pro Elite
USB: quirks: Add no-lpm quirk for another Raydium touchscreen
USB: quirks: Ignore duplicate endpoint on Sound Devices MixPre-D
USB: Ignore UAS for JMicron JMS567 ATA/ATAPI Bridge
usb: host: ohci-exynos: Fix error handling in exynos_ohci_probe()
USB: gadget: u_f: add overflow checks to VLA macros
USB: gadget: f_ncm: add bounds checks to ncm_unwrap_ntb()
USB: gadget: u_f: Unbreak offset calculation in VLAs
USB: cdc-acm: rework notification_buffer resizing
usb: storage: Add unusual_uas entry for Sony PSZ drives
drm/i915: Fix cmd parser desc matching with masks
usb: dwc3: gadget: Don't setup more than requested
usb: dwc3: gadget: Fix handling ZLP
usb: dwc3: gadget: Handle ZLP for sg requests
fbmem: pull fbcon_update_vcs() out of fb_set_var()
kheaders: remove unneeded 'cat' command piped to 'head' / 'tail'
kheaders: optimize md5sum calculation for in-tree builds
kheaders: optimize header copy for in-tree builds
kheaders: remove the last bashism to allow sh to run it
kheaders: explain why include/config/autoconf.h is excluded from md5sum
kbuild: add variables for compression tools
kbuild: fix broken builds because of GZIP,BZIP2,LZOP variables
HID: hiddev: Fix slab-out-of-bounds write in hiddev_ioctl_usage()
ALSA: usb-audio: Update documentation comment for MS2109 quirk
io_uring: Fix NULL pointer dereference in io_sq_wq_submit_work()
Linux 5.4.62
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I7cac9619b0d3edfee94fc6f31efa5d5b545cfeb5
This commit is contained in:
Greg Kroah-Hartman
commit
7ea7cc9f8b
228 changed files with 2061 additions and 965 deletions
13
Makefile
13
Makefile
|
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 61
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SUBLEVEL = 62
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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@ -442,6 +442,12 @@ PYTHON = python
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PYTHON3 = python3
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CHECK = sparse
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BASH = bash
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KGZIP = gzip
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KBZIP2 = bzip2
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KLZOP = lzop
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LZMA = lzma
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LZ4 = lz4c
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XZ = xz
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CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
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-Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
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@ -490,6 +496,7 @@ CLANG_FLAGS :=
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export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
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export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE READELF PAHOLE LEX YACC AWK INSTALLKERNEL
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export PERL PYTHON PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
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export KGZIP KBZIP2 KLZOP LZMA LZ4 XZ
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export KBUILD_HOSTCXXFLAGS KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS LDFLAGS_MODULE
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export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS KBUILD_LDFLAGS
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@ -1070,10 +1077,10 @@ export mod_strip_cmd
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mod_compress_cmd = true
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ifdef CONFIG_MODULE_COMPRESS
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ifdef CONFIG_MODULE_COMPRESS_GZIP
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mod_compress_cmd = gzip -n -f
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mod_compress_cmd = $(KGZIP) -n -f
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endif # CONFIG_MODULE_COMPRESS_GZIP
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ifdef CONFIG_MODULE_COMPRESS_XZ
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mod_compress_cmd = xz -f
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mod_compress_cmd = $(XZ) -f
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endif # CONFIG_MODULE_COMPRESS_XZ
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endif # CONFIG_MODULE_COMPRESS
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export mod_compress_cmd
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|
|
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|||
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@ -56,7 +56,7 @@ trap 'rm -f "$XIPIMAGE.tmp"; exit 1' 1 2 3
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# substitute the data section by a compressed version
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$DD if="$XIPIMAGE" count=$data_start iflag=count_bytes of="$XIPIMAGE.tmp"
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$DD if="$XIPIMAGE" skip=$data_start iflag=skip_bytes |
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gzip -9 >> "$XIPIMAGE.tmp"
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$KGZIP -9 >> "$XIPIMAGE.tmp"
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# replace kernel binary
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mv -f "$XIPIMAGE.tmp" "$XIPIMAGE"
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|
|
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@ -753,7 +753,7 @@
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fsl,tmr-prsc = <2>;
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fsl,tmr-add = <0xaaaaaaab>;
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fsl,tmr-fiper1 = <999999995>;
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fsl,tmr-fiper2 = <99990>;
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fsl,tmr-fiper2 = <999999995>;
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fsl,max-adj = <499999999>;
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fsl,extts-fifo;
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};
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|
|
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|||
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@ -150,7 +150,8 @@ zinstall install:
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PHONY += vdso_install
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vdso_install:
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$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
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$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@
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$(if $(CONFIG_COMPAT_VDSO), \
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$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
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# We use MRPROPER_FILES and CLEAN_FILES now
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archclean:
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@ -521,7 +521,7 @@
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pins = "gpio63", "gpio64", "gpio65", "gpio66",
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"gpio67", "gpio68";
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drive-strength = <2>;
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bias-disable;
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bias-pull-down;
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};
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};
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};
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|
|
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@ -46,7 +46,12 @@ DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
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* Logical CPU mapping.
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*/
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extern u64 __cpu_logical_map[NR_CPUS];
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#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
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extern u64 cpu_logical_map(int cpu);
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static inline void set_cpu_logical_map(int cpu, u64 hwid)
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{
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__cpu_logical_map[cpu] = hwid;
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}
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struct seq_file;
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|
|
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|||
|
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@ -917,6 +917,8 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
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.desc = "ARM erratum 1418040",
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.capability = ARM64_WORKAROUND_1418040,
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ERRATA_MIDR_RANGE_LIST(erratum_1418040_list),
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.type = (ARM64_CPUCAP_SCOPE_LOCAL_CPU |
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ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU),
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1165522
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|
|
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|
|
@ -495,6 +495,39 @@ static void entry_task_switch(struct task_struct *next)
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__this_cpu_write(__entry_task, next);
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}
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/*
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* ARM erratum 1418040 handling, affecting the 32bit view of CNTVCT.
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* Assuming the virtual counter is enabled at the beginning of times:
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*
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* - disable access when switching from a 64bit task to a 32bit task
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* - enable access when switching from a 32bit task to a 64bit task
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*/
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static void erratum_1418040_thread_switch(struct task_struct *prev,
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struct task_struct *next)
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{
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bool prev32, next32;
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u64 val;
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if (!(IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040) &&
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cpus_have_const_cap(ARM64_WORKAROUND_1418040)))
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return;
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prev32 = is_compat_thread(task_thread_info(prev));
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next32 = is_compat_thread(task_thread_info(next));
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if (prev32 == next32)
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return;
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val = read_sysreg(cntkctl_el1);
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|
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if (!next32)
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val |= ARCH_TIMER_USR_VCT_ACCESS_EN;
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else
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val &= ~ARCH_TIMER_USR_VCT_ACCESS_EN;
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write_sysreg(val, cntkctl_el1);
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}
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/*
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* Thread switching.
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*/
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|
|
@ -511,6 +544,7 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
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uao_thread_switch(next);
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ptrauth_thread_switch(next);
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ssbs_thread_switch(next);
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erratum_1418040_thread_switch(prev, next);
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scs_overflow_check(next);
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/*
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|
|
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|||
|
|
@ -85,7 +85,7 @@ u64 __cacheline_aligned boot_args[4];
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void __init smp_setup_processor_id(void)
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{
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u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
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cpu_logical_map(0) = mpidr;
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set_cpu_logical_map(0, mpidr);
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|
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/*
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* clear __my_cpu_offset on boot CPU to avoid hang caused by
|
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|
|
@ -276,6 +276,12 @@ arch_initcall(reserve_memblock_reserved_regions);
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|
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u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
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u64 cpu_logical_map(int cpu)
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{
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return __cpu_logical_map[cpu];
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||||
}
|
||||
EXPORT_SYMBOL_GPL(cpu_logical_map);
|
||||
|
||||
void __init setup_arch(char **cmdline_p)
|
||||
{
|
||||
init_mm.start_code = (unsigned long) _text;
|
||||
|
|
|
|||
|
|
@ -555,7 +555,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
|
|||
return;
|
||||
|
||||
/* map the logical cpu id to cpu MPIDR */
|
||||
cpu_logical_map(cpu_count) = hwid;
|
||||
set_cpu_logical_map(cpu_count, hwid);
|
||||
|
||||
cpu_madt_gicc[cpu_count] = *processor;
|
||||
|
||||
|
|
@ -669,7 +669,7 @@ static void __init of_parse_and_init_cpus(void)
|
|||
goto next;
|
||||
|
||||
pr_debug("cpu logical map 0x%llx\n", hwid);
|
||||
cpu_logical_map(cpu_count) = hwid;
|
||||
set_cpu_logical_map(cpu_count, hwid);
|
||||
|
||||
early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
|
||||
next:
|
||||
|
|
@ -710,7 +710,7 @@ void __init smp_init_cpus(void)
|
|||
for (i = 1; i < nr_cpu_ids; i++) {
|
||||
if (cpu_logical_map(i) != INVALID_HWID) {
|
||||
if (smp_cpu_setup(i))
|
||||
cpu_logical_map(i) = INVALID_HWID;
|
||||
set_cpu_logical_map(i, INVALID_HWID);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -754,7 +754,7 @@ static void __hyp_text __hyp_call_panic_nvhe(u64 spsr, u64 elr, u64 par,
|
|||
* making sure it is a kernel address and not a PC-relative
|
||||
* reference.
|
||||
*/
|
||||
asm volatile("ldr %0, =__hyp_panic_string" : "=r" (str_va));
|
||||
asm volatile("ldr %0, =%1" : "=r" (str_va) : "S" (__hyp_panic_string));
|
||||
|
||||
__hyp_do_panic(str_va,
|
||||
spsr, elr,
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ $(error Sorry, you need a newer version of the assember, one that is built from
|
|||
endif
|
||||
|
||||
quiet_cmd_gzip = GZIP $@
|
||||
cmd_gzip = cat $(real-prereqs) | gzip -n -f -9 > $@
|
||||
cmd_gzip = cat $(real-prereqs) | $(KGZIP) -n -f -9 > $@
|
||||
|
||||
quiet_cmd_objcopy = OBJCOPY $@
|
||||
cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
|
||||
|
|
|
|||
|
|
@ -135,10 +135,10 @@ vmlinux.gz: vmlinux
|
|||
ifndef CONFIG_KGDB
|
||||
cp vmlinux vmlinux.tmp
|
||||
$(STRIP) vmlinux.tmp
|
||||
gzip -9c vmlinux.tmp >vmlinux.gz
|
||||
$(KGZIP) -9c vmlinux.tmp >vmlinux.gz
|
||||
rm vmlinux.tmp
|
||||
else
|
||||
gzip -9c vmlinux >vmlinux.gz
|
||||
$(KGZIP) -9c vmlinux >vmlinux.gz
|
||||
endif
|
||||
|
||||
bzImage: vmlinux.bz2
|
||||
|
|
@ -148,10 +148,10 @@ vmlinux.bz2: vmlinux
|
|||
ifndef CONFIG_KGDB
|
||||
cp vmlinux vmlinux.tmp
|
||||
$(STRIP) vmlinux.tmp
|
||||
bzip2 -1c vmlinux.tmp >vmlinux.bz2
|
||||
$(KBZIP2) -1c vmlinux.tmp >vmlinux.bz2
|
||||
rm vmlinux.tmp
|
||||
else
|
||||
bzip2 -1c vmlinux >vmlinux.bz2
|
||||
$(KBZIP2) -1c vmlinux >vmlinux.bz2
|
||||
endif
|
||||
|
||||
archclean:
|
||||
|
|
|
|||
|
|
@ -122,6 +122,7 @@ static void *map_vdso(const char *path, size_t *_size)
|
|||
if (fstat(fd, &stat) != 0) {
|
||||
fprintf(stderr, "%s: Failed to stat '%s': %s\n", program_name,
|
||||
path, strerror(errno));
|
||||
close(fd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -130,6 +131,7 @@ static void *map_vdso(const char *path, size_t *_size)
|
|||
if (addr == MAP_FAILED) {
|
||||
fprintf(stderr, "%s: Failed to map '%s': %s\n", program_name,
|
||||
path, strerror(errno));
|
||||
close(fd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -139,6 +141,7 @@ static void *map_vdso(const char *path, size_t *_size)
|
|||
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG) != 0) {
|
||||
fprintf(stderr, "%s: '%s' is not an ELF file\n", program_name,
|
||||
path);
|
||||
close(fd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -150,6 +153,7 @@ static void *map_vdso(const char *path, size_t *_size)
|
|||
default:
|
||||
fprintf(stderr, "%s: '%s' has invalid ELF class\n",
|
||||
program_name, path);
|
||||
close(fd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -161,6 +165,7 @@ static void *map_vdso(const char *path, size_t *_size)
|
|||
default:
|
||||
fprintf(stderr, "%s: '%s' has invalid ELF data order\n",
|
||||
program_name, path);
|
||||
close(fd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -168,15 +173,18 @@ static void *map_vdso(const char *path, size_t *_size)
|
|||
fprintf(stderr,
|
||||
"%s: '%s' has invalid ELF machine (expected EM_MIPS)\n",
|
||||
program_name, path);
|
||||
close(fd);
|
||||
return NULL;
|
||||
} else if (swap_uint16(ehdr->e_type) != ET_DYN) {
|
||||
fprintf(stderr,
|
||||
"%s: '%s' has invalid ELF type (expected ET_DYN)\n",
|
||||
program_name, path);
|
||||
close(fd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
*_size = stat.st_size;
|
||||
close(fd);
|
||||
return addr;
|
||||
}
|
||||
|
||||
|
|
@ -280,10 +288,12 @@ int main(int argc, char **argv)
|
|||
/* Calculate and write symbol offsets to <output file> */
|
||||
if (!get_symbols(dbg_vdso_path, dbg_vdso)) {
|
||||
unlink(out_path);
|
||||
fclose(out_file);
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
|
||||
fprintf(out_file, "};\n");
|
||||
fclose(out_file);
|
||||
|
||||
return EXIT_SUCCESS;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -156,7 +156,7 @@ vmlinuz: bzImage
|
|||
$(OBJCOPY) $(boot)/bzImage $@
|
||||
else
|
||||
vmlinuz: vmlinux
|
||||
@gzip -cf -9 $< > $@
|
||||
@$(KGZIP) -cf -9 $< > $@
|
||||
endif
|
||||
|
||||
install:
|
||||
|
|
|
|||
|
|
@ -184,7 +184,7 @@ __init_LPCR_ISA300:
|
|||
|
||||
__init_FSCR:
|
||||
mfspr r3,SPRN_FSCR
|
||||
ori r3,r3,FSCR_TAR|FSCR_DSCR|FSCR_EBB
|
||||
ori r3,r3,FSCR_TAR|FSCR_EBB
|
||||
mtspr SPRN_FSCR,r3
|
||||
blr
|
||||
|
||||
|
|
|
|||
|
|
@ -1520,9 +1520,16 @@ nocheck:
|
|||
ret = 0;
|
||||
out:
|
||||
if (has_branch_stack(event)) {
|
||||
power_pmu_bhrb_enable(event);
|
||||
cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
|
||||
event->attr.branch_sample_type);
|
||||
u64 bhrb_filter = -1;
|
||||
|
||||
if (ppmu->bhrb_filter_map)
|
||||
bhrb_filter = ppmu->bhrb_filter_map(
|
||||
event->attr.branch_sample_type);
|
||||
|
||||
if (bhrb_filter != -1) {
|
||||
cpuhw->bhrb_filter = bhrb_filter;
|
||||
power_pmu_bhrb_enable(event);
|
||||
}
|
||||
}
|
||||
|
||||
perf_pmu_enable(event->pmu);
|
||||
|
|
@ -1844,7 +1851,6 @@ static int power_pmu_event_init(struct perf_event *event)
|
|||
int n;
|
||||
int err;
|
||||
struct cpu_hw_events *cpuhw;
|
||||
u64 bhrb_filter;
|
||||
|
||||
if (!ppmu)
|
||||
return -ENOENT;
|
||||
|
|
@ -1950,7 +1956,10 @@ static int power_pmu_event_init(struct perf_event *event)
|
|||
err = power_check_constraints(cpuhw, events, cflags, n + 1);
|
||||
|
||||
if (has_branch_stack(event)) {
|
||||
bhrb_filter = ppmu->bhrb_filter_map(
|
||||
u64 bhrb_filter = -1;
|
||||
|
||||
if (ppmu->bhrb_filter_map)
|
||||
bhrb_filter = ppmu->bhrb_filter_map(
|
||||
event->attr.branch_sample_type);
|
||||
|
||||
if (bhrb_filter == -1) {
|
||||
|
|
@ -2104,6 +2113,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
|
|||
|
||||
if (perf_event_overflow(event, &data, regs))
|
||||
power_pmu_stop(event, 0);
|
||||
} else if (period) {
|
||||
/* Account for interrupt in case of invalid SIAR */
|
||||
if (perf_event_account_interrupt(event))
|
||||
power_pmu_stop(event, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@ config SPU_FS
|
|||
tristate "SPU file system"
|
||||
default m
|
||||
depends on PPC_CELL
|
||||
depends on COREDUMP
|
||||
select SPU_BASE
|
||||
help
|
||||
The SPU file system is used to access Synergistic Processing
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/cpumask.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/kmemleak.h>
|
||||
|
||||
#include <asm/prom.h>
|
||||
#include <asm/io.h>
|
||||
|
|
@ -646,6 +647,7 @@ static bool xive_native_provision_pages(void)
|
|||
pr_err("Failed to allocate provisioning page\n");
|
||||
return false;
|
||||
}
|
||||
kmemleak_ignore(p);
|
||||
opal_xive_donate_page(chip, __pa(p));
|
||||
}
|
||||
return true;
|
||||
|
|
|
|||
|
|
@ -17,7 +17,6 @@
|
|||
|
||||
void numa_setup(void);
|
||||
int numa_pfn_to_nid(unsigned long pfn);
|
||||
int __node_distance(int a, int b);
|
||||
void numa_update_cpu_topology(void);
|
||||
|
||||
extern cpumask_t node_to_cpumask_map[MAX_NUMNODES];
|
||||
|
|
|
|||
|
|
@ -83,8 +83,6 @@ static inline const struct cpumask *cpumask_of_node(int node)
|
|||
|
||||
#define pcibus_to_node(bus) __pcibus_to_node(bus)
|
||||
|
||||
#define node_distance(a, b) __node_distance(a, b)
|
||||
|
||||
#else /* !CONFIG_NUMA */
|
||||
|
||||
#define numa_node_id numa_node_id
|
||||
|
|
|
|||
|
|
@ -49,12 +49,6 @@ void numa_update_cpu_topology(void)
|
|||
mode->update_cpu_topology();
|
||||
}
|
||||
|
||||
int __node_distance(int a, int b)
|
||||
{
|
||||
return mode->distance ? mode->distance(a, b) : 0;
|
||||
}
|
||||
EXPORT_SYMBOL(__node_distance);
|
||||
|
||||
int numa_debug_enabled;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1599,14 +1599,28 @@ int native_cpu_disable(void)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Disable the local APIC. Otherwise IPI broadcasts will reach
|
||||
* it. It still responds normally to INIT, NMI, SMI, and SIPI
|
||||
* messages.
|
||||
*/
|
||||
apic_soft_disable();
|
||||
cpu_disable_common();
|
||||
|
||||
/*
|
||||
* Disable the local APIC. Otherwise IPI broadcasts will reach
|
||||
* it. It still responds normally to INIT, NMI, SMI, and SIPI
|
||||
* messages.
|
||||
*
|
||||
* Disabling the APIC must happen after cpu_disable_common()
|
||||
* which invokes fixup_irqs().
|
||||
*
|
||||
* Disabling the APIC preserves already set bits in IRR, but
|
||||
* an interrupt arriving after disabling the local APIC does not
|
||||
* set the corresponding IRR bit.
|
||||
*
|
||||
* fixup_irqs() scans IRR for set bits so it can raise a not
|
||||
* yet handled interrupt on the new destination CPU via an IPI
|
||||
* but obviously it can't do so for IRR bits which are not set.
|
||||
* IOW, interrupts arriving after disabling the local APIC will
|
||||
* be lost.
|
||||
*/
|
||||
apic_soft_disable();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -332,7 +332,7 @@ static void bfqg_put(struct bfq_group *bfqg)
|
|||
kfree(bfqg);
|
||||
}
|
||||
|
||||
void bfqg_and_blkg_get(struct bfq_group *bfqg)
|
||||
static void bfqg_and_blkg_get(struct bfq_group *bfqg)
|
||||
{
|
||||
/* see comments in bfq_bic_update_cgroup for why refcounting bfqg */
|
||||
bfqg_get(bfqg);
|
||||
|
|
|
|||
|
|
@ -980,7 +980,6 @@ struct bfq_group *bfq_find_set_group(struct bfq_data *bfqd,
|
|||
struct blkcg_gq *bfqg_to_blkg(struct bfq_group *bfqg);
|
||||
struct bfq_group *bfqq_group(struct bfq_queue *bfqq);
|
||||
struct bfq_group *bfq_create_group_hierarchy(struct bfq_data *bfqd, int node);
|
||||
void bfqg_and_blkg_get(struct bfq_group *bfqg);
|
||||
void bfqg_and_blkg_put(struct bfq_group *bfqg);
|
||||
|
||||
#ifdef CONFIG_BFQ_GROUP_IOSCHED
|
||||
|
|
|
|||
|
|
@ -536,9 +536,7 @@ static void bfq_get_entity(struct bfq_entity *entity)
|
|||
bfqq->ref++;
|
||||
bfq_log_bfqq(bfqq->bfqd, bfqq, "get_entity: %p %d",
|
||||
bfqq, bfqq->ref);
|
||||
} else
|
||||
bfqg_and_blkg_get(container_of(entity, struct bfq_group,
|
||||
entity));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -652,14 +650,8 @@ static void bfq_forget_entity(struct bfq_service_tree *st,
|
|||
|
||||
entity->on_st = false;
|
||||
st->wsum -= entity->weight;
|
||||
if (is_in_service)
|
||||
return;
|
||||
|
||||
if (bfqq)
|
||||
if (bfqq && !is_in_service)
|
||||
bfq_put_queue(bfqq);
|
||||
else
|
||||
bfqg_and_blkg_put(container_of(entity, struct bfq_group,
|
||||
entity));
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
10
block/bio.c
10
block/bio.c
|
|
@ -683,8 +683,8 @@ static inline bool page_is_mergeable(const struct bio_vec *bv,
|
|||
struct page *page, unsigned int len, unsigned int off,
|
||||
bool *same_page)
|
||||
{
|
||||
phys_addr_t vec_end_addr = page_to_phys(bv->bv_page) +
|
||||
bv->bv_offset + bv->bv_len - 1;
|
||||
size_t bv_end = bv->bv_offset + bv->bv_len;
|
||||
phys_addr_t vec_end_addr = page_to_phys(bv->bv_page) + bv_end - 1;
|
||||
phys_addr_t page_addr = page_to_phys(page);
|
||||
|
||||
if (vec_end_addr + 1 != page_addr + off)
|
||||
|
|
@ -693,9 +693,9 @@ static inline bool page_is_mergeable(const struct bio_vec *bv,
|
|||
return false;
|
||||
|
||||
*same_page = ((vec_end_addr & PAGE_MASK) == page_addr);
|
||||
if (!*same_page && pfn_to_page(PFN_DOWN(vec_end_addr)) + 1 != page)
|
||||
return false;
|
||||
return true;
|
||||
if (*same_page)
|
||||
return true;
|
||||
return (bv->bv_page + bv_end / PAGE_SIZE) == (page + off / PAGE_SIZE);
|
||||
}
|
||||
|
||||
static bool bio_try_merge_pc_page(struct request_queue *q, struct bio *bio,
|
||||
|
|
|
|||
|
|
@ -1219,13 +1219,15 @@ int blkcg_init_queue(struct request_queue *q)
|
|||
if (preloaded)
|
||||
radix_tree_preload_end();
|
||||
|
||||
ret = blk_iolatency_init(q);
|
||||
if (ret)
|
||||
goto err_destroy_all;
|
||||
|
||||
ret = blk_throtl_init(q);
|
||||
if (ret)
|
||||
goto err_destroy_all;
|
||||
|
||||
ret = blk_iolatency_init(q);
|
||||
if (ret) {
|
||||
blk_throtl_exit(q);
|
||||
goto err_destroy_all;
|
||||
}
|
||||
return 0;
|
||||
|
||||
err_destroy_all:
|
||||
|
|
|
|||
|
|
@ -154,7 +154,7 @@ static inline unsigned get_max_io_size(struct request_queue *q,
|
|||
if (max_sectors > start_offset)
|
||||
return max_sectors - start_offset;
|
||||
|
||||
return sectors & (lbs - 1);
|
||||
return sectors & ~(lbs - 1);
|
||||
}
|
||||
|
||||
static inline unsigned get_max_segment_size(const struct request_queue *q,
|
||||
|
|
@ -553,10 +553,17 @@ int blk_rq_map_sg(struct request_queue *q, struct request *rq,
|
|||
}
|
||||
EXPORT_SYMBOL(blk_rq_map_sg);
|
||||
|
||||
static inline unsigned int blk_rq_get_max_segments(struct request *rq)
|
||||
{
|
||||
if (req_op(rq) == REQ_OP_DISCARD)
|
||||
return queue_max_discard_segments(rq->q);
|
||||
return queue_max_segments(rq->q);
|
||||
}
|
||||
|
||||
static inline int ll_new_hw_segment(struct request *req, struct bio *bio,
|
||||
unsigned int nr_phys_segs)
|
||||
{
|
||||
if (req->nr_phys_segments + nr_phys_segs > queue_max_segments(req->q))
|
||||
if (req->nr_phys_segments + nr_phys_segs > blk_rq_get_max_segments(req))
|
||||
goto no_merge;
|
||||
|
||||
if (blk_integrity_merge_bio(req->q, req, bio) == false)
|
||||
|
|
@ -644,7 +651,7 @@ static int ll_merge_requests_fn(struct request_queue *q, struct request *req,
|
|||
return 0;
|
||||
|
||||
total_phys_segments = req->nr_phys_segments + next->nr_phys_segments;
|
||||
if (total_phys_segments > queue_max_segments(q))
|
||||
if (total_phys_segments > blk_rq_get_max_segments(req))
|
||||
return 0;
|
||||
|
||||
if (blk_integrity_merge_rq(q, req, next) == false)
|
||||
|
|
|
|||
|
|
@ -77,6 +77,15 @@ void blk_mq_sched_restart(struct blk_mq_hw_ctx *hctx)
|
|||
return;
|
||||
clear_bit(BLK_MQ_S_SCHED_RESTART, &hctx->state);
|
||||
|
||||
/*
|
||||
* Order clearing SCHED_RESTART and list_empty_careful(&hctx->dispatch)
|
||||
* in blk_mq_run_hw_queue(). Its pair is the barrier in
|
||||
* blk_mq_dispatch_rq_list(). So dispatch code won't see SCHED_RESTART,
|
||||
* meantime new request added to hctx->dispatch is missed to check in
|
||||
* blk_mq_run_hw_queue().
|
||||
*/
|
||||
smp_mb();
|
||||
|
||||
blk_mq_run_hw_queue(hctx, true);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1318,6 +1318,15 @@ bool blk_mq_dispatch_rq_list(struct request_queue *q, struct list_head *list,
|
|||
list_splice_tail_init(list, &hctx->dispatch);
|
||||
spin_unlock(&hctx->lock);
|
||||
|
||||
/*
|
||||
* Order adding requests to hctx->dispatch and checking
|
||||
* SCHED_RESTART flag. The pair of this smp_mb() is the one
|
||||
* in blk_mq_sched_restart(). Avoid restart code path to
|
||||
* miss the new added requests to hctx->dispatch, meantime
|
||||
* SCHED_RESTART is observed here.
|
||||
*/
|
||||
smp_mb();
|
||||
|
||||
/*
|
||||
* If SCHED_RESTART was set by the caller of this function and
|
||||
* it is no longer set that means that it was cleared by another
|
||||
|
|
@ -1869,7 +1878,8 @@ insert:
|
|||
if (bypass_insert)
|
||||
return BLK_STS_RESOURCE;
|
||||
|
||||
blk_mq_request_bypass_insert(rq, false, run_queue);
|
||||
blk_mq_sched_insert_request(rq, false, run_queue, false);
|
||||
|
||||
return BLK_STS_OK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/net.h>
|
||||
#include <linux/rwsem.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/sched/signal.h>
|
||||
#include <linux/security.h>
|
||||
|
||||
|
|
@ -847,9 +848,15 @@ int af_alg_sendmsg(struct socket *sock, struct msghdr *msg, size_t size,
|
|||
}
|
||||
|
||||
lock_sock(sk);
|
||||
if (ctx->init && (init || !ctx->more)) {
|
||||
err = -EINVAL;
|
||||
goto unlock;
|
||||
if (ctx->init && !ctx->more) {
|
||||
if (ctx->used) {
|
||||
err = -EINVAL;
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
pr_info_once(
|
||||
"%s sent an empty control message without MSG_MORE.\n",
|
||||
current->comm);
|
||||
}
|
||||
ctx->init = true;
|
||||
|
||||
|
|
|
|||
|
|
@ -4093,9 +4093,9 @@ static inline bool fwnode_is_primary(struct fwnode_handle *fwnode)
|
|||
*/
|
||||
void set_primary_fwnode(struct device *dev, struct fwnode_handle *fwnode)
|
||||
{
|
||||
if (fwnode) {
|
||||
struct fwnode_handle *fn = dev->fwnode;
|
||||
struct fwnode_handle *fn = dev->fwnode;
|
||||
|
||||
if (fwnode) {
|
||||
if (fwnode_is_primary(fn))
|
||||
fn = fn->secondary;
|
||||
|
||||
|
|
@ -4105,8 +4105,12 @@ void set_primary_fwnode(struct device *dev, struct fwnode_handle *fwnode)
|
|||
}
|
||||
dev->fwnode = fwnode;
|
||||
} else {
|
||||
dev->fwnode = fwnode_is_primary(dev->fwnode) ?
|
||||
dev->fwnode->secondary : NULL;
|
||||
if (fwnode_is_primary(fn)) {
|
||||
dev->fwnode = fn->secondary;
|
||||
fn->secondary = NULL;
|
||||
} else {
|
||||
dev->fwnode = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(set_primary_fwnode);
|
||||
|
|
|
|||
|
|
@ -1733,13 +1733,17 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
|
|||
}
|
||||
|
||||
/*
|
||||
* If a device configured to wake up the system from sleep states
|
||||
* has been suspended at run time and there's a resume request pending
|
||||
* for it, this is equivalent to the device signaling wakeup, so the
|
||||
* system suspend operation should be aborted.
|
||||
* Wait for possible runtime PM transitions of the device in progress
|
||||
* to complete and if there's a runtime resume request pending for it,
|
||||
* resume it before proceeding with invoking the system-wide suspend
|
||||
* callbacks for it.
|
||||
*
|
||||
* If the system-wide suspend callbacks below change the configuration
|
||||
* of the device, they must disable runtime PM for it or otherwise
|
||||
* ensure that its runtime-resume callbacks will not be confused by that
|
||||
* change in case they are invoked going forward.
|
||||
*/
|
||||
if (pm_runtime_barrier(dev) && device_may_wakeup(dev))
|
||||
pm_wakeup_event(dev, 0);
|
||||
pm_runtime_barrier(dev);
|
||||
|
||||
if (pm_wakeup_pending()) {
|
||||
dev->power.direct_complete = false;
|
||||
|
|
|
|||
|
|
@ -876,6 +876,7 @@ static void loop_config_discard(struct loop_device *lo)
|
|||
struct file *file = lo->lo_backing_file;
|
||||
struct inode *inode = file->f_mapping->host;
|
||||
struct request_queue *q = lo->lo_queue;
|
||||
u32 granularity, max_discard_sectors;
|
||||
|
||||
/*
|
||||
* If the backing device is a block device, mirror its zeroing
|
||||
|
|
@ -888,11 +889,10 @@ static void loop_config_discard(struct loop_device *lo)
|
|||
struct request_queue *backingq;
|
||||
|
||||
backingq = bdev_get_queue(inode->i_bdev);
|
||||
blk_queue_max_discard_sectors(q,
|
||||
backingq->limits.max_write_zeroes_sectors);
|
||||
|
||||
blk_queue_max_write_zeroes_sectors(q,
|
||||
backingq->limits.max_write_zeroes_sectors);
|
||||
max_discard_sectors = backingq->limits.max_write_zeroes_sectors;
|
||||
granularity = backingq->limits.discard_granularity ?:
|
||||
queue_physical_block_size(backingq);
|
||||
|
||||
/*
|
||||
* We use punch hole to reclaim the free space used by the
|
||||
|
|
@ -901,23 +901,26 @@ static void loop_config_discard(struct loop_device *lo)
|
|||
* useful information.
|
||||
*/
|
||||
} else if (!file->f_op->fallocate || lo->lo_encrypt_key_size) {
|
||||
q->limits.discard_granularity = 0;
|
||||
q->limits.discard_alignment = 0;
|
||||
blk_queue_max_discard_sectors(q, 0);
|
||||
blk_queue_max_write_zeroes_sectors(q, 0);
|
||||
max_discard_sectors = 0;
|
||||
granularity = 0;
|
||||
|
||||
} else {
|
||||
q->limits.discard_granularity = inode->i_sb->s_blocksize;
|
||||
q->limits.discard_alignment = 0;
|
||||
|
||||
blk_queue_max_discard_sectors(q, UINT_MAX >> 9);
|
||||
blk_queue_max_write_zeroes_sectors(q, UINT_MAX >> 9);
|
||||
max_discard_sectors = UINT_MAX >> 9;
|
||||
granularity = inode->i_sb->s_blocksize;
|
||||
}
|
||||
|
||||
if (q->limits.max_write_zeroes_sectors)
|
||||
if (max_discard_sectors) {
|
||||
q->limits.discard_granularity = granularity;
|
||||
blk_queue_max_discard_sectors(q, max_discard_sectors);
|
||||
blk_queue_max_write_zeroes_sectors(q, max_discard_sectors);
|
||||
blk_queue_flag_set(QUEUE_FLAG_DISCARD, q);
|
||||
else
|
||||
} else {
|
||||
q->limits.discard_granularity = 0;
|
||||
blk_queue_max_discard_sectors(q, 0);
|
||||
blk_queue_max_write_zeroes_sectors(q, 0);
|
||||
blk_queue_flag_clear(QUEUE_FLAG_DISCARD, q);
|
||||
}
|
||||
q->limits.discard_alignment = 0;
|
||||
}
|
||||
|
||||
static void loop_unprepare_queue(struct loop_device *lo)
|
||||
|
|
|
|||
|
|
@ -1096,7 +1096,7 @@ static int null_handle_rq(struct nullb_cmd *cmd)
|
|||
len = bvec.bv_len;
|
||||
err = null_transfer(nullb, bvec.bv_page, len, bvec.bv_offset,
|
||||
op_is_write(req_op(rq)), sector,
|
||||
req_op(rq) & REQ_FUA);
|
||||
rq->cmd_flags & REQ_FUA);
|
||||
if (err) {
|
||||
spin_unlock_irq(&nullb->lock);
|
||||
return err;
|
||||
|
|
|
|||
|
|
@ -205,16 +205,31 @@ static int virtblk_setup_discard_write_zeroes(struct request *req, bool unmap)
|
|||
if (!range)
|
||||
return -ENOMEM;
|
||||
|
||||
__rq_for_each_bio(bio, req) {
|
||||
u64 sector = bio->bi_iter.bi_sector;
|
||||
u32 num_sectors = bio->bi_iter.bi_size >> SECTOR_SHIFT;
|
||||
/*
|
||||
* Single max discard segment means multi-range discard isn't
|
||||
* supported, and block layer only runs contiguity merge like
|
||||
* normal RW request. So we can't reply on bio for retrieving
|
||||
* each range info.
|
||||
*/
|
||||
if (queue_max_discard_segments(req->q) == 1) {
|
||||
range[0].flags = cpu_to_le32(flags);
|
||||
range[0].num_sectors = cpu_to_le32(blk_rq_sectors(req));
|
||||
range[0].sector = cpu_to_le64(blk_rq_pos(req));
|
||||
n = 1;
|
||||
} else {
|
||||
__rq_for_each_bio(bio, req) {
|
||||
u64 sector = bio->bi_iter.bi_sector;
|
||||
u32 num_sectors = bio->bi_iter.bi_size >> SECTOR_SHIFT;
|
||||
|
||||
range[n].flags = cpu_to_le32(flags);
|
||||
range[n].num_sectors = cpu_to_le32(num_sectors);
|
||||
range[n].sector = cpu_to_le64(sector);
|
||||
n++;
|
||||
range[n].flags = cpu_to_le32(flags);
|
||||
range[n].num_sectors = cpu_to_le32(num_sectors);
|
||||
range[n].sector = cpu_to_le64(sector);
|
||||
n++;
|
||||
}
|
||||
}
|
||||
|
||||
WARN_ON_ONCE(n != segments);
|
||||
|
||||
req->special_vec.bv_page = virt_to_page(range);
|
||||
req->special_vec.bv_offset = offset_in_page(range);
|
||||
req->special_vec.bv_len = sizeof(*range) * segments;
|
||||
|
|
|
|||
|
|
@ -649,11 +649,12 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
|
|||
mutex_lock(&intel_pstate_limits_lock);
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
|
||||
u64 value;
|
||||
|
||||
ret = rdmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, &value);
|
||||
if (ret)
|
||||
goto return_pref;
|
||||
/*
|
||||
* Use the cached HWP Request MSR value, because the register
|
||||
* itself may be updated by intel_pstate_hwp_boost_up() or
|
||||
* intel_pstate_hwp_boost_down() at any time.
|
||||
*/
|
||||
u64 value = READ_ONCE(cpu_data->hwp_req_cached);
|
||||
|
||||
value &= ~GENMASK_ULL(31, 24);
|
||||
|
||||
|
|
@ -661,13 +662,18 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
|
|||
epp = epp_values[pref_index - 1];
|
||||
|
||||
value |= (u64)epp << 24;
|
||||
/*
|
||||
* The only other updater of hwp_req_cached in the active mode,
|
||||
* intel_pstate_hwp_set(), is called under the same lock as this
|
||||
* function, so it cannot run in parallel with the update below.
|
||||
*/
|
||||
WRITE_ONCE(cpu_data->hwp_req_cached, value);
|
||||
ret = wrmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, value);
|
||||
} else {
|
||||
if (epp == -EINVAL)
|
||||
epp = (pref_index - 1) << 2;
|
||||
ret = intel_pstate_set_epb(cpu_data->cpu, epp);
|
||||
}
|
||||
return_pref:
|
||||
mutex_unlock(&intel_pstate_limits_lock);
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -95,18 +95,20 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
|
|||
|
||||
mutex_lock(&dmcfreq->lock);
|
||||
|
||||
if (target_rate >= dmcfreq->odt_dis_freq)
|
||||
odt_enable = true;
|
||||
if (dmcfreq->regmap_pmu) {
|
||||
if (target_rate >= dmcfreq->odt_dis_freq)
|
||||
odt_enable = true;
|
||||
|
||||
/*
|
||||
* This makes a SMC call to the TF-A to set the DDR PD (power-down)
|
||||
* timings and to enable or disable the ODT (on-die termination)
|
||||
* resistors.
|
||||
*/
|
||||
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
|
||||
dmcfreq->odt_pd_arg1,
|
||||
ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
|
||||
odt_enable, 0, 0, 0, &res);
|
||||
/*
|
||||
* This makes a SMC call to the TF-A to set the DDR PD
|
||||
* (power-down) timings and to enable or disable the
|
||||
* ODT (on-die termination) resistors.
|
||||
*/
|
||||
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
|
||||
dmcfreq->odt_pd_arg1,
|
||||
ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
|
||||
odt_enable, 0, 0, 0, &res);
|
||||
}
|
||||
|
||||
/*
|
||||
* If frequency scaling from low to high, adjust voltage first.
|
||||
|
|
@ -364,16 +366,21 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
|
|||
if (res.a0) {
|
||||
dev_err(dev, "Failed to set dram param: %ld\n",
|
||||
res.a0);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto err_edev;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
node = of_parse_phandle(np, "rockchip,pmu", 0);
|
||||
if (node) {
|
||||
data->regmap_pmu = syscon_node_to_regmap(node);
|
||||
if (IS_ERR(data->regmap_pmu))
|
||||
return PTR_ERR(data->regmap_pmu);
|
||||
if (!node)
|
||||
goto no_pmu;
|
||||
|
||||
data->regmap_pmu = syscon_node_to_regmap(node);
|
||||
of_node_put(node);
|
||||
if (IS_ERR(data->regmap_pmu)) {
|
||||
ret = PTR_ERR(data->regmap_pmu);
|
||||
goto err_edev;
|
||||
}
|
||||
|
||||
regmap_read(data->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
|
||||
|
|
@ -391,9 +398,11 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
|
|||
data->odt_dis_freq = data->timing.lpddr4_odt_dis_freq;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto err_edev;
|
||||
};
|
||||
|
||||
no_pmu:
|
||||
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, 0, 0,
|
||||
ROCKCHIP_SIP_CONFIG_DRAM_INIT,
|
||||
0, 0, 0, 0, &res);
|
||||
|
|
@ -425,7 +434,8 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
|
|||
*/
|
||||
if (dev_pm_opp_of_add_table(dev)) {
|
||||
dev_err(dev, "Invalid operating-points in device tree.\n");
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto err_edev;
|
||||
}
|
||||
|
||||
of_property_read_u32(np, "upthreshold",
|
||||
|
|
@ -465,6 +475,9 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
|
|||
|
||||
err_free_opp:
|
||||
dev_pm_opp_of_remove_table(&pdev->dev);
|
||||
err_edev:
|
||||
devfreq_event_disable_edev(data->edev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1711,9 +1711,9 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,
|
|||
if (uncorrected_error) {
|
||||
core_err_cnt = 1;
|
||||
if (ripv)
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
else
|
||||
tp_event = HW_EVENT_ERR_UNCORRECTED;
|
||||
else
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
} else {
|
||||
tp_event = HW_EVENT_ERR_CORRECTED;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -170,6 +170,8 @@
|
|||
(n << (28 + (2 * skl) - PAGE_SHIFT))
|
||||
|
||||
static int nr_channels;
|
||||
static struct pci_dev *mci_pdev;
|
||||
static int ie31200_registered = 1;
|
||||
|
||||
struct ie31200_priv {
|
||||
void __iomem *window;
|
||||
|
|
@ -541,12 +543,16 @@ fail_free:
|
|||
static int ie31200_init_one(struct pci_dev *pdev,
|
||||
const struct pci_device_id *ent)
|
||||
{
|
||||
edac_dbg(0, "MC:\n");
|
||||
int rc;
|
||||
|
||||
edac_dbg(0, "MC:\n");
|
||||
if (pci_enable_device(pdev) < 0)
|
||||
return -EIO;
|
||||
rc = ie31200_probe1(pdev, ent->driver_data);
|
||||
if (rc == 0 && !mci_pdev)
|
||||
mci_pdev = pci_dev_get(pdev);
|
||||
|
||||
return ie31200_probe1(pdev, ent->driver_data);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void ie31200_remove_one(struct pci_dev *pdev)
|
||||
|
|
@ -555,6 +561,8 @@ static void ie31200_remove_one(struct pci_dev *pdev)
|
|||
struct ie31200_priv *priv;
|
||||
|
||||
edac_dbg(0, "\n");
|
||||
pci_dev_put(mci_pdev);
|
||||
mci_pdev = NULL;
|
||||
mci = edac_mc_del_mc(&pdev->dev);
|
||||
if (!mci)
|
||||
return;
|
||||
|
|
@ -596,17 +604,53 @@ static struct pci_driver ie31200_driver = {
|
|||
|
||||
static int __init ie31200_init(void)
|
||||
{
|
||||
int pci_rc, i;
|
||||
|
||||
edac_dbg(3, "MC:\n");
|
||||
/* Ensure that the OPSTATE is set correctly for POLL or NMI */
|
||||
opstate_init();
|
||||
|
||||
return pci_register_driver(&ie31200_driver);
|
||||
pci_rc = pci_register_driver(&ie31200_driver);
|
||||
if (pci_rc < 0)
|
||||
goto fail0;
|
||||
|
||||
if (!mci_pdev) {
|
||||
ie31200_registered = 0;
|
||||
for (i = 0; ie31200_pci_tbl[i].vendor != 0; i++) {
|
||||
mci_pdev = pci_get_device(ie31200_pci_tbl[i].vendor,
|
||||
ie31200_pci_tbl[i].device,
|
||||
NULL);
|
||||
if (mci_pdev)
|
||||
break;
|
||||
}
|
||||
if (!mci_pdev) {
|
||||
edac_dbg(0, "ie31200 pci_get_device fail\n");
|
||||
pci_rc = -ENODEV;
|
||||
goto fail1;
|
||||
}
|
||||
pci_rc = ie31200_init_one(mci_pdev, &ie31200_pci_tbl[i]);
|
||||
if (pci_rc < 0) {
|
||||
edac_dbg(0, "ie31200 init fail\n");
|
||||
pci_rc = -ENODEV;
|
||||
goto fail1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
fail1:
|
||||
pci_unregister_driver(&ie31200_driver);
|
||||
fail0:
|
||||
pci_dev_put(mci_pdev);
|
||||
|
||||
return pci_rc;
|
||||
}
|
||||
|
||||
static void __exit ie31200_exit(void)
|
||||
{
|
||||
edac_dbg(3, "MC:\n");
|
||||
pci_unregister_driver(&ie31200_driver);
|
||||
if (!ie31200_registered)
|
||||
ie31200_remove_one(mci_pdev);
|
||||
}
|
||||
|
||||
module_init(ie31200_init);
|
||||
|
|
|
|||
|
|
@ -1155,7 +1155,7 @@ static void pnd2_mce_output_error(struct mem_ctl_info *mci, const struct mce *m,
|
|||
u32 optypenum = GET_BITFIELD(m->status, 4, 6);
|
||||
int rc;
|
||||
|
||||
tp_event = uc_err ? (ripv ? HW_EVENT_ERR_FATAL : HW_EVENT_ERR_UNCORRECTED) :
|
||||
tp_event = uc_err ? (ripv ? HW_EVENT_ERR_UNCORRECTED : HW_EVENT_ERR_FATAL) :
|
||||
HW_EVENT_ERR_CORRECTED;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -254,18 +254,20 @@ static const u32 rir_offset[MAX_RIR_RANGES][MAX_RIR_WAY] = {
|
|||
* FIXME: Implement the error count reads directly
|
||||
*/
|
||||
|
||||
static const u32 correrrcnt[] = {
|
||||
0x104, 0x108, 0x10c, 0x110,
|
||||
};
|
||||
|
||||
#define RANK_ODD_OV(reg) GET_BITFIELD(reg, 31, 31)
|
||||
#define RANK_ODD_ERR_CNT(reg) GET_BITFIELD(reg, 16, 30)
|
||||
#define RANK_EVEN_OV(reg) GET_BITFIELD(reg, 15, 15)
|
||||
#define RANK_EVEN_ERR_CNT(reg) GET_BITFIELD(reg, 0, 14)
|
||||
|
||||
#if 0 /* Currently unused*/
|
||||
static const u32 correrrcnt[] = {
|
||||
0x104, 0x108, 0x10c, 0x110,
|
||||
};
|
||||
|
||||
static const u32 correrrthrsld[] = {
|
||||
0x11c, 0x120, 0x124, 0x128,
|
||||
};
|
||||
#endif
|
||||
|
||||
#define RANK_ODD_ERR_THRSLD(reg) GET_BITFIELD(reg, 16, 30)
|
||||
#define RANK_EVEN_ERR_THRSLD(reg) GET_BITFIELD(reg, 0, 14)
|
||||
|
|
@ -1340,7 +1342,7 @@ static void knl_show_mc_route(u32 reg, char *s)
|
|||
*/
|
||||
static int knl_get_dimm_capacity(struct sbridge_pvt *pvt, u64 *mc_sizes)
|
||||
{
|
||||
u64 sad_base, sad_size, sad_limit = 0;
|
||||
u64 sad_base, sad_limit = 0;
|
||||
u64 tad_base, tad_size, tad_limit, tad_deadspace, tad_livespace;
|
||||
int sad_rule = 0;
|
||||
int tad_rule = 0;
|
||||
|
|
@ -1427,7 +1429,6 @@ static int knl_get_dimm_capacity(struct sbridge_pvt *pvt, u64 *mc_sizes)
|
|||
edram_only = KNL_EDRAM_ONLY(dram_rule);
|
||||
|
||||
sad_limit = pvt->info.sad_limit(dram_rule)+1;
|
||||
sad_size = sad_limit - sad_base;
|
||||
|
||||
pci_read_config_dword(pvt->pci_sad0,
|
||||
pvt->info.interleave_list[sad_rule], &interleave_reg);
|
||||
|
|
@ -2952,7 +2953,7 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
|
|||
struct mem_ctl_info *new_mci;
|
||||
struct sbridge_pvt *pvt = mci->pvt_info;
|
||||
enum hw_event_mc_err_type tp_event;
|
||||
char *type, *optype, msg[256];
|
||||
char *optype, msg[256];
|
||||
bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0);
|
||||
bool overflow = GET_BITFIELD(m->status, 62, 62);
|
||||
bool uncorrected_error = GET_BITFIELD(m->status, 61, 61);
|
||||
|
|
@ -2981,14 +2982,11 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
|
|||
if (uncorrected_error) {
|
||||
core_err_cnt = 1;
|
||||
if (ripv) {
|
||||
type = "FATAL";
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
} else {
|
||||
type = "NON_FATAL";
|
||||
tp_event = HW_EVENT_ERR_UNCORRECTED;
|
||||
} else {
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
}
|
||||
} else {
|
||||
type = "CORRECTED";
|
||||
tp_event = HW_EVENT_ERR_CORRECTED;
|
||||
}
|
||||
|
||||
|
|
@ -3200,7 +3198,6 @@ static struct notifier_block sbridge_mce_dec = {
|
|||
static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)
|
||||
{
|
||||
struct mem_ctl_info *mci = sbridge_dev->mci;
|
||||
struct sbridge_pvt *pvt;
|
||||
|
||||
if (unlikely(!mci || !mci->pvt_info)) {
|
||||
edac_dbg(0, "MC: dev = %p\n", &sbridge_dev->pdev[0]->dev);
|
||||
|
|
@ -3209,8 +3206,6 @@ static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)
|
|||
return;
|
||||
}
|
||||
|
||||
pvt = mci->pvt_info;
|
||||
|
||||
edac_dbg(0, "MC: mci = %p, dev = %p\n",
|
||||
mci, &sbridge_dev->pdev[0]->dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -475,7 +475,7 @@ static void skx_mce_output_error(struct mem_ctl_info *mci,
|
|||
struct decoded_addr *res)
|
||||
{
|
||||
enum hw_event_mc_err_type tp_event;
|
||||
char *type, *optype;
|
||||
char *optype;
|
||||
bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0);
|
||||
bool overflow = GET_BITFIELD(m->status, 62, 62);
|
||||
bool uncorrected_error = GET_BITFIELD(m->status, 61, 61);
|
||||
|
|
@ -490,14 +490,11 @@ static void skx_mce_output_error(struct mem_ctl_info *mci,
|
|||
if (uncorrected_error) {
|
||||
core_err_cnt = 1;
|
||||
if (ripv) {
|
||||
type = "FATAL";
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
} else {
|
||||
type = "NON_FATAL";
|
||||
tp_event = HW_EVENT_ERR_UNCORRECTED;
|
||||
} else {
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
}
|
||||
} else {
|
||||
type = "CORRECTED";
|
||||
tp_event = HW_EVENT_ERR_CORRECTED;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -719,8 +719,10 @@ amdgpu_connector_lvds_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
if (encoder) {
|
||||
|
|
@ -857,8 +859,10 @@ amdgpu_connector_vga_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
encoder = amdgpu_connector_best_single_encoder(connector);
|
||||
|
|
@ -980,8 +984,10 @@ amdgpu_connector_dvi_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) {
|
||||
|
|
@ -1330,8 +1336,10 @@ amdgpu_connector_dp_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) {
|
||||
|
|
|
|||
|
|
@ -282,7 +282,7 @@ int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
|
|||
|
||||
ret = pm_runtime_get_sync(dev->dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
ret = drm_crtc_helper_set_config(set, ctx);
|
||||
|
||||
|
|
@ -297,7 +297,7 @@ int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
|
|||
take the current one */
|
||||
if (active && !adev->have_disp_power_ref) {
|
||||
adev->have_disp_power_ref = true;
|
||||
return ret;
|
||||
goto out;
|
||||
}
|
||||
/* if we have no active crtcs, then drop the power ref
|
||||
we got before */
|
||||
|
|
@ -306,6 +306,7 @@ int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
|
|||
adev->have_disp_power_ref = false;
|
||||
}
|
||||
|
||||
out:
|
||||
/* drop the power reference we got coming in here */
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -1286,11 +1286,12 @@ long amdgpu_drm_ioctl(struct file *filp,
|
|||
dev = file_priv->minor->dev;
|
||||
ret = pm_runtime_get_sync(dev->dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
ret = drm_ioctl(filp, cmd, arg);
|
||||
|
||||
pm_runtime_mark_last_busy(dev->dev);
|
||||
out:
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -638,8 +638,12 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
* in the bitfields */
|
||||
if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK)
|
||||
se_num = 0xffffffff;
|
||||
else if (se_num >= AMDGPU_GFX_MAX_SE)
|
||||
return -EINVAL;
|
||||
if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK)
|
||||
sh_num = 0xffffffff;
|
||||
else if (sh_num >= AMDGPU_GFX_MAX_SH_PER_SE)
|
||||
return -EINVAL;
|
||||
|
||||
if (info->read_mmr_reg.count > 128)
|
||||
return -EINVAL;
|
||||
|
|
@ -976,7 +980,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
|
|||
|
||||
r = pm_runtime_get_sync(dev->dev);
|
||||
if (r < 0)
|
||||
return r;
|
||||
goto pm_put;
|
||||
|
||||
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
|
||||
if (unlikely(!fpriv)) {
|
||||
|
|
@ -1027,6 +1031,7 @@ error_pasid:
|
|||
|
||||
out_suspend:
|
||||
pm_runtime_mark_last_busy(dev->dev);
|
||||
pm_put:
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
|
||||
return r;
|
||||
|
|
|
|||
|
|
@ -4094,10 +4094,8 @@ static void gfx_v10_0_update_medium_grain_clock_gating(struct amdgpu_device *ade
|
|||
def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);
|
||||
data &= ~(RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK |
|
||||
RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK |
|
||||
RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK);
|
||||
|
||||
/* only for Vega10 & Raven1 */
|
||||
data |= RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK;
|
||||
RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK |
|
||||
RLC_CGTT_MGCG_OVERRIDE__ENABLE_CGTS_LEGACY_MASK);
|
||||
|
||||
if (def != data)
|
||||
WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);
|
||||
|
|
|
|||
|
|
@ -612,8 +612,10 @@ static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev,
|
|||
|
||||
ret = kobject_init_and_add(dev->kobj_node, &node_type,
|
||||
sys_props.kobj_nodes, "%d", id);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
kobject_put(dev->kobj_node);
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node);
|
||||
if (!dev->kobj_mem)
|
||||
|
|
@ -660,8 +662,10 @@ static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev,
|
|||
return -ENOMEM;
|
||||
ret = kobject_init_and_add(mem->kobj, &mem_type,
|
||||
dev->kobj_mem, "%d", i);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
kobject_put(mem->kobj);
|
||||
return ret;
|
||||
}
|
||||
|
||||
mem->attr.name = "properties";
|
||||
mem->attr.mode = KFD_SYSFS_FILE_MODE;
|
||||
|
|
@ -679,8 +683,10 @@ static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev,
|
|||
return -ENOMEM;
|
||||
ret = kobject_init_and_add(cache->kobj, &cache_type,
|
||||
dev->kobj_cache, "%d", i);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
kobject_put(cache->kobj);
|
||||
return ret;
|
||||
}
|
||||
|
||||
cache->attr.name = "properties";
|
||||
cache->attr.mode = KFD_SYSFS_FILE_MODE;
|
||||
|
|
@ -698,8 +704,10 @@ static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev,
|
|||
return -ENOMEM;
|
||||
ret = kobject_init_and_add(iolink->kobj, &iolink_type,
|
||||
dev->kobj_iolink, "%d", i);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
kobject_put(iolink->kobj);
|
||||
return ret;
|
||||
}
|
||||
|
||||
iolink->attr.name = "properties";
|
||||
iolink->attr.mode = KFD_SYSFS_FILE_MODE;
|
||||
|
|
@ -779,8 +787,10 @@ static int kfd_topology_update_sysfs(void)
|
|||
ret = kobject_init_and_add(sys_props.kobj_topology,
|
||||
&sysprops_type, &kfd_device->kobj,
|
||||
"topology");
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
kobject_put(sys_props.kobj_topology);
|
||||
return ret;
|
||||
}
|
||||
|
||||
sys_props.kobj_nodes = kobject_create_and_add("nodes",
|
||||
sys_props.kobj_topology);
|
||||
|
|
|
|||
|
|
@ -7229,6 +7229,30 @@ cleanup:
|
|||
*out_type = update_type;
|
||||
return ret;
|
||||
}
|
||||
#if defined(CONFIG_DRM_AMD_DC_DCN)
|
||||
static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm_crtc *crtc)
|
||||
{
|
||||
struct drm_connector *connector;
|
||||
struct drm_connector_state *conn_state;
|
||||
struct amdgpu_dm_connector *aconnector = NULL;
|
||||
int i;
|
||||
for_each_new_connector_in_state(state, connector, conn_state, i) {
|
||||
if (conn_state->crtc != crtc)
|
||||
continue;
|
||||
|
||||
aconnector = to_amdgpu_dm_connector(connector);
|
||||
if (!aconnector->port || !aconnector->mst_port)
|
||||
aconnector = NULL;
|
||||
else
|
||||
break;
|
||||
}
|
||||
|
||||
if (!aconnector)
|
||||
return 0;
|
||||
|
||||
return drm_dp_mst_add_affected_dsc_crtcs(state, &aconnector->mst_port->mst_mgr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM.
|
||||
|
|
@ -7282,6 +7306,40 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
|
|||
if (ret)
|
||||
goto fail;
|
||||
|
||||
/* Check connector changes */
|
||||
for_each_oldnew_connector_in_state(state, connector, old_con_state, new_con_state, i) {
|
||||
struct dm_connector_state *dm_old_con_state = to_dm_connector_state(old_con_state);
|
||||
struct dm_connector_state *dm_new_con_state = to_dm_connector_state(new_con_state);
|
||||
|
||||
/* Skip connectors that are disabled or part of modeset already. */
|
||||
if (!old_con_state->crtc && !new_con_state->crtc)
|
||||
continue;
|
||||
|
||||
if (!new_con_state->crtc)
|
||||
continue;
|
||||
|
||||
new_crtc_state = drm_atomic_get_crtc_state(state, new_con_state->crtc);
|
||||
if (IS_ERR(new_crtc_state)) {
|
||||
ret = PTR_ERR(new_crtc_state);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
if (dm_old_con_state->abm_level !=
|
||||
dm_new_con_state->abm_level)
|
||||
new_crtc_state->connectors_changed = true;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DRM_AMD_DC_DCN)
|
||||
if (adev->asic_type >= CHIP_NAVI10) {
|
||||
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
|
||||
if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
|
||||
ret = add_affected_mst_dsc_crtcs(state, crtc);
|
||||
if (ret)
|
||||
goto fail;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
|
||||
if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&
|
||||
!new_crtc_state->color_mgmt_changed &&
|
||||
|
|
|
|||
|
|
@ -121,35 +121,35 @@ void enc1_update_generic_info_packet(
|
|||
switch (packet_index) {
|
||||
case 0:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC0_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC0_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 1:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC1_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC1_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 2:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC2_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC2_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 3:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC3_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC3_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 4:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC4_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC4_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 5:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC5_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC5_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 6:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC6_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC6_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
case 7:
|
||||
REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
|
||||
AFMT_GENERIC7_FRAME_UPDATE, 1);
|
||||
AFMT_GENERIC7_IMMEDIATE_UPDATE, 1);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -275,7 +275,14 @@ struct dcn10_stream_enc_registers {
|
|||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_FRAME_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_FRAME_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_FRAME_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC0_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC1_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_IMMEDIATE_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_FRAME_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_FRAME_UPDATE, mask_sh),\
|
||||
SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_FRAME_UPDATE, mask_sh),\
|
||||
|
|
@ -339,7 +346,14 @@ struct dcn10_stream_enc_registers {
|
|||
type AFMT_GENERIC2_FRAME_UPDATE;\
|
||||
type AFMT_GENERIC3_FRAME_UPDATE;\
|
||||
type AFMT_GENERIC4_FRAME_UPDATE;\
|
||||
type AFMT_GENERIC0_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC1_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC2_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC3_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC4_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC5_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC6_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC7_IMMEDIATE_UPDATE;\
|
||||
type AFMT_GENERIC5_FRAME_UPDATE;\
|
||||
type AFMT_GENERIC6_FRAME_UPDATE;\
|
||||
type AFMT_GENERIC7_FRAME_UPDATE;\
|
||||
|
|
|
|||
|
|
@ -209,8 +209,7 @@ static int smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clo
|
|||
{
|
||||
struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
|
||||
|
||||
if (smu10_data->need_min_deep_sleep_dcefclk &&
|
||||
smu10_data->deep_sleep_dcefclk != clock) {
|
||||
if (clock && smu10_data->deep_sleep_dcefclk != clock) {
|
||||
smu10_data->deep_sleep_dcefclk = clock;
|
||||
smum_send_msg_to_smc_with_parameter(hwmgr,
|
||||
PPSMC_MSG_SetMinDeepSleepDcefclk,
|
||||
|
|
@ -223,8 +222,7 @@ static int smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t c
|
|||
{
|
||||
struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
|
||||
|
||||
if (smu10_data->dcf_actual_hard_min_freq &&
|
||||
smu10_data->dcf_actual_hard_min_freq != clock) {
|
||||
if (clock && smu10_data->dcf_actual_hard_min_freq != clock) {
|
||||
smu10_data->dcf_actual_hard_min_freq = clock;
|
||||
smum_send_msg_to_smc_with_parameter(hwmgr,
|
||||
PPSMC_MSG_SetHardMinDcefclkByFreq,
|
||||
|
|
@ -237,8 +235,7 @@ static int smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t cloc
|
|||
{
|
||||
struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
|
||||
|
||||
if (smu10_data->f_actual_hard_min_freq &&
|
||||
smu10_data->f_actual_hard_min_freq != clock) {
|
||||
if (clock && smu10_data->f_actual_hard_min_freq != clock) {
|
||||
smu10_data->f_actual_hard_min_freq = clock;
|
||||
smum_send_msg_to_smc_with_parameter(hwmgr,
|
||||
PPSMC_MSG_SetHardMinFclkByFreq,
|
||||
|
|
|
|||
|
|
@ -364,17 +364,19 @@ int vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr)
|
|||
static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
|
||||
struct PP_TemperatureRange *range)
|
||||
{
|
||||
struct phm_ppt_v2_information *pp_table_info =
|
||||
(struct phm_ppt_v2_information *)(hwmgr->pptable);
|
||||
struct phm_tdp_table *tdp_table = pp_table_info->tdp_table;
|
||||
struct amdgpu_device *adev = hwmgr->adev;
|
||||
int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP *
|
||||
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP *
|
||||
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP;
|
||||
int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP;
|
||||
uint32_t val;
|
||||
|
||||
if (low < range->min)
|
||||
low = range->min;
|
||||
if (high > range->max)
|
||||
high = range->max;
|
||||
/* compare them in unit celsius degree */
|
||||
if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
|
||||
low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
if (high > tdp_table->usSoftwareShutdownTemp)
|
||||
high = tdp_table->usSoftwareShutdownTemp;
|
||||
|
||||
if (low > high)
|
||||
return -EINVAL;
|
||||
|
|
@ -383,8 +385,8 @@ static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
|
|||
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
|
||||
val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) &
|
||||
(~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK) &
|
||||
(~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK);
|
||||
|
|
|
|||
|
|
@ -170,17 +170,18 @@ int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr)
|
|||
static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
|
||||
struct PP_TemperatureRange *range)
|
||||
{
|
||||
struct phm_ppt_v3_information *pptable_information =
|
||||
(struct phm_ppt_v3_information *)hwmgr->pptable;
|
||||
struct amdgpu_device *adev = hwmgr->adev;
|
||||
int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
|
||||
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
|
||||
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP;
|
||||
int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP;
|
||||
uint32_t val;
|
||||
|
||||
if (low < range->min)
|
||||
low = range->min;
|
||||
if (high > range->max)
|
||||
high = range->max;
|
||||
/* compare them in unit celsius degree */
|
||||
if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
|
||||
low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
if (high > pptable_information->us_software_shutdown_temp)
|
||||
high = pptable_information->us_software_shutdown_temp;
|
||||
|
||||
if (low > high)
|
||||
return -EINVAL;
|
||||
|
|
@ -189,8 +190,8 @@ static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
|
|||
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
|
||||
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
|
||||
val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
|
||||
|
||||
WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
|
||||
|
|
|
|||
|
|
@ -981,27 +981,15 @@ static int vega20_disable_all_smu_features(struct pp_hwmgr *hwmgr)
|
|||
{
|
||||
struct vega20_hwmgr *data =
|
||||
(struct vega20_hwmgr *)(hwmgr->backend);
|
||||
uint64_t features_enabled;
|
||||
int i;
|
||||
bool enabled;
|
||||
int ret = 0;
|
||||
int i, ret = 0;
|
||||
|
||||
PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr,
|
||||
PPSMC_MSG_DisableAllSmuFeatures)) == 0,
|
||||
"[DisableAllSMUFeatures] Failed to disable all smu features!",
|
||||
return ret);
|
||||
|
||||
ret = vega20_get_enabled_smc_features(hwmgr, &features_enabled);
|
||||
PP_ASSERT_WITH_CODE(!ret,
|
||||
"[DisableAllSMUFeatures] Failed to get enabled smc features!",
|
||||
return ret);
|
||||
|
||||
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
|
||||
enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ?
|
||||
true : false;
|
||||
data->smu_features[i].enabled = enabled;
|
||||
data->smu_features[i].supported = enabled;
|
||||
}
|
||||
for (i = 0; i < GNLD_FEATURES_MAX; i++)
|
||||
data->smu_features[i].enabled = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1652,12 +1640,6 @@ static void vega20_init_powergate_state(struct pp_hwmgr *hwmgr)
|
|||
|
||||
data->uvd_power_gated = true;
|
||||
data->vce_power_gated = true;
|
||||
|
||||
if (data->smu_features[GNLD_DPM_UVD].enabled)
|
||||
data->uvd_power_gated = false;
|
||||
|
||||
if (data->smu_features[GNLD_DPM_VCE].enabled)
|
||||
data->vce_power_gated = false;
|
||||
}
|
||||
|
||||
static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
|
||||
|
|
@ -3211,10 +3193,11 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)
|
|||
|
||||
static int vega20_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfeature_masks)
|
||||
{
|
||||
uint64_t features_enabled;
|
||||
uint64_t features_to_enable;
|
||||
uint64_t features_to_disable;
|
||||
int ret = 0;
|
||||
struct vega20_hwmgr *data =
|
||||
(struct vega20_hwmgr *)(hwmgr->backend);
|
||||
uint64_t features_enabled, features_to_enable, features_to_disable;
|
||||
int i, ret = 0;
|
||||
bool enabled;
|
||||
|
||||
if (new_ppfeature_masks >= (1ULL << GNLD_FEATURES_MAX))
|
||||
return -EINVAL;
|
||||
|
|
@ -3243,6 +3226,17 @@ static int vega20_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfe
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* Update the cached feature enablement state */
|
||||
ret = vega20_get_enabled_smc_features(hwmgr, &features_enabled);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
|
||||
enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ?
|
||||
true : false;
|
||||
data->smu_features[i].enabled = enabled;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -240,17 +240,18 @@ int vega20_thermal_get_temperature(struct pp_hwmgr *hwmgr)
|
|||
static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
|
||||
struct PP_TemperatureRange *range)
|
||||
{
|
||||
struct phm_ppt_v3_information *pptable_information =
|
||||
(struct phm_ppt_v3_information *)hwmgr->pptable;
|
||||
struct amdgpu_device *adev = hwmgr->adev;
|
||||
int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP *
|
||||
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP *
|
||||
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP;
|
||||
int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP;
|
||||
uint32_t val;
|
||||
|
||||
if (low < range->min)
|
||||
low = range->min;
|
||||
if (high > range->max)
|
||||
high = range->max;
|
||||
/* compare them in unit celsius degree */
|
||||
if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
|
||||
low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
|
||||
if (high > pptable_information->us_software_shutdown_temp)
|
||||
high = pptable_information->us_software_shutdown_temp;
|
||||
|
||||
if (low > high)
|
||||
return -EINVAL;
|
||||
|
|
@ -259,8 +260,8 @@ static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
|
|||
|
||||
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
|
||||
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
|
||||
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
|
||||
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
|
||||
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
|
||||
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
|
||||
val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
|
||||
|
||||
WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
|
||||
|
|
|
|||
|
|
@ -1207,6 +1207,12 @@ static u32 *copy_batch(struct drm_i915_gem_object *dst_obj,
|
|||
return dst;
|
||||
}
|
||||
|
||||
static inline bool cmd_desc_is(const struct drm_i915_cmd_descriptor * const desc,
|
||||
const u32 cmd)
|
||||
{
|
||||
return desc->cmd.value == (cmd & desc->cmd.mask);
|
||||
}
|
||||
|
||||
static bool check_cmd(const struct intel_engine_cs *engine,
|
||||
const struct drm_i915_cmd_descriptor *desc,
|
||||
const u32 *cmd, u32 length)
|
||||
|
|
@ -1245,19 +1251,19 @@ static bool check_cmd(const struct intel_engine_cs *engine,
|
|||
* allowed mask/value pair given in the whitelist entry.
|
||||
*/
|
||||
if (reg->mask) {
|
||||
if (desc->cmd.value == MI_LOAD_REGISTER_MEM) {
|
||||
if (cmd_desc_is(desc, MI_LOAD_REGISTER_MEM)) {
|
||||
DRM_DEBUG_DRIVER("CMD: Rejected LRM to masked register 0x%08X\n",
|
||||
reg_addr);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (desc->cmd.value == MI_LOAD_REGISTER_REG) {
|
||||
if (cmd_desc_is(desc, MI_LOAD_REGISTER_REG)) {
|
||||
DRM_DEBUG_DRIVER("CMD: Rejected LRR to masked register 0x%08X\n",
|
||||
reg_addr);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1) &&
|
||||
if (cmd_desc_is(desc, MI_LOAD_REGISTER_IMM(1)) &&
|
||||
(offset + 2 > length ||
|
||||
(cmd[offset + 1] & reg->mask) != reg->value)) {
|
||||
DRM_DEBUG_DRIVER("CMD: Rejected LRI to masked register 0x%08X\n",
|
||||
|
|
@ -1488,7 +1494,7 @@ int intel_engine_cmd_parser(struct i915_gem_context *ctx,
|
|||
goto err;
|
||||
}
|
||||
|
||||
if (desc->cmd.value == MI_BATCH_BUFFER_START) {
|
||||
if (cmd_desc_is(desc, MI_BATCH_BUFFER_START)) {
|
||||
ret = check_bbstart(ctx, cmd, offset, length,
|
||||
batch_len, batch_start,
|
||||
shadow_batch_start);
|
||||
|
|
|
|||
|
|
@ -375,9 +375,9 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
|
|||
|
||||
if (state && state->fb) {
|
||||
addr = drm_fb_cma_get_gem_addr(state->fb, state, 0);
|
||||
width = state->crtc->state->adjusted_mode.hdisplay;
|
||||
height = state->crtc->state->adjusted_mode.vdisplay;
|
||||
cpp = state->fb->format->cpp[plane->index];
|
||||
width = state->src_w >> 16;
|
||||
height = state->src_h >> 16;
|
||||
cpp = state->fb->format->cpp[0];
|
||||
|
||||
priv->dma_hwdesc->addr = addr;
|
||||
priv->dma_hwdesc->cmd = width * height * cpp / 4;
|
||||
|
|
|
|||
|
|
@ -350,7 +350,7 @@ int adreno_hw_init(struct msm_gpu *gpu)
|
|||
ring->next = ring->start;
|
||||
|
||||
/* reset completed fence seqno: */
|
||||
ring->memptrs->fence = ring->seqno;
|
||||
ring->memptrs->fence = ring->fctx->completed_fence;
|
||||
ring->memptrs->rptr = 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2032,8 +2032,10 @@ nv50_disp_atomic_commit(struct drm_device *dev,
|
|||
int ret, i;
|
||||
|
||||
ret = pm_runtime_get_sync(dev->dev);
|
||||
if (ret < 0 && ret != -EACCES)
|
||||
if (ret < 0 && ret != -EACCES) {
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = drm_atomic_helper_setup_commit(state, nonblock);
|
||||
if (ret)
|
||||
|
|
|
|||
|
|
@ -568,8 +568,10 @@ nouveau_connector_detect(struct drm_connector *connector, bool force)
|
|||
pm_runtime_get_noresume(dev->dev);
|
||||
} else {
|
||||
ret = pm_runtime_get_sync(dev->dev);
|
||||
if (ret < 0 && ret != -EACCES)
|
||||
if (ret < 0 && ret != -EACCES) {
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
return conn_status;
|
||||
}
|
||||
}
|
||||
|
||||
nv_encoder = nouveau_connector_ddc_detect(connector);
|
||||
|
|
|
|||
|
|
@ -189,8 +189,10 @@ nouveau_fbcon_open(struct fb_info *info, int user)
|
|||
struct nouveau_fbdev *fbcon = info->par;
|
||||
struct nouveau_drm *drm = nouveau_drm(fbcon->helper.dev);
|
||||
int ret = pm_runtime_get_sync(drm->dev->dev);
|
||||
if (ret < 0 && ret != -EACCES)
|
||||
if (ret < 0 && ret != -EACCES) {
|
||||
pm_runtime_put(drm->dev->dev);
|
||||
return ret;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -883,8 +883,10 @@ radeon_lvds_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
if (encoder) {
|
||||
|
|
@ -1029,8 +1031,10 @@ radeon_vga_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
encoder = radeon_best_single_encoder(connector);
|
||||
|
|
@ -1167,8 +1171,10 @@ radeon_tv_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
encoder = radeon_best_single_encoder(connector);
|
||||
|
|
@ -1251,8 +1257,10 @@ radeon_dvi_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
if (radeon_connector->detected_hpd_without_ddc) {
|
||||
|
|
@ -1666,8 +1674,10 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
|
|||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
r = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (r < 0)
|
||||
if (r < 0) {
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
}
|
||||
|
||||
if (!force && radeon_check_hpd_status_unchanged(connector)) {
|
||||
|
|
|
|||
|
|
@ -400,7 +400,7 @@ static int xen_drm_drv_dumb_create(struct drm_file *filp,
|
|||
args->size = args->pitch * args->height;
|
||||
|
||||
obj = xen_drm_front_gem_create(dev, args->size);
|
||||
if (IS_ERR_OR_NULL(obj)) {
|
||||
if (IS_ERR(obj)) {
|
||||
ret = PTR_ERR(obj);
|
||||
goto fail;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@ static struct xen_gem_object *gem_create(struct drm_device *dev, size_t size)
|
|||
|
||||
size = round_up(size, PAGE_SIZE);
|
||||
xen_obj = gem_create_obj(dev, size);
|
||||
if (IS_ERR_OR_NULL(xen_obj))
|
||||
if (IS_ERR(xen_obj))
|
||||
return xen_obj;
|
||||
|
||||
if (drm_info->front_info->cfg.be_alloc) {
|
||||
|
|
@ -117,7 +117,7 @@ static struct xen_gem_object *gem_create(struct drm_device *dev, size_t size)
|
|||
*/
|
||||
xen_obj->num_pages = DIV_ROUND_UP(size, PAGE_SIZE);
|
||||
xen_obj->pages = drm_gem_get_pages(&xen_obj->base);
|
||||
if (IS_ERR_OR_NULL(xen_obj->pages)) {
|
||||
if (IS_ERR(xen_obj->pages)) {
|
||||
ret = PTR_ERR(xen_obj->pages);
|
||||
xen_obj->pages = NULL;
|
||||
goto fail;
|
||||
|
|
@ -136,7 +136,7 @@ struct drm_gem_object *xen_drm_front_gem_create(struct drm_device *dev,
|
|||
struct xen_gem_object *xen_obj;
|
||||
|
||||
xen_obj = gem_create(dev, size);
|
||||
if (IS_ERR_OR_NULL(xen_obj))
|
||||
if (IS_ERR(xen_obj))
|
||||
return ERR_CAST(xen_obj);
|
||||
|
||||
return &xen_obj->base;
|
||||
|
|
@ -194,7 +194,7 @@ xen_drm_front_gem_import_sg_table(struct drm_device *dev,
|
|||
|
||||
size = attach->dmabuf->size;
|
||||
xen_obj = gem_create_obj(dev, size);
|
||||
if (IS_ERR_OR_NULL(xen_obj))
|
||||
if (IS_ERR(xen_obj))
|
||||
return ERR_CAST(xen_obj);
|
||||
|
||||
ret = gem_alloc_pages_array(xen_obj, size);
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ fb_create(struct drm_device *dev, struct drm_file *filp,
|
|||
int ret;
|
||||
|
||||
fb = drm_gem_fb_create_with_funcs(dev, filp, mode_cmd, &fb_funcs);
|
||||
if (IS_ERR_OR_NULL(fb))
|
||||
if (IS_ERR(fb))
|
||||
return fb;
|
||||
|
||||
gem_obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
|
||||
|
|
|
|||
|
|
@ -771,6 +771,7 @@
|
|||
#define USB_DEVICE_ID_LOGITECH_G27_WHEEL 0xc29b
|
||||
#define USB_DEVICE_ID_LOGITECH_WII_WHEEL 0xc29c
|
||||
#define USB_DEVICE_ID_LOGITECH_ELITE_KBD 0xc30a
|
||||
#define USB_DEVICE_ID_LOGITECH_GROUP_AUDIO 0x0882
|
||||
#define USB_DEVICE_ID_S510_RECEIVER 0xc50c
|
||||
#define USB_DEVICE_ID_S510_RECEIVER_2 0xc517
|
||||
#define USB_DEVICE_ID_LOGITECH_CORDLESS_DESKTOP_LX500 0xc512
|
||||
|
|
|
|||
|
|
@ -179,6 +179,7 @@ static const struct hid_device_id hid_quirks[] = {
|
|||
{ HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD2, USB_DEVICE_ID_SMARTJOY_DUAL_PLUS), HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_QUAD_USB_JOYPAD), HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_XIN_MO, USB_DEVICE_ID_XIN_MO_DUAL_ARCADE), HID_QUIRK_MULTI_INPUT },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_GROUP_AUDIO), HID_QUIRK_NOGET },
|
||||
|
||||
{ 0 }
|
||||
};
|
||||
|
|
|
|||
|
|
@ -422,6 +422,19 @@ static int i2c_hid_set_power(struct i2c_client *client, int power_state)
|
|||
dev_err(&client->dev, "failed to change power setting.\n");
|
||||
|
||||
set_pwr_exit:
|
||||
|
||||
/*
|
||||
* The HID over I2C specification states that if a DEVICE needs time
|
||||
* after the PWR_ON request, it should utilise CLOCK stretching.
|
||||
* However, it has been observered that the Windows driver provides a
|
||||
* 1ms sleep between the PWR_ON and RESET requests.
|
||||
* According to Goodix Windows even waits 60 ms after (other?)
|
||||
* PWR_ON requests. Testing has confirmed that several devices
|
||||
* will not work properly without a delay after a PWR_ON request.
|
||||
*/
|
||||
if (!ret && power_state == I2C_HID_PWR_ON)
|
||||
msleep(60);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -443,15 +456,6 @@ static int i2c_hid_hwreset(struct i2c_client *client)
|
|||
if (ret)
|
||||
goto out_unlock;
|
||||
|
||||
/*
|
||||
* The HID over I2C specification states that if a DEVICE needs time
|
||||
* after the PWR_ON request, it should utilise CLOCK stretching.
|
||||
* However, it has been observered that the Windows driver provides a
|
||||
* 1ms sleep between the PWR_ON and RESET requests and that some devices
|
||||
* rely on this.
|
||||
*/
|
||||
usleep_range(1000, 5000);
|
||||
|
||||
i2c_hid_dbg(ihid, "resetting...\n");
|
||||
|
||||
ret = i2c_hid_command(client, &hid_reset_cmd, NULL, 0);
|
||||
|
|
|
|||
|
|
@ -519,12 +519,16 @@ static noinline int hiddev_ioctl_usage(struct hiddev *hiddev, unsigned int cmd,
|
|||
|
||||
switch (cmd) {
|
||||
case HIDIOCGUSAGE:
|
||||
if (uref->usage_index >= field->report_count)
|
||||
goto inval;
|
||||
uref->value = field->value[uref->usage_index];
|
||||
if (copy_to_user(user_arg, uref, sizeof(*uref)))
|
||||
goto fault;
|
||||
goto goodreturn;
|
||||
|
||||
case HIDIOCSUSAGE:
|
||||
if (uref->usage_index >= field->report_count)
|
||||
goto inval;
|
||||
field->value[uref->usage_index] = uref->value;
|
||||
goto goodreturn;
|
||||
|
||||
|
|
|
|||
|
|
@ -197,7 +197,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
|
||||
if (cnt == 0x1fff)
|
||||
if (cnt == 0 || cnt == 0x1fff)
|
||||
rpm = 0;
|
||||
else
|
||||
rpm = 1350000 / cnt;
|
||||
|
|
@ -209,7 +209,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
|
||||
if (cnt == 0x1fff)
|
||||
if (cnt == 0 || cnt == 0x1fff)
|
||||
rpm = 0;
|
||||
else
|
||||
rpm = 1350000 / cnt;
|
||||
|
|
|
|||
|
|
@ -587,6 +587,7 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
|
|||
/* master sent stop */
|
||||
if (ssr_filtered & SSR) {
|
||||
i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value);
|
||||
rcar_i2c_write(priv, ICSCR, SIE | SDBS); /* clear our NACK */
|
||||
rcar_i2c_write(priv, ICSIER, SAR);
|
||||
rcar_i2c_write(priv, ICSSR, ~SSR & 0xff);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -354,7 +354,7 @@ static int i2c_device_probe(struct device *dev)
|
|||
* or ACPI ID table is supplied for the probing device.
|
||||
*/
|
||||
if (!driver->id_table &&
|
||||
!i2c_acpi_match_device(dev->driver->acpi_match_table, client) &&
|
||||
!acpi_driver_match_device(dev, dev->driver) &&
|
||||
!i2c_of_match_device(dev->driver->of_match_table, client)) {
|
||||
status = -ENODEV;
|
||||
goto put_sync_adapter;
|
||||
|
|
|
|||
|
|
@ -899,7 +899,9 @@ iova_magazine_free_pfns(struct iova_magazine *mag, struct iova_domain *iovad)
|
|||
for (i = 0 ; i < mag->size; ++i) {
|
||||
struct iova *iova = private_find_iova(iovad, mag->pfns[i]);
|
||||
|
||||
BUG_ON(!iova);
|
||||
if (WARN_ON(!iova))
|
||||
continue;
|
||||
|
||||
private_free_iova(iovad, iova);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -431,6 +431,16 @@ static void stm32_irq_ack(struct irq_data *d)
|
|||
irq_gc_unlock(gc);
|
||||
}
|
||||
|
||||
/* directly set the target bit without reading first. */
|
||||
static inline void stm32_exti_write_bit(struct irq_data *d, u32 reg)
|
||||
{
|
||||
struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
|
||||
void __iomem *base = chip_data->host_data->base;
|
||||
u32 val = BIT(d->hwirq % IRQS_PER_BANK);
|
||||
|
||||
writel_relaxed(val, base + reg);
|
||||
}
|
||||
|
||||
static inline u32 stm32_exti_set_bit(struct irq_data *d, u32 reg)
|
||||
{
|
||||
struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
|
||||
|
|
@ -464,9 +474,9 @@ static void stm32_exti_h_eoi(struct irq_data *d)
|
|||
|
||||
raw_spin_lock(&chip_data->rlock);
|
||||
|
||||
stm32_exti_set_bit(d, stm32_bank->rpr_ofst);
|
||||
stm32_exti_write_bit(d, stm32_bank->rpr_ofst);
|
||||
if (stm32_bank->fpr_ofst != UNDEF_REG)
|
||||
stm32_exti_set_bit(d, stm32_bank->fpr_ofst);
|
||||
stm32_exti_write_bit(d, stm32_bank->fpr_ofst);
|
||||
|
||||
raw_spin_unlock(&chip_data->rlock);
|
||||
|
||||
|
|
|
|||
|
|
@ -147,7 +147,13 @@ static long cec_adap_g_log_addrs(struct cec_adapter *adap,
|
|||
struct cec_log_addrs log_addrs;
|
||||
|
||||
mutex_lock(&adap->lock);
|
||||
log_addrs = adap->log_addrs;
|
||||
/*
|
||||
* We use memcpy here instead of assignment since there is a
|
||||
* hole at the end of struct cec_log_addrs that an assignment
|
||||
* might ignore. So when we do copy_to_user() we could leak
|
||||
* one byte of memory.
|
||||
*/
|
||||
memcpy(&log_addrs, &adap->log_addrs, sizeof(log_addrs));
|
||||
if (!adap->is_configured)
|
||||
memset(log_addrs.log_addr, CEC_LOG_ADDR_INVALID,
|
||||
sizeof(log_addrs.log_addr));
|
||||
|
|
|
|||
|
|
@ -406,14 +406,15 @@ static void debiirq(unsigned long cookie)
|
|||
case DATA_CI_GET:
|
||||
{
|
||||
u8 *data = av7110->debi_virt;
|
||||
u8 data_0 = data[0];
|
||||
|
||||
if ((data[0] < 2) && data[2] == 0xff) {
|
||||
if (data_0 < 2 && data[2] == 0xff) {
|
||||
int flags = 0;
|
||||
if (data[5] > 0)
|
||||
flags |= CA_CI_MODULE_PRESENT;
|
||||
if (data[5] > 5)
|
||||
flags |= CA_CI_MODULE_READY;
|
||||
av7110->ci_slot[data[0]].flags = flags;
|
||||
av7110->ci_slot[data_0].flags = flags;
|
||||
} else
|
||||
ci_get_data(&av7110->ci_rbuffer,
|
||||
av7110->debi_virt,
|
||||
|
|
|
|||
|
|
@ -1482,8 +1482,6 @@ probe_out:
|
|||
/* Unregister video device */
|
||||
video_unregister_device(&ch->video_dev);
|
||||
}
|
||||
kfree(vpif_obj.sd);
|
||||
v4l2_device_unregister(&vpif_obj.v4l2_dev);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -79,13 +79,8 @@ static int gpio_ir_tx(struct rc_dev *dev, unsigned int *txbuf,
|
|||
// space
|
||||
edge = ktime_add_us(edge, txbuf[i]);
|
||||
delta = ktime_us_delta(edge, ktime_get());
|
||||
if (delta > 10) {
|
||||
spin_unlock_irqrestore(&gpio_ir->lock, flags);
|
||||
usleep_range(delta, delta + 10);
|
||||
spin_lock_irqsave(&gpio_ir->lock, flags);
|
||||
} else if (delta > 0) {
|
||||
if (delta > 0)
|
||||
udelay(delta);
|
||||
}
|
||||
} else {
|
||||
// pulse
|
||||
ktime_t last = ktime_add_us(edge, txbuf[i]);
|
||||
|
|
|
|||
|
|
@ -196,6 +196,9 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
|
|||
{ PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
|
||||
/* EBG */
|
||||
{ PCI_VDEVICE(INTEL, 0x1bad), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x1bae), (kernel_ulong_t)&bxt_uart_info },
|
||||
/* GLK */
|
||||
{ PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&glk_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&glk_i2c_info },
|
||||
|
|
@ -225,6 +228,22 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
|
|||
{ PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info },
|
||||
/* TGL-H */
|
||||
{ PCI_VDEVICE(INTEL, 0x43a7), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43a8), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43a9), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43aa), (kernel_ulong_t)&bxt_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43ab), (kernel_ulong_t)&bxt_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43ad), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43ae), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43d8), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43da), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43e8), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43e9), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43ea), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43eb), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43fb), (kernel_ulong_t)&bxt_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43fd), (kernel_ulong_t)&bxt_info },
|
||||
/* EHL */
|
||||
{ PCI_VDEVICE(INTEL, 0x4b28), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x4b29), (kernel_ulong_t)&bxt_uart_info },
|
||||
|
|
|
|||
|
|
@ -2924,7 +2924,7 @@ static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
|
|||
}
|
||||
|
||||
u64_stats_update_begin(&tx_ring->syncp);
|
||||
tx_ring->tx_stats.missed_tx = missed_tx;
|
||||
tx_ring->tx_stats.missed_tx += missed_tx;
|
||||
u64_stats_update_end(&tx_ring->syncp);
|
||||
|
||||
return rc;
|
||||
|
|
@ -3848,6 +3848,9 @@ static void ena_keep_alive_wd(void *adapter_data,
|
|||
rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
|
||||
|
||||
u64_stats_update_begin(&adapter->syncp);
|
||||
/* These stats are accumulated by the device, so the counters indicate
|
||||
* all drops since last reset.
|
||||
*/
|
||||
adapter->dev_stats.rx_drops = rx_drops;
|
||||
u64_stats_update_end(&adapter->syncp);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -751,8 +751,10 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
|
|||
continue;
|
||||
|
||||
err = gfar_parse_group(child, priv, model);
|
||||
if (err)
|
||||
if (err) {
|
||||
of_node_put(child);
|
||||
goto err_grp_init;
|
||||
}
|
||||
}
|
||||
} else { /* SQ_SG_MODE */
|
||||
err = gfar_parse_group(np, priv, model);
|
||||
|
|
|
|||
|
|
@ -192,7 +192,7 @@ static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid,
|
|||
}
|
||||
|
||||
/* alloc the udl from per cpu ddp pool */
|
||||
ddp->udl = dma_pool_alloc(ddp_pool->pool, GFP_KERNEL, &ddp->udp);
|
||||
ddp->udl = dma_pool_alloc(ddp_pool->pool, GFP_ATOMIC, &ddp->udp);
|
||||
if (!ddp->udl) {
|
||||
e_err(drv, "failed allocated ddp context\n");
|
||||
goto out_noddp_unmap;
|
||||
|
|
|
|||
|
|
@ -106,12 +106,21 @@ static void ipvlan_port_destroy(struct net_device *dev)
|
|||
kfree(port);
|
||||
}
|
||||
|
||||
#define IPVLAN_ALWAYS_ON_OFLOADS \
|
||||
(NETIF_F_SG | NETIF_F_HW_CSUM | \
|
||||
NETIF_F_GSO_ROBUST | NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_ENCAP_ALL)
|
||||
|
||||
#define IPVLAN_ALWAYS_ON \
|
||||
(IPVLAN_ALWAYS_ON_OFLOADS | NETIF_F_LLTX | NETIF_F_VLAN_CHALLENGED)
|
||||
|
||||
#define IPVLAN_FEATURES \
|
||||
(NETIF_F_SG | NETIF_F_CSUM_MASK | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST | \
|
||||
(NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST | \
|
||||
NETIF_F_GSO | NETIF_F_TSO | NETIF_F_GSO_ROBUST | \
|
||||
NETIF_F_TSO_ECN | NETIF_F_TSO6 | NETIF_F_GRO | NETIF_F_RXCSUM | \
|
||||
NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_STAG_FILTER)
|
||||
|
||||
/* NETIF_F_GSO_ENCAP_ALL NETIF_F_GSO_SOFTWARE Newly added */
|
||||
|
||||
#define IPVLAN_STATE_MASK \
|
||||
((1<<__LINK_STATE_NOCARRIER) | (1<<__LINK_STATE_DORMANT))
|
||||
|
||||
|
|
@ -125,7 +134,9 @@ static int ipvlan_init(struct net_device *dev)
|
|||
dev->state = (dev->state & ~IPVLAN_STATE_MASK) |
|
||||
(phy_dev->state & IPVLAN_STATE_MASK);
|
||||
dev->features = phy_dev->features & IPVLAN_FEATURES;
|
||||
dev->features |= NETIF_F_LLTX | NETIF_F_VLAN_CHALLENGED;
|
||||
dev->features |= IPVLAN_ALWAYS_ON;
|
||||
dev->vlan_features = phy_dev->vlan_features & IPVLAN_FEATURES;
|
||||
dev->vlan_features |= IPVLAN_ALWAYS_ON_OFLOADS;
|
||||
dev->hw_enc_features |= dev->features;
|
||||
dev->gso_max_size = phy_dev->gso_max_size;
|
||||
dev->gso_max_segs = phy_dev->gso_max_segs;
|
||||
|
|
@ -225,7 +236,14 @@ static netdev_features_t ipvlan_fix_features(struct net_device *dev,
|
|||
{
|
||||
struct ipvl_dev *ipvlan = netdev_priv(dev);
|
||||
|
||||
return features & (ipvlan->sfeatures | ~IPVLAN_FEATURES);
|
||||
features |= NETIF_F_ALL_FOR_ALL;
|
||||
features &= (ipvlan->sfeatures | ~IPVLAN_FEATURES);
|
||||
features = netdev_increment_features(ipvlan->phy_dev->features,
|
||||
features, features);
|
||||
features |= IPVLAN_ALWAYS_ON;
|
||||
features &= (IPVLAN_FEATURES | IPVLAN_ALWAYS_ON);
|
||||
|
||||
return features;
|
||||
}
|
||||
|
||||
static void ipvlan_change_rx_flags(struct net_device *dev, int change)
|
||||
|
|
@ -732,10 +750,9 @@ static int ipvlan_device_event(struct notifier_block *unused,
|
|||
|
||||
case NETDEV_FEAT_CHANGE:
|
||||
list_for_each_entry(ipvlan, &port->ipvlans, pnode) {
|
||||
ipvlan->dev->features = dev->features & IPVLAN_FEATURES;
|
||||
ipvlan->dev->gso_max_size = dev->gso_max_size;
|
||||
ipvlan->dev->gso_max_segs = dev->gso_max_segs;
|
||||
netdev_features_change(ipvlan->dev);
|
||||
netdev_update_features(ipvlan->dev);
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -1259,6 +1259,9 @@ static void macvlan_port_destroy(struct net_device *dev)
|
|||
static int macvlan_validate(struct nlattr *tb[], struct nlattr *data[],
|
||||
struct netlink_ext_ack *extack)
|
||||
{
|
||||
struct nlattr *nla, *head;
|
||||
int rem, len;
|
||||
|
||||
if (tb[IFLA_ADDRESS]) {
|
||||
if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN)
|
||||
return -EINVAL;
|
||||
|
|
@ -1306,6 +1309,20 @@ static int macvlan_validate(struct nlattr *tb[], struct nlattr *data[],
|
|||
return -EADDRNOTAVAIL;
|
||||
}
|
||||
|
||||
if (data[IFLA_MACVLAN_MACADDR_DATA]) {
|
||||
head = nla_data(data[IFLA_MACVLAN_MACADDR_DATA]);
|
||||
len = nla_len(data[IFLA_MACVLAN_MACADDR_DATA]);
|
||||
|
||||
nla_for_each_attr(nla, head, len, rem) {
|
||||
if (nla_type(nla) != IFLA_MACVLAN_MACADDR ||
|
||||
nla_len(nla) != ETH_ALEN)
|
||||
return -EINVAL;
|
||||
|
||||
if (!is_valid_ether_addr(nla_data(nla)))
|
||||
return -EADDRNOTAVAIL;
|
||||
}
|
||||
}
|
||||
|
||||
if (data[IFLA_MACVLAN_MACADDR_COUNT])
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -1362,10 +1379,6 @@ static int macvlan_changelink_sources(struct macvlan_dev *vlan, u32 mode,
|
|||
len = nla_len(data[IFLA_MACVLAN_MACADDR_DATA]);
|
||||
|
||||
nla_for_each_attr(nla, head, len, rem) {
|
||||
if (nla_type(nla) != IFLA_MACVLAN_MACADDR ||
|
||||
nla_len(nla) != ETH_ALEN)
|
||||
continue;
|
||||
|
||||
addr = nla_data(nla);
|
||||
ret = macvlan_hash_add_source(vlan, addr);
|
||||
if (ret)
|
||||
|
|
|
|||
|
|
@ -810,7 +810,7 @@ ath10k_is_rssi_enable(struct ath10k_hw_params *hw,
|
|||
|
||||
#define TARGET_10_4_TX_DBG_LOG_SIZE 1024
|
||||
#define TARGET_10_4_NUM_WDS_ENTRIES 32
|
||||
#define TARGET_10_4_DMA_BURST_SIZE 0
|
||||
#define TARGET_10_4_DMA_BURST_SIZE 1
|
||||
#define TARGET_10_4_MAC_AGGR_DELIM 0
|
||||
#define TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK 1
|
||||
#define TARGET_10_4_VOW_CONFIG 0
|
||||
|
|
|
|||
|
|
@ -82,6 +82,8 @@
|
|||
|
||||
#define BRCMF_ND_INFO_TIMEOUT msecs_to_jiffies(2000)
|
||||
|
||||
#define BRCMF_PS_MAX_TIMEOUT_MS 2000
|
||||
|
||||
#define BRCMF_ASSOC_PARAMS_FIXED_SIZE \
|
||||
(sizeof(struct brcmf_assoc_params_le) - sizeof(u16))
|
||||
|
||||
|
|
@ -2789,6 +2791,12 @@ brcmf_cfg80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *ndev,
|
|||
else
|
||||
bphy_err(drvr, "error (%d)\n", err);
|
||||
}
|
||||
|
||||
err = brcmf_fil_iovar_int_set(ifp, "pm2_sleep_ret",
|
||||
min_t(u32, timeout, BRCMF_PS_MAX_TIMEOUT_MS));
|
||||
if (err)
|
||||
bphy_err(drvr, "Unable to set pm timeout, (%d)\n", err);
|
||||
|
||||
done:
|
||||
brcmf_dbg(TRACE, "Exit\n");
|
||||
return err;
|
||||
|
|
|
|||
|
|
@ -718,8 +718,11 @@ static int _rtl_usb_receive(struct ieee80211_hw *hw)
|
|||
|
||||
usb_anchor_urb(urb, &rtlusb->rx_submitted);
|
||||
err = usb_submit_urb(urb, GFP_KERNEL);
|
||||
if (err)
|
||||
if (err) {
|
||||
usb_unanchor_urb(urb);
|
||||
usb_free_urb(urb);
|
||||
goto err_out;
|
||||
}
|
||||
usb_free_urb(urb);
|
||||
}
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -1740,7 +1740,7 @@ __nvme_fc_init_request(struct nvme_fc_ctrl *ctrl,
|
|||
if (fc_dma_mapping_error(ctrl->lport->dev, op->fcp_req.cmddma)) {
|
||||
dev_err(ctrl->dev,
|
||||
"FCP Op failed - cmdiu dma mapping failed.\n");
|
||||
ret = EFAULT;
|
||||
ret = -EFAULT;
|
||||
goto out_on_error;
|
||||
}
|
||||
|
||||
|
|
@ -1750,7 +1750,7 @@ __nvme_fc_init_request(struct nvme_fc_ctrl *ctrl,
|
|||
if (fc_dma_mapping_error(ctrl->lport->dev, op->fcp_req.rspdma)) {
|
||||
dev_err(ctrl->dev,
|
||||
"FCP Op failed - rspiu dma mapping failed.\n");
|
||||
ret = EFAULT;
|
||||
ret = -EFAULT;
|
||||
}
|
||||
|
||||
atomic_set(&op->state, FCPOP_STATE_IDLE);
|
||||
|
|
|
|||
|
|
@ -249,12 +249,17 @@ static struct nvme_ns *nvme_round_robin_path(struct nvme_ns_head *head,
|
|||
fallback = ns;
|
||||
}
|
||||
|
||||
/* No optimized path found, re-check the current path */
|
||||
/*
|
||||
* The loop above skips the current path for round-robin semantics.
|
||||
* Fall back to the current path if either:
|
||||
* - no other optimized path found and current is optimized,
|
||||
* - no other usable path found and current is usable.
|
||||
*/
|
||||
if (!nvme_path_is_disabled(old) &&
|
||||
old->ana_state == NVME_ANA_OPTIMIZED) {
|
||||
found = old;
|
||||
goto out;
|
||||
}
|
||||
(old->ana_state == NVME_ANA_OPTIMIZED ||
|
||||
(!fallback && old->ana_state == NVME_ANA_NONOPTIMIZED)))
|
||||
return old;
|
||||
|
||||
if (!fallback)
|
||||
return NULL;
|
||||
found = fallback;
|
||||
|
|
|
|||
|
|
@ -106,11 +106,14 @@ struct qcom_pcie_resources_2_1_0 {
|
|||
struct clk *iface_clk;
|
||||
struct clk *core_clk;
|
||||
struct clk *phy_clk;
|
||||
struct clk *aux_clk;
|
||||
struct clk *ref_clk;
|
||||
struct reset_control *pci_reset;
|
||||
struct reset_control *axi_reset;
|
||||
struct reset_control *ahb_reset;
|
||||
struct reset_control *por_reset;
|
||||
struct reset_control *phy_reset;
|
||||
struct reset_control *ext_reset;
|
||||
struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY];
|
||||
};
|
||||
|
||||
|
|
@ -264,6 +267,14 @@ static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
|
|||
if (IS_ERR(res->phy_clk))
|
||||
return PTR_ERR(res->phy_clk);
|
||||
|
||||
res->aux_clk = devm_clk_get_optional(dev, "aux");
|
||||
if (IS_ERR(res->aux_clk))
|
||||
return PTR_ERR(res->aux_clk);
|
||||
|
||||
res->ref_clk = devm_clk_get_optional(dev, "ref");
|
||||
if (IS_ERR(res->ref_clk))
|
||||
return PTR_ERR(res->ref_clk);
|
||||
|
||||
res->pci_reset = devm_reset_control_get_exclusive(dev, "pci");
|
||||
if (IS_ERR(res->pci_reset))
|
||||
return PTR_ERR(res->pci_reset);
|
||||
|
|
@ -280,6 +291,10 @@ static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
|
|||
if (IS_ERR(res->por_reset))
|
||||
return PTR_ERR(res->por_reset);
|
||||
|
||||
res->ext_reset = devm_reset_control_get_optional_exclusive(dev, "ext");
|
||||
if (IS_ERR(res->ext_reset))
|
||||
return PTR_ERR(res->ext_reset);
|
||||
|
||||
res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
|
||||
return PTR_ERR_OR_ZERO(res->phy_reset);
|
||||
}
|
||||
|
|
@ -288,14 +303,17 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
|
|||
{
|
||||
struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
|
||||
|
||||
clk_disable_unprepare(res->phy_clk);
|
||||
reset_control_assert(res->pci_reset);
|
||||
reset_control_assert(res->axi_reset);
|
||||
reset_control_assert(res->ahb_reset);
|
||||
reset_control_assert(res->por_reset);
|
||||
reset_control_assert(res->pci_reset);
|
||||
reset_control_assert(res->ext_reset);
|
||||
reset_control_assert(res->phy_reset);
|
||||
clk_disable_unprepare(res->iface_clk);
|
||||
clk_disable_unprepare(res->core_clk);
|
||||
clk_disable_unprepare(res->phy_clk);
|
||||
clk_disable_unprepare(res->aux_clk);
|
||||
clk_disable_unprepare(res->ref_clk);
|
||||
regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
|
||||
}
|
||||
|
||||
|
|
@ -326,24 +344,36 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
|
|||
goto err_assert_ahb;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(res->phy_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot prepare/enable phy clock\n");
|
||||
goto err_clk_phy;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(res->core_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot prepare/enable core clock\n");
|
||||
goto err_clk_core;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(res->aux_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot prepare/enable aux clock\n");
|
||||
goto err_clk_aux;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(res->ref_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot prepare/enable ref clock\n");
|
||||
goto err_clk_ref;
|
||||
}
|
||||
|
||||
ret = reset_control_deassert(res->ahb_reset);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot deassert ahb reset\n");
|
||||
goto err_deassert_ahb;
|
||||
}
|
||||
|
||||
ret = reset_control_deassert(res->ext_reset);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot deassert ext reset\n");
|
||||
goto err_deassert_ahb;
|
||||
}
|
||||
|
||||
/* enable PCIe clocks and resets */
|
||||
val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
|
||||
val &= ~BIT(0);
|
||||
|
|
@ -398,6 +428,12 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(res->phy_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot prepare/enable phy clock\n");
|
||||
goto err_deassert_ahb;
|
||||
}
|
||||
|
||||
/* wait for clock acquisition */
|
||||
usleep_range(1000, 1500);
|
||||
|
||||
|
|
@ -411,10 +447,12 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
|
|||
return 0;
|
||||
|
||||
err_deassert_ahb:
|
||||
clk_disable_unprepare(res->ref_clk);
|
||||
err_clk_ref:
|
||||
clk_disable_unprepare(res->aux_clk);
|
||||
err_clk_aux:
|
||||
clk_disable_unprepare(res->core_clk);
|
||||
err_clk_core:
|
||||
clk_disable_unprepare(res->phy_clk);
|
||||
err_clk_phy:
|
||||
clk_disable_unprepare(res->iface_clk);
|
||||
err_assert_ahb:
|
||||
regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
|
||||
|
|
|
|||
|
|
@ -304,13 +304,16 @@ placeholder:
|
|||
slot_name = make_slot_name(name);
|
||||
if (!slot_name) {
|
||||
err = -ENOMEM;
|
||||
kfree(slot);
|
||||
goto err;
|
||||
}
|
||||
|
||||
err = kobject_init_and_add(&slot->kobj, &pci_slot_ktype, NULL,
|
||||
"%s", slot_name);
|
||||
if (err)
|
||||
if (err) {
|
||||
kobject_put(&slot->kobj);
|
||||
goto err;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&slot->list);
|
||||
list_add(&slot->list, &parent->slots);
|
||||
|
|
@ -329,7 +332,6 @@ out:
|
|||
mutex_unlock(&pci_slot_mutex);
|
||||
return slot;
|
||||
err:
|
||||
kfree(slot);
|
||||
slot = ERR_PTR(err);
|
||||
goto out;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -677,6 +677,11 @@ static int slow_eval_known_fn(struct subchannel *sch, void *data)
|
|||
rc = css_evaluate_known_subchannel(sch, 1);
|
||||
if (rc == -EAGAIN)
|
||||
css_schedule_eval(sch->schid);
|
||||
/*
|
||||
* The loop might take long time for platforms with lots of
|
||||
* known devices. Allow scheduling here.
|
||||
*/
|
||||
cond_resched();
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -255,9 +255,9 @@ static void fcoe_sysfs_fcf_del(struct fcoe_fcf *new)
|
|||
WARN_ON(!fcf_dev);
|
||||
new->fcf_dev = NULL;
|
||||
fcoe_fcf_device_delete(fcf_dev);
|
||||
kfree(new);
|
||||
mutex_unlock(&cdev->lock);
|
||||
}
|
||||
kfree(new);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -642,27 +642,16 @@ lpfc_vport_delete(struct fc_vport *fc_vport)
|
|||
vport->port_state < LPFC_VPORT_READY)
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is a bit of a mess. We want to ensure the shost doesn't get
|
||||
* torn down until we're done with the embedded lpfc_vport structure.
|
||||
*
|
||||
* Beyond holding a reference for this function, we also need a
|
||||
* reference for outstanding I/O requests we schedule during delete
|
||||
* processing. But once we scsi_remove_host() we can no longer obtain
|
||||
* a reference through scsi_host_get().
|
||||
*
|
||||
* So we take two references here. We release one reference at the
|
||||
* bottom of the function -- after delinking the vport. And we
|
||||
* release the other at the completion of the unreg_vpi that get's
|
||||
* initiated after we've disposed of all other resources associated
|
||||
* with the port.
|
||||
* Take early refcount for outstanding I/O requests we schedule during
|
||||
* delete processing for unreg_vpi. Always keep this before
|
||||
* scsi_remove_host() as we can no longer obtain a reference through
|
||||
* scsi_host_get() after scsi_host_remove as shost is set to SHOST_DEL.
|
||||
*/
|
||||
if (!scsi_host_get(shost))
|
||||
return VPORT_INVAL;
|
||||
if (!scsi_host_get(shost)) {
|
||||
scsi_host_put(shost);
|
||||
return VPORT_INVAL;
|
||||
}
|
||||
|
||||
lpfc_free_sysfs_attr(vport);
|
||||
|
||||
lpfc_debugfs_terminate(vport);
|
||||
|
|
@ -809,8 +798,9 @@ skip_logo:
|
|||
if (!(vport->vpi_state & LPFC_VPI_REGISTERED) ||
|
||||
lpfc_mbx_unreg_vpi(vport))
|
||||
scsi_host_put(shost);
|
||||
} else
|
||||
} else {
|
||||
scsi_host_put(shost);
|
||||
}
|
||||
|
||||
lpfc_free_vpi(phba, vport->vpi);
|
||||
vport->work_port_events = 0;
|
||||
|
|
|
|||
|
|
@ -3673,10 +3673,22 @@ void qla24xx_async_gnnft_done(scsi_qla_host_t *vha, srb_t *sp)
|
|||
}
|
||||
|
||||
if (fcport->scan_state != QLA_FCPORT_FOUND) {
|
||||
bool do_delete = false;
|
||||
|
||||
if (fcport->scan_needed &&
|
||||
fcport->disc_state == DSC_LOGIN_PEND) {
|
||||
/* Cable got disconnected after we sent
|
||||
* a login. Do delete to prevent timeout.
|
||||
*/
|
||||
fcport->logout_on_delete = 1;
|
||||
do_delete = true;
|
||||
}
|
||||
|
||||
fcport->scan_needed = 0;
|
||||
if ((qla_dual_mode_enabled(vha) ||
|
||||
qla_ini_mode_enabled(vha)) &&
|
||||
atomic_read(&fcport->state) == FCS_ONLINE) {
|
||||
if (((qla_dual_mode_enabled(vha) ||
|
||||
qla_ini_mode_enabled(vha)) &&
|
||||
atomic_read(&fcport->state) == FCS_ONLINE) ||
|
||||
do_delete) {
|
||||
if (fcport->loop_id != FC_NO_LOOP_ID) {
|
||||
if (fcport->flags & FCF_FCP2_DEVICE)
|
||||
fcport->logout_on_delete = 0;
|
||||
|
|
|
|||
|
|
@ -335,14 +335,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
|
|||
if (time_after(jiffies, wait_time))
|
||||
break;
|
||||
|
||||
/*
|
||||
* Check if it's UNLOADING, cause we cannot poll in
|
||||
* this case, or else a NULL pointer dereference
|
||||
* is triggered.
|
||||
*/
|
||||
if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)))
|
||||
return QLA_FUNCTION_TIMEOUT;
|
||||
|
||||
/* Check for pending interrupts. */
|
||||
qla2x00_poll(ha->rsp_q_map[0]);
|
||||
|
||||
|
|
|
|||
|
|
@ -535,6 +535,11 @@ static int qla_nvme_post_cmd(struct nvme_fc_local_port *lport,
|
|||
struct nvme_private *priv = fd->private;
|
||||
struct qla_nvme_rport *qla_rport = rport->private;
|
||||
|
||||
if (!priv) {
|
||||
/* nvme association has been torn down */
|
||||
return rval;
|
||||
}
|
||||
|
||||
fcport = qla_rport->fcport;
|
||||
|
||||
if (!qpair || !fcport || (qpair && !qpair->fw_started) ||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue