iommu/arm-smmu: Support client configured dynamic domains only in QGKI

Dynamic domains cannot be completely supported using a kernel that does
not allow a device to attach to several domains. So, introduce
CONFIG_IOMMU_DYNAMIC_DOMAINS, which will only be set when there is
confidence that the kernel supports dynamic domains.

Change-Id: I37a6fd933c695d17b25a501b3e1e807e270c29ee
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
This commit is contained in:
Isaac J. Manjarres 2020-07-28 11:42:33 -07:00
commit 7eb735685d
5 changed files with 36 additions and 13 deletions

View file

@ -12,6 +12,7 @@ CONFIG_REGULATOR_PROXY_CONSUMER=y
CONFIG_REGULATOR_STUB=y
# CONFIG_REGULATOR_PROXY_CONSUMER_LEGACY is not set
CONFIG_ARM_SMMU=y
CONFIG_IOMMU_DYNAMIC_DOMAINS=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y
CONFIG_QCOM_IOMMU_IO_PGTABLE_QUIRKS=y
CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT=y

View file

@ -7,6 +7,7 @@ CONFIG_DEBUG_FS=y
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
CONFIG_IOMMU_DYNAMIC_DOMAINS=y
CONFIG_QCOM_SECURE_BUFFER=y
# CONFIG_ZONE_DMA32 is not set
CONFIG_EDAC_KRYO_ARM64=y

View file

@ -10,6 +10,7 @@ CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_STM_PROTO_BASIC=y
CONFIG_ION_MSM_HEAPS=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y
CONFIG_IOMMU_DYNAMIC_DOMAINS=y
# CONFIG_IOMMU_IO_PGTABLE_FAST_SELFTEST is not set
# CONFIG_IOMMU_IO_PGTABLE_FAST_PROVE_TLB is not set
CONFIG_QCOM_LLCC_PERFMON=m

View file

@ -146,6 +146,20 @@ config IOMMU_IO_PGTABLE_FAST_PROVE_TLB
If unsure, say N here.
config IOMMU_DYNAMIC_DOMAINS
bool "Enable support for dynamic domains"
depends on ARM_SMMU && QGKI
help
Enables support for clients to create dynamic domains. Some IOMMU
clients require the ability to create and attach to N child domains.
The purpose of these domains is to model process separation between
different processes running in hardware that sits behind an IOMMU.
Enable this feature if it is required for IOMMU clients to create
dynamic domains. Note: creation of dynamic domains through the
devicetree to configure the ARM SMMU's stream-matching registers
for clients will still be supported, independent of this config's
state.
config QCOM_IOMMU_IO_PGTABLE_QUIRKS
bool "IO Pagetable quirks for performance"
depends on ARM || ARM64

View file

@ -2767,8 +2767,8 @@ static int arm_smmu_setup_default_domain(struct device *dev,
* Ensure the context bank is set to a valid value per dynamic
* attr requirement.
*/
__arm_smmu_domain_set_attr(
domain, DOMAIN_ATTR_DYNAMIC, &attr);
set_bit(DOMAIN_ATTR_DYNAMIC,
to_smmu_domain(domain)->attributes);
val = 0;
__arm_smmu_domain_set_attr(
domain, DOMAIN_ATTR_CONTEXT_BANK, &val);
@ -3717,18 +3717,24 @@ static int __arm_smmu_domain_set_attr(struct iommu_domain *domain,
case DOMAIN_ATTR_DYNAMIC: {
int dynamic = *((int *)data);
if (smmu_domain->smmu != NULL) {
dev_err(smmu_domain->smmu->dev,
"cannot change dynamic attribute while attached\n");
ret = -EBUSY;
break;
}
if (IS_ENABLED(CONFIG_IOMMU_DYNAMIC_DOMAINS)) {
if (smmu_domain->smmu != NULL) {
dev_err(smmu_domain->smmu->dev,
"cannot change dynamic attribute while attached\n");
ret = -EBUSY;
break;
}
if (dynamic)
set_bit(DOMAIN_ATTR_DYNAMIC, smmu_domain->attributes);
else
clear_bit(DOMAIN_ATTR_DYNAMIC, smmu_domain->attributes);
ret = 0;
if (dynamic)
set_bit(DOMAIN_ATTR_DYNAMIC,
smmu_domain->attributes);
else
clear_bit(DOMAIN_ATTR_DYNAMIC,
smmu_domain->attributes);
ret = 0;
} else {
ret = -ENOTSUPP;
}
break;
}
case DOMAIN_ATTR_CONTEXT_BANK: