mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
First round of KVM updates for 3.14; PPC parts will come next week.
Nothing major here, just bugfixes all over the place. The most interesting part is the ARM guys' virtualized interrupt controller overhaul, which lets userspace get/set the state and thus enables migration of ARM VMs. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJS3TVKAAoJEBvWZb6bTYbyIFgP/2cmt4ifCuFMaZv4+G1S8jZU uC9ZB/+7vzht/p6zAy+4BxurKbHmSBFkC1OKcxYuy7yB4CQkHabzj4V2vRtqFdwH 5lExP9qh3kqaVLuhnvxLTmkktR3EW4PFy6OI53l5kRNktOXSuZ0aN6K3V7tCg/X0 iL7ASo4bJKlxeWcDpmuVrNgAajmZVfXrjKY7robgBQno+yIsgKhRZRBQHjozA6B8 FpCo/k48RZd/EzIbV/PDDRI4hmmry/lgrO9SKjzq56wSqff2bd/k/KYze4dbAPfd Ps60enPTuHmeEjjb4MMMU4EKHVdTQFUMx/xZCmT4xzoh8s4of6RHphXbfE0SUznQ dTveyEQAR7E3JNS0k1+3WEX5fWlFesp0hO2NeE0wzUq4TAr9ztgVO9NQ6Si15e7Z 2HysO0T5Ojtt0lY08/PvS6i48eCAuuBomrejJS8hLW4SUZ5adn+yW4Qo7Fp9JeBR l9a3LsVT8BZMtUWrUuFcVhlM4MbzElUPjDbgWhR8UYU/kpfVZOQu8qWgGKR4UWXy X7/t9l/tjR99CmfMJBAOzJid+ScSpAfg77BdaKiQrVfVIJmsjEjlO8vUMyj5b1HF hPX5wNyJjHAOfridLeHSs4Rdm4a8sk8Az5d4h76pLVz8M4jyTi2v0rO3N4/dU/pu x7N8KR5hAj+mLBoM9/Al =8sYU -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM updates from Paolo Bonzini: "First round of KVM updates for 3.14; PPC parts will come next week. Nothing major here, just bugfixes all over the place. The most interesting part is the ARM guys' virtualized interrupt controller overhaul, which lets userspace get/set the state and thus enables migration of ARM VMs" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (67 commits) kvm: make KVM_MMU_AUDIT help text more readable KVM: s390: Fix memory access error detection KVM: nVMX: Update guest activity state field on L2 exits KVM: nVMX: Fix nested_run_pending on activity state HLT KVM: nVMX: Clean up handling of VMX-related MSRs KVM: nVMX: Add tracepoints for nested_vmexit and nested_vmexit_inject KVM: nVMX: Pass vmexit parameters to nested_vmx_vmexit KVM: nVMX: Leave VMX mode on clearing of feature control MSR KVM: VMX: Fix DR6 update on #DB exception KVM: SVM: Fix reading of DR6 KVM: x86: Sync DR7 on KVM_SET_DEBUGREGS add support for Hyper-V reference time counter KVM: remove useless write to vcpu->hv_clock.tsc_timestamp KVM: x86: fix tsc catchup issue with tsc scaling KVM: x86: limit PIT timer frequency KVM: x86: handle invalid root_hpa everywhere kvm: Provide kvm_vcpu_eligible_for_directed_yield() stub kvm: vfio: silence GCC warning KVM: ARM: Remove duplicate include arm/arm64: KVM: relax the requirements of VMA alignment for THP ...
This commit is contained in:
commit
7ebd3faa9b
55 changed files with 1515 additions and 406 deletions
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@ -26,7 +26,12 @@
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#include <asm/kvm_asm.h>
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#include <asm/kvm_mmio.h>
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#define KVM_MAX_VCPUS 4
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#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
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#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
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#else
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#define KVM_MAX_VCPUS 0
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#endif
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#define KVM_USER_MEM_SLOTS 32
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#define KVM_PRIVATE_MEM_SLOTS 4
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
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@ -136,6 +136,7 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, hva_t hva,
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}
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#define kvm_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l))
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#define kvm_virt_to_phys(x) __virt_to_phys((unsigned long)(x))
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#endif /* __ASSEMBLY__ */
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#endif /* __ARM64_KVM_MMU_H__ */
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@ -55,8 +55,9 @@ struct kvm_regs {
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#define KVM_ARM_TARGET_AEM_V8 0
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#define KVM_ARM_TARGET_FOUNDATION_V8 1
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#define KVM_ARM_TARGET_CORTEX_A57 2
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#define KVM_ARM_TARGET_XGENE_POTENZA 3
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#define KVM_ARM_NUM_TARGETS 3
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#define KVM_ARM_NUM_TARGETS 4
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/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
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#define KVM_ARM_DEVICE_TYPE_SHIFT 0
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@ -129,6 +130,24 @@ struct kvm_arch_memory_slot {
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#define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007
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#define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0
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#define ARM64_SYS_REG_SHIFT_MASK(x,n) \
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(((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) & \
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KVM_REG_ARM64_SYSREG_ ## n ## _MASK)
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#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
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(KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | \
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ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
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ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
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ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
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ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
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ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
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#define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64)
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#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1)
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#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
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#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2)
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_ARM_IRQ_TYPE_SHIFT 24
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#define KVM_ARM_IRQ_TYPE_MASK 0xff
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@ -36,6 +36,17 @@ config KVM_ARM_HOST
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---help---
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Provides host support for ARM processors.
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config KVM_ARM_MAX_VCPUS
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int "Number maximum supported virtual CPUs per VM"
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depends on KVM_ARM_HOST
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default 4
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help
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Static number of max supported virtual CPUs per VM.
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If you choose a high number, the vcpu structures will be quite
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large, so only choose a reasonable number that you expect to
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actually use.
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config KVM_ARM_VGIC
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bool
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depends on KVM_ARM_HOST && OF
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@ -207,20 +207,26 @@ int __attribute_const__ kvm_target_cpu(void)
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unsigned long implementor = read_cpuid_implementor();
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unsigned long part_number = read_cpuid_part_number();
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if (implementor != ARM_CPU_IMP_ARM)
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return -EINVAL;
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switch (implementor) {
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case ARM_CPU_IMP_ARM:
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switch (part_number) {
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case ARM_CPU_PART_AEM_V8:
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return KVM_ARM_TARGET_AEM_V8;
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case ARM_CPU_PART_FOUNDATION:
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return KVM_ARM_TARGET_FOUNDATION_V8;
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case ARM_CPU_PART_CORTEX_A57:
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return KVM_ARM_TARGET_CORTEX_A57;
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};
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break;
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case ARM_CPU_IMP_APM:
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switch (part_number) {
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case APM_CPU_PART_POTENZA:
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return KVM_ARM_TARGET_XGENE_POTENZA;
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};
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break;
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};
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switch (part_number) {
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case ARM_CPU_PART_AEM_V8:
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return KVM_ARM_TARGET_AEM_V8;
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case ARM_CPU_PART_FOUNDATION:
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return KVM_ARM_TARGET_FOUNDATION_V8;
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case ARM_CPU_PART_CORTEX_A57:
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/* Currently handled by the generic backend */
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return KVM_ARM_TARGET_CORTEX_A57;
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default:
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return -EINVAL;
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}
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return -EINVAL;
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}
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int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
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@ -39,9 +39,6 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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if (kvm_psci_call(vcpu))
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return 1;
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kvm_inject_undefined(vcpu);
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return 1;
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}
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@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void)
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&genericv8_target_table);
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kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
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&genericv8_target_table);
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kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
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&genericv8_target_table);
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return 0;
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}
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late_initcall(sys_reg_genericv8_init);
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