From 7f54b301389f9ff77fc5356670f8fa67bbbe1b64 Mon Sep 17 00:00:00 2001 From: chunquan Date: Tue, 23 Nov 2021 11:31:08 +0800 Subject: [PATCH] qcacld-3.0: Send high 32bit addr for no smmu platform which fw need Host send HTT_H2T_MSG_TYPE_WDI_IPA_CFG cmd to fw, need update high 32bit addr for non-smmu platform which alloc physical address more than 4G, like addr 0x1 5000 0000.It will cut off bit32~bit63, fw get memory is 0x5000 0000, it's maybe use for peripheral memory.when fw write addr 0x5000 0000, it will meet some error. Change-Id: Ic5c5c00c85bdf08e61c9ff0f539989d2e96bb153 CRs-Fixed: 3077016 --- core/dp/htt/htt_h2t.c | 44 +++++++++++++++++++++++++++-------------- core/dp/htt/htt_types.h | 3 ++- 2 files changed, 31 insertions(+), 16 deletions(-) diff --git a/core/dp/htt/htt_h2t.c b/core/dp/htt/htt_h2t.c index a2a4051dc88e..7012e11f2cfa 100644 --- a/core/dp/htt/htt_h2t.c +++ b/core/dp/htt/htt_h2t.c @@ -1,5 +1,6 @@ /* - * Copyright (c) 2011-2020 The Linux Foundation. All rights reserved. + * Copyright (c) 2011-2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the @@ -1017,6 +1018,8 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) struct htt_htc_pkt *pkt; qdf_nbuf_t msg; uint32_t *msg_word; + uint32_t addr; + qdf_mem_info_t *mem_info_t; pkt = htt_htc_pkt_alloc(pdev); if (!pkt) @@ -1052,13 +1055,14 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) msg_word++; *msg_word = 0; - /* TX COMP RING BASE LO */ HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_LO_SET(*msg_word, (unsigned int)qdf_mem_get_dma_addr(pdev->osdev, &pdev->ipa_uc_tx_rsc.tx_comp_ring->mem_info)); msg_word++; *msg_word = 0; - /* TX COMP RING BASE HI, NONE */ + mem_info_t = &pdev->ipa_uc_tx_rsc.tx_comp_ring->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1071,6 +1075,8 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) (unsigned int)pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr); msg_word++; *msg_word = 0; + addr = (uint32_t)(pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr >> 32); + HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1079,6 +1085,9 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) &pdev->ipa_uc_tx_rsc.tx_ce_idx->mem_info)); msg_word++; *msg_word = 0; + mem_info_t = &pdev->ipa_uc_tx_rsc.tx_ce_idx->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1087,8 +1096,9 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) &pdev->ipa_uc_rx_rsc.rx_ind_ring->mem_info)); msg_word++; *msg_word = 0; - HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_SET(*msg_word, - 0); + mem_info_t = &pdev->ipa_uc_rx_rsc.rx_ind_ring->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1102,8 +1112,9 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) &pdev->ipa_uc_rx_rsc.rx_ipa_prc_done_idx->mem_info)); msg_word++; *msg_word = 0; - HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_SET(*msg_word, - 0); + mem_info_t = &pdev->ipa_uc_rx_rsc.rx_ipa_prc_done_idx->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1111,8 +1122,8 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) (unsigned int)pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr); msg_word++; *msg_word = 0; - HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_SET(*msg_word, - 0); + addr = (uint32_t)(pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr >> 32); + HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1121,8 +1132,9 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) &pdev->ipa_uc_rx_rsc.rx2_ind_ring->mem_info)); msg_word++; *msg_word = 0; - HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_SET(*msg_word, - 0); + mem_info_t = &pdev->ipa_uc_rx_rsc.rx2_ind_ring->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1136,8 +1148,9 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) &pdev->ipa_uc_rx_rsc.rx2_ipa_prc_done_idx->mem_info)); msg_word++; *msg_word = 0; - HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_SET(*msg_word, - 0); + mem_info_t = &pdev->ipa_uc_rx_rsc.rx2_ipa_prc_done_idx->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_SET(*msg_word, addr); msg_word++; *msg_word = 0; @@ -1146,8 +1159,9 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev) &pdev->ipa_uc_rx_rsc.rx2_ipa_prc_done_idx->mem_info)); msg_word++; *msg_word = 0; - HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_SET(*msg_word, - 0); + mem_info_t = &pdev->ipa_uc_rx_rsc.rx2_ipa_prc_done_idx->mem_info; + addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32); + HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_SET(*msg_word, addr); SET_HTC_PACKET_INFO_TX(&pkt->htc_pkt, htt_h2t_send_complete_free_netbuf, diff --git a/core/dp/htt/htt_types.h b/core/dp/htt/htt_types.h index a3045e62b48f..1e5f8de10f04 100644 --- a/core/dp/htt/htt_types.h +++ b/core/dp/htt/htt_types.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2011, 2014-2018-2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the @@ -120,7 +121,7 @@ struct htt_ipa_uc_tx_resource_t { qdf_shared_mem_t *tx_ce_idx; qdf_shared_mem_t *tx_comp_ring; - uint32_t tx_comp_idx_paddr; + qdf_dma_addr_t tx_comp_idx_paddr; qdf_shared_mem_t **tx_buf_pool_strg; uint32_t alloc_tx_buf_cnt; bool ipa_smmu_mapped;