A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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[AVR32] Add PIOE device and reserve SDRAM pins

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The PIOE device was left out before because it muxes SDRAM pins (and
is therefore a bit dangerous to mess with) and because no existing
drivers had any use for it.

It is needed for CompactFlash, however, and now that we have a way
to protect the SDRAM pins, it can be safely added.

Signed-off-by: Haavard Skinnemoen <[email protected]>
This commit is contained in:
Haavard Skinnemoen 2007-01-30 11:16:16 +01:00
commit 7f9f467863
4 changed files with 36 additions and 1 deletions
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2
include/asm-avr32/arch-at32ap/at32ap7000.h
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@ -24,10 +24,12 @@
#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
#endif /* __ASM_ARCH_AT32AP7000_H__ */

2
include/asm-avr32/arch-at32ap/irq.h
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@ -7,7 +7,7 @@
#define AT32_EXTINT(n) (EIM_IRQ_BASE + (n))
#define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS)
#define NR_GPIO_IRQS (4 * 32)
#define NR_GPIO_IRQS (5 * 32)
#define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS)