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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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cpufreq: powerpc: move cpufreq driver to drivers/cpufreq
Move cpufreq driver of powerpc platform to drivers/cpufreq. Signed-off-by: Viresh Kumar <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
This commit is contained in:
Viresh Kumar
Rafael J. Wysocki
parent
7a4b35082c
commit
7fb6a53db5
8 changed files with 29 additions and 34 deletions
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@ -33,3 +33,29 @@ config PPC_CORENET_CPUFREQ
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This adds the CPUFreq driver support for Freescale e500mc,
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e5500 and e6500 series SoCs which are capable of changing
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the CPU's frequency dynamically.
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config CPU_FREQ_PMAC
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bool "Support for Apple PowerBooks"
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depends on ADB_PMU && PPC32
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select CPU_FREQ_TABLE
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help
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This adds support for frequency switching on Apple PowerBooks,
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this currently includes some models of iBook & Titanium
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PowerBook.
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config CPU_FREQ_PMAC64
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bool "Support for some Apple G5s"
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depends on PPC_PMAC && PPC64
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select CPU_FREQ_TABLE
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help
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This adds support for frequency switching on Apple iMac G5,
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and some of the more recent desktop G5 machines as well.
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config PPC_PASEMI_CPUFREQ
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bool "Support for PA Semi PWRficient"
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depends on PPC_PASEMI
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select CPU_FREQ_TABLE
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default y
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help
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This adds the support for frequency switching on PA Semi
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PWRficient processors.
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@ -80,6 +80,9 @@ ppc-cbe-cpufreq-y += ppc_cbe_cpufreq_pervasive.o ppc_cbe_cpufreq.o
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obj-$(CONFIG_CPU_FREQ_CBE_PMI) += ppc_cbe_cpufreq_pmi.o
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obj-$(CONFIG_CPU_FREQ_MAPLE) += maple-cpufreq.o
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obj-$(CONFIG_PPC_CORENET_CPUFREQ) += ppc-corenet-cpufreq.o
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obj-$(CONFIG_CPU_FREQ_PMAC) += pmac32-cpufreq.o
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obj-$(CONFIG_CPU_FREQ_PMAC64) += pmac64-cpufreq.o
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obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += pasemi-cpufreq.o
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##################################################################################
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# Other platform drivers
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331
drivers/cpufreq/pasemi-cpufreq.c
Normal file
331
drivers/cpufreq/pasemi-cpufreq.c
Normal file
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@ -0,0 +1,331 @@
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/*
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* Copyright (C) 2007 PA Semi, Inc
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*
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* Authors: Egor Martovetsky <egor@pasemi.com>
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* Olof Johansson <olof@lixom.net>
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*
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/cpufreq.h>
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#include <linux/timer.h>
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#include <linux/module.h>
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#include <asm/hw_irq.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/time.h>
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#include <asm/smp.h>
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#define SDCASR_REG 0x0100
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#define SDCASR_REG_STRIDE 0x1000
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#define SDCPWR_CFGA0_REG 0x0100
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#define SDCPWR_PWST0_REG 0x0000
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#define SDCPWR_GIZTIME_REG 0x0440
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/* SDCPWR_GIZTIME_REG fields */
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#define SDCPWR_GIZTIME_GR 0x80000000
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#define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
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/* Offset of ASR registers from SDC base */
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#define SDCASR_OFFSET 0x120000
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static void __iomem *sdcpwr_mapbase;
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static void __iomem *sdcasr_mapbase;
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static DEFINE_MUTEX(pas_switch_mutex);
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/* Current astate, is used when waking up from power savings on
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* one core, in case the other core has switched states during
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* the idle time.
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*/
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static int current_astate;
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/* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
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static struct cpufreq_frequency_table pas_freqs[] = {
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{0, 0},
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{1, 0},
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{2, 0},
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{3, 0},
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{4, 0},
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{0, CPUFREQ_TABLE_END},
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};
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static struct freq_attr *pas_cpu_freqs_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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/*
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* hardware specific functions
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*/
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static int get_astate_freq(int astate)
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{
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u32 ret;
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ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
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return ret & 0x3f;
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}
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static int get_cur_astate(int cpu)
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{
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u32 ret;
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ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
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ret = (ret >> (cpu * 4)) & 0x7;
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return ret;
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}
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static int get_gizmo_latency(void)
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{
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u32 giztime, ret;
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giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
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/* just provide the upper bound */
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if (giztime & SDCPWR_GIZTIME_GR)
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ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
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else
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ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
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return ret;
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}
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static void set_astate(int cpu, unsigned int astate)
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{
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unsigned long flags;
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/* Return if called before init has run */
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if (unlikely(!sdcasr_mapbase))
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return;
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local_irq_save(flags);
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out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
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local_irq_restore(flags);
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}
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int check_astate(void)
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{
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return get_cur_astate(hard_smp_processor_id());
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}
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void restore_astate(int cpu)
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{
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set_astate(cpu, current_astate);
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}
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/*
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* cpufreq functions
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*/
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static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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const u32 *max_freqp;
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u32 max_freq;
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int i, cur_astate;
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struct resource res;
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struct device_node *cpu, *dn;
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int err = -ENODEV;
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cpu = of_get_cpu_node(policy->cpu, NULL);
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if (!cpu)
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goto out;
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dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
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if (!dn)
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dn = of_find_compatible_node(NULL, NULL,
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"pasemi,pwrficient-sdc");
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if (!dn)
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goto out;
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err = of_address_to_resource(dn, 0, &res);
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of_node_put(dn);
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if (err)
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goto out;
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sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
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if (!sdcasr_mapbase) {
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err = -EINVAL;
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goto out;
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}
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dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
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if (!dn)
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dn = of_find_compatible_node(NULL, NULL,
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"pasemi,pwrficient-gizmo");
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if (!dn) {
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err = -ENODEV;
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goto out_unmap_sdcasr;
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}
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err = of_address_to_resource(dn, 0, &res);
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of_node_put(dn);
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if (err)
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goto out_unmap_sdcasr;
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sdcpwr_mapbase = ioremap(res.start, 0x1000);
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if (!sdcpwr_mapbase) {
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err = -EINVAL;
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goto out_unmap_sdcasr;
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}
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pr_debug("init cpufreq on CPU %d\n", policy->cpu);
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max_freqp = of_get_property(cpu, "clock-frequency", NULL);
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if (!max_freqp) {
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err = -EINVAL;
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goto out_unmap_sdcpwr;
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}
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/* we need the freq in kHz */
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max_freq = *max_freqp / 1000;
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pr_debug("max clock-frequency is at %u kHz\n", max_freq);
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pr_debug("initializing frequency table\n");
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/* initialize frequency table */
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for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
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pas_freqs[i].frequency =
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get_astate_freq(pas_freqs[i].driver_data) * 100000;
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pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
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}
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policy->cpuinfo.transition_latency = get_gizmo_latency();
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cur_astate = get_cur_astate(policy->cpu);
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pr_debug("current astate is at %d\n",cur_astate);
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policy->cur = pas_freqs[cur_astate].frequency;
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cpumask_copy(policy->cpus, cpu_online_mask);
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ppc_proc_freq = policy->cur * 1000ul;
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cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);
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/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
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* are set correctly
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*/
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return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);
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out_unmap_sdcpwr:
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iounmap(sdcpwr_mapbase);
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out_unmap_sdcasr:
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iounmap(sdcasr_mapbase);
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out:
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return err;
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}
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static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
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{
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/*
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* We don't support CPU hotplug. Don't unmap after the system
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* has already made it to a running state.
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*/
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if (system_state != SYSTEM_BOOTING)
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return 0;
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if (sdcasr_mapbase)
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iounmap(sdcasr_mapbase);
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if (sdcpwr_mapbase)
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iounmap(sdcpwr_mapbase);
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cpufreq_frequency_table_put_attr(policy->cpu);
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return 0;
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}
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static int pas_cpufreq_verify(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, pas_freqs);
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}
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static int pas_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cpufreq_freqs freqs;
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int pas_astate_new;
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int i;
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cpufreq_frequency_table_target(policy,
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pas_freqs,
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target_freq,
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relation,
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&pas_astate_new);
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freqs.old = policy->cur;
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freqs.new = pas_freqs[pas_astate_new].frequency;
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mutex_lock(&pas_switch_mutex);
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
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policy->cpu,
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pas_freqs[pas_astate_new].frequency,
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pas_freqs[pas_astate_new].driver_data);
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current_astate = pas_astate_new;
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for_each_online_cpu(i)
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set_astate(i, pas_astate_new);
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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mutex_unlock(&pas_switch_mutex);
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ppc_proc_freq = freqs.new * 1000ul;
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return 0;
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}
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static struct cpufreq_driver pas_cpufreq_driver = {
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.name = "pas-cpufreq",
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.owner = THIS_MODULE,
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.flags = CPUFREQ_CONST_LOOPS,
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.init = pas_cpufreq_cpu_init,
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.exit = pas_cpufreq_cpu_exit,
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.verify = pas_cpufreq_verify,
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.target = pas_cpufreq_target,
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.attr = pas_cpu_freqs_attr,
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};
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/*
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* module init and destoy
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*/
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static int __init pas_cpufreq_init(void)
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{
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if (!of_machine_is_compatible("PA6T-1682M") &&
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!of_machine_is_compatible("pasemi,pwrficient"))
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return -ENODEV;
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return cpufreq_register_driver(&pas_cpufreq_driver);
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}
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static void __exit pas_cpufreq_exit(void)
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{
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cpufreq_unregister_driver(&pas_cpufreq_driver);
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}
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module_init(pas_cpufreq_init);
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module_exit(pas_cpufreq_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <[email protected]>, Olof Johansson <[email protected]>");
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721
drivers/cpufreq/pmac32-cpufreq.c
Normal file
721
drivers/cpufreq/pmac32-cpufreq.c
Normal file
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@ -0,0 +1,721 @@
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/*
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* Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
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* Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* TODO: Need a big cleanup here. Basically, we need to have different
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* cpufreq_driver structures for the different type of HW instead of the
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* current mess. We also need to better deal with the detection of the
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* type of machine.
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/adb.h>
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#include <linux/pmu.h>
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#include <linux/cpufreq.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/hardirq.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/irq.h>
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#include <asm/pmac_feature.h>
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#include <asm/mmu_context.h>
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#include <asm/sections.h>
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#include <asm/cputable.h>
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#include <asm/time.h>
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#include <asm/mpic.h>
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#include <asm/keylargo.h>
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#include <asm/switch_to.h>
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/* WARNING !!! This will cause calibrate_delay() to be called,
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* but this is an __init function ! So you MUST go edit
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* init/main.c to make it non-init before enabling DEBUG_FREQ
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*/
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#undef DEBUG_FREQ
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extern void low_choose_7447a_dfs(int dfs);
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extern void low_choose_750fx_pll(int pll);
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extern void low_sleep_handler(void);
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/*
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* Currently, PowerMac cpufreq supports only high & low frequencies
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* that are set by the firmware
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*/
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static unsigned int low_freq;
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static unsigned int hi_freq;
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static unsigned int cur_freq;
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static unsigned int sleep_freq;
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static unsigned long transition_latency;
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/*
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* Different models uses different mechanisms to switch the frequency
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*/
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static int (*set_speed_proc)(int low_speed);
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static unsigned int (*get_speed_proc)(void);
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/*
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* Some definitions used by the various speedprocs
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*/
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static u32 voltage_gpio;
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static u32 frequency_gpio;
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static u32 slew_done_gpio;
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static int no_schedule;
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static int has_cpu_l2lve;
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static int is_pmu_based;
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/* There are only two frequency states for each processor. Values
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* are in kHz for the time being.
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*/
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#define CPUFREQ_HIGH 0
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#define CPUFREQ_LOW 1
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static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
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{CPUFREQ_HIGH, 0},
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{CPUFREQ_LOW, 0},
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{0, CPUFREQ_TABLE_END},
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};
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static struct freq_attr* pmac_cpu_freqs_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static inline void local_delay(unsigned long ms)
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{
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||||
if (no_schedule)
|
||||
mdelay(ms);
|
||||
else
|
||||
msleep(ms);
|
||||
}
|
||||
|
||||
#ifdef DEBUG_FREQ
|
||||
static inline void debug_calc_bogomips(void)
|
||||
{
|
||||
/* This will cause a recalc of bogomips and display the
|
||||
* result. We backup/restore the value to avoid affecting the
|
||||
* core cpufreq framework's own calculation.
|
||||
*/
|
||||
unsigned long save_lpj = loops_per_jiffy;
|
||||
calibrate_delay();
|
||||
loops_per_jiffy = save_lpj;
|
||||
}
|
||||
#endif /* DEBUG_FREQ */
|
||||
|
||||
/* Switch CPU speed under 750FX CPU control
|
||||
*/
|
||||
static int cpu_750fx_cpu_speed(int low_speed)
|
||||
{
|
||||
u32 hid2;
|
||||
|
||||
if (low_speed == 0) {
|
||||
/* ramping up, set voltage first */
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
|
||||
/* Make sure we sleep for at least 1ms */
|
||||
local_delay(10);
|
||||
|
||||
/* tweak L2 for high voltage */
|
||||
if (has_cpu_l2lve) {
|
||||
hid2 = mfspr(SPRN_HID2);
|
||||
hid2 &= ~0x2000;
|
||||
mtspr(SPRN_HID2, hid2);
|
||||
}
|
||||
}
|
||||
#ifdef CONFIG_6xx
|
||||
low_choose_750fx_pll(low_speed);
|
||||
#endif
|
||||
if (low_speed == 1) {
|
||||
/* tweak L2 for low voltage */
|
||||
if (has_cpu_l2lve) {
|
||||
hid2 = mfspr(SPRN_HID2);
|
||||
hid2 |= 0x2000;
|
||||
mtspr(SPRN_HID2, hid2);
|
||||
}
|
||||
|
||||
/* ramping down, set voltage last */
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
|
||||
local_delay(10);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int cpu_750fx_get_cpu_speed(void)
|
||||
{
|
||||
if (mfspr(SPRN_HID1) & HID1_PS)
|
||||
return low_freq;
|
||||
else
|
||||
return hi_freq;
|
||||
}
|
||||
|
||||
/* Switch CPU speed using DFS */
|
||||
static int dfs_set_cpu_speed(int low_speed)
|
||||
{
|
||||
if (low_speed == 0) {
|
||||
/* ramping up, set voltage first */
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
|
||||
/* Make sure we sleep for at least 1ms */
|
||||
local_delay(1);
|
||||
}
|
||||
|
||||
/* set frequency */
|
||||
#ifdef CONFIG_6xx
|
||||
low_choose_7447a_dfs(low_speed);
|
||||
#endif
|
||||
udelay(100);
|
||||
|
||||
if (low_speed == 1) {
|
||||
/* ramping down, set voltage last */
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
|
||||
local_delay(1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int dfs_get_cpu_speed(void)
|
||||
{
|
||||
if (mfspr(SPRN_HID1) & HID1_DFS)
|
||||
return low_freq;
|
||||
else
|
||||
return hi_freq;
|
||||
}
|
||||
|
||||
|
||||
/* Switch CPU speed using slewing GPIOs
|
||||
*/
|
||||
static int gpios_set_cpu_speed(int low_speed)
|
||||
{
|
||||
int gpio, timeout = 0;
|
||||
|
||||
/* If ramping up, set voltage first */
|
||||
if (low_speed == 0) {
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
|
||||
/* Delay is way too big but it's ok, we schedule */
|
||||
local_delay(10);
|
||||
}
|
||||
|
||||
/* Set frequency */
|
||||
gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
|
||||
if (low_speed == ((gpio & 0x01) == 0))
|
||||
goto skip;
|
||||
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
|
||||
low_speed ? 0x04 : 0x05);
|
||||
udelay(200);
|
||||
do {
|
||||
if (++timeout > 100)
|
||||
break;
|
||||
local_delay(1);
|
||||
gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
|
||||
} while((gpio & 0x02) == 0);
|
||||
skip:
|
||||
/* If ramping down, set voltage last */
|
||||
if (low_speed == 1) {
|
||||
pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
|
||||
/* Delay is way too big but it's ok, we schedule */
|
||||
local_delay(10);
|
||||
}
|
||||
|
||||
#ifdef DEBUG_FREQ
|
||||
debug_calc_bogomips();
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Switch CPU speed under PMU control
|
||||
*/
|
||||
static int pmu_set_cpu_speed(int low_speed)
|
||||
{
|
||||
struct adb_request req;
|
||||
unsigned long save_l2cr;
|
||||
unsigned long save_l3cr;
|
||||
unsigned int pic_prio;
|
||||
unsigned long flags;
|
||||
|
||||
preempt_disable();
|
||||
|
||||
#ifdef DEBUG_FREQ
|
||||
printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
|
||||
#endif
|
||||
pmu_suspend();
|
||||
|
||||
/* Disable all interrupt sources on openpic */
|
||||
pic_prio = mpic_cpu_get_priority();
|
||||
mpic_cpu_set_priority(0xf);
|
||||
|
||||
/* Make sure the decrementer won't interrupt us */
|
||||
asm volatile("mtdec %0" : : "r" (0x7fffffff));
|
||||
/* Make sure any pending DEC interrupt occurring while we did
|
||||
* the above didn't re-enable the DEC */
|
||||
mb();
|
||||
asm volatile("mtdec %0" : : "r" (0x7fffffff));
|
||||
|
||||
/* We can now disable MSR_EE */
|
||||
local_irq_save(flags);
|
||||
|
||||
/* Giveup the FPU & vec */
|
||||
enable_kernel_fp();
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
if (cpu_has_feature(CPU_FTR_ALTIVEC))
|
||||
enable_kernel_altivec();
|
||||
#endif /* CONFIG_ALTIVEC */
|
||||
|
||||
/* Save & disable L2 and L3 caches */
|
||||
save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
|
||||
save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
|
||||
|
||||
/* Send the new speed command. My assumption is that this command
|
||||
* will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
|
||||
*/
|
||||
pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
|
||||
while (!req.complete)
|
||||
pmu_poll();
|
||||
|
||||
/* Prepare the northbridge for the speed transition */
|
||||
pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
|
||||
|
||||
/* Call low level code to backup CPU state and recover from
|
||||
* hardware reset
|
||||
*/
|
||||
low_sleep_handler();
|
||||
|
||||
/* Restore the northbridge */
|
||||
pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
|
||||
|
||||
/* Restore L2 cache */
|
||||
if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
|
||||
_set_L2CR(save_l2cr);
|
||||
/* Restore L3 cache */
|
||||
if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
|
||||
_set_L3CR(save_l3cr);
|
||||
|
||||
/* Restore userland MMU context */
|
||||
switch_mmu_context(NULL, current->active_mm);
|
||||
|
||||
#ifdef DEBUG_FREQ
|
||||
printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
|
||||
#endif
|
||||
|
||||
/* Restore low level PMU operations */
|
||||
pmu_unlock();
|
||||
|
||||
/*
|
||||
* Restore decrementer; we'll take a decrementer interrupt
|
||||
* as soon as interrupts are re-enabled and the generic
|
||||
* clockevents code will reprogram it with the right value.
|
||||
*/
|
||||
set_dec(1);
|
||||
|
||||
/* Restore interrupts */
|
||||
mpic_cpu_set_priority(pic_prio);
|
||||
|
||||
/* Let interrupts flow again ... */
|
||||
local_irq_restore(flags);
|
||||
|
||||
#ifdef DEBUG_FREQ
|
||||
debug_calc_bogomips();
|
||||
#endif
|
||||
|
||||
pmu_resume();
|
||||
|
||||
preempt_enable();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode,
|
||||
int notify)
|
||||
{
|
||||
struct cpufreq_freqs freqs;
|
||||
unsigned long l3cr;
|
||||
static unsigned long prev_l3cr;
|
||||
|
||||
freqs.old = cur_freq;
|
||||
freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
|
||||
|
||||
if (freqs.old == freqs.new)
|
||||
return 0;
|
||||
|
||||
if (notify)
|
||||
cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
|
||||
if (speed_mode == CPUFREQ_LOW &&
|
||||
cpu_has_feature(CPU_FTR_L3CR)) {
|
||||
l3cr = _get_L3CR();
|
||||
if (l3cr & L3CR_L3E) {
|
||||
prev_l3cr = l3cr;
|
||||
_set_L3CR(0);
|
||||
}
|
||||
}
|
||||
set_speed_proc(speed_mode == CPUFREQ_LOW);
|
||||
if (speed_mode == CPUFREQ_HIGH &&
|
||||
cpu_has_feature(CPU_FTR_L3CR)) {
|
||||
l3cr = _get_L3CR();
|
||||
if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
|
||||
_set_L3CR(prev_l3cr);
|
||||
}
|
||||
if (notify)
|
||||
cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
|
||||
cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
|
||||
{
|
||||
return cur_freq;
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_target( struct cpufreq_policy *policy,
|
||||
unsigned int target_freq,
|
||||
unsigned int relation)
|
||||
{
|
||||
unsigned int newstate = 0;
|
||||
int rc;
|
||||
|
||||
if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
|
||||
target_freq, relation, &newstate))
|
||||
return -EINVAL;
|
||||
|
||||
rc = do_set_cpu_speed(policy, newstate, 1);
|
||||
|
||||
ppc_proc_freq = cur_freq * 1000ul;
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
if (policy->cpu != 0)
|
||||
return -ENODEV;
|
||||
|
||||
policy->cpuinfo.transition_latency = transition_latency;
|
||||
policy->cur = cur_freq;
|
||||
|
||||
cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
|
||||
}
|
||||
|
||||
static u32 read_gpio(struct device_node *np)
|
||||
{
|
||||
const u32 *reg = of_get_property(np, "reg", NULL);
|
||||
u32 offset;
|
||||
|
||||
if (reg == NULL)
|
||||
return 0;
|
||||
/* That works for all keylargos but shall be fixed properly
|
||||
* some day... The problem is that it seems we can't rely
|
||||
* on the "reg" property of the GPIO nodes, they are either
|
||||
* relative to the base of KeyLargo or to the base of the
|
||||
* GPIO space, and the device-tree doesn't help.
|
||||
*/
|
||||
offset = *reg;
|
||||
if (offset < KEYLARGO_GPIO_LEVELS0)
|
||||
offset += KEYLARGO_GPIO_LEVELS0;
|
||||
return offset;
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
|
||||
{
|
||||
/* Ok, this could be made a bit smarter, but let's be robust for now. We
|
||||
* always force a speed change to high speed before sleep, to make sure
|
||||
* we have appropriate voltage and/or bus speed for the wakeup process,
|
||||
* and to make sure our loops_per_jiffies are "good enough", that is will
|
||||
* not cause too short delays if we sleep in low speed and wake in high
|
||||
* speed..
|
||||
*/
|
||||
no_schedule = 1;
|
||||
sleep_freq = cur_freq;
|
||||
if (cur_freq == low_freq && !is_pmu_based)
|
||||
do_set_cpu_speed(policy, CPUFREQ_HIGH, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
|
||||
{
|
||||
/* If we resume, first check if we have a get() function */
|
||||
if (get_speed_proc)
|
||||
cur_freq = get_speed_proc();
|
||||
else
|
||||
cur_freq = 0;
|
||||
|
||||
/* We don't, hrm... we don't really know our speed here, best
|
||||
* is that we force a switch to whatever it was, which is
|
||||
* probably high speed due to our suspend() routine
|
||||
*/
|
||||
do_set_cpu_speed(policy, sleep_freq == low_freq ?
|
||||
CPUFREQ_LOW : CPUFREQ_HIGH, 0);
|
||||
|
||||
ppc_proc_freq = cur_freq * 1000ul;
|
||||
|
||||
no_schedule = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct cpufreq_driver pmac_cpufreq_driver = {
|
||||
.verify = pmac_cpufreq_verify,
|
||||
.target = pmac_cpufreq_target,
|
||||
.get = pmac_cpufreq_get_speed,
|
||||
.init = pmac_cpufreq_cpu_init,
|
||||
.suspend = pmac_cpufreq_suspend,
|
||||
.resume = pmac_cpufreq_resume,
|
||||
.flags = CPUFREQ_PM_NO_WARN,
|
||||
.attr = pmac_cpu_freqs_attr,
|
||||
.name = "powermac",
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
|
||||
static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
|
||||
{
|
||||
struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
|
||||
"voltage-gpio");
|
||||
struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
|
||||
"frequency-gpio");
|
||||
struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
|
||||
"slewing-done");
|
||||
const u32 *value;
|
||||
|
||||
/*
|
||||
* Check to see if it's GPIO driven or PMU only
|
||||
*
|
||||
* The way we extract the GPIO address is slightly hackish, but it
|
||||
* works well enough for now. We need to abstract the whole GPIO
|
||||
* stuff sooner or later anyway
|
||||
*/
|
||||
|
||||
if (volt_gpio_np)
|
||||
voltage_gpio = read_gpio(volt_gpio_np);
|
||||
if (freq_gpio_np)
|
||||
frequency_gpio = read_gpio(freq_gpio_np);
|
||||
if (slew_done_gpio_np)
|
||||
slew_done_gpio = read_gpio(slew_done_gpio_np);
|
||||
|
||||
/* If we use the frequency GPIOs, calculate the min/max speeds based
|
||||
* on the bus frequencies
|
||||
*/
|
||||
if (frequency_gpio && slew_done_gpio) {
|
||||
int lenp, rc;
|
||||
const u32 *freqs, *ratio;
|
||||
|
||||
freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
|
||||
lenp /= sizeof(u32);
|
||||
if (freqs == NULL || lenp != 2) {
|
||||
printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
|
||||
return 1;
|
||||
}
|
||||
ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
|
||||
NULL);
|
||||
if (ratio == NULL) {
|
||||
printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Get the min/max bus frequencies */
|
||||
low_freq = min(freqs[0], freqs[1]);
|
||||
hi_freq = max(freqs[0], freqs[1]);
|
||||
|
||||
/* Grrrr.. It _seems_ that the device-tree is lying on the low bus
|
||||
* frequency, it claims it to be around 84Mhz on some models while
|
||||
* it appears to be approx. 101Mhz on all. Let's hack around here...
|
||||
* fortunately, we don't need to be too precise
|
||||
*/
|
||||
if (low_freq < 98000000)
|
||||
low_freq = 101000000;
|
||||
|
||||
/* Convert those to CPU core clocks */
|
||||
low_freq = (low_freq * (*ratio)) / 2000;
|
||||
hi_freq = (hi_freq * (*ratio)) / 2000;
|
||||
|
||||
/* Now we get the frequencies, we read the GPIO to see what is out current
|
||||
* speed
|
||||
*/
|
||||
rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
|
||||
cur_freq = (rc & 0x01) ? hi_freq : low_freq;
|
||||
|
||||
set_speed_proc = gpios_set_cpu_speed;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* If we use the PMU, look for the min & max frequencies in the
|
||||
* device-tree
|
||||
*/
|
||||
value = of_get_property(cpunode, "min-clock-frequency", NULL);
|
||||
if (!value)
|
||||
return 1;
|
||||
low_freq = (*value) / 1000;
|
||||
/* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
|
||||
* here */
|
||||
if (low_freq < 100000)
|
||||
low_freq *= 10;
|
||||
|
||||
value = of_get_property(cpunode, "max-clock-frequency", NULL);
|
||||
if (!value)
|
||||
return 1;
|
||||
hi_freq = (*value) / 1000;
|
||||
set_speed_proc = pmu_set_cpu_speed;
|
||||
is_pmu_based = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
|
||||
{
|
||||
struct device_node *volt_gpio_np;
|
||||
|
||||
if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
|
||||
return 1;
|
||||
|
||||
volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
|
||||
if (volt_gpio_np)
|
||||
voltage_gpio = read_gpio(volt_gpio_np);
|
||||
if (!voltage_gpio){
|
||||
printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* OF only reports the high frequency */
|
||||
hi_freq = cur_freq;
|
||||
low_freq = cur_freq/2;
|
||||
|
||||
/* Read actual frequency from CPU */
|
||||
cur_freq = dfs_get_cpu_speed();
|
||||
set_speed_proc = dfs_set_cpu_speed;
|
||||
get_speed_proc = dfs_get_cpu_speed;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
|
||||
{
|
||||
struct device_node *volt_gpio_np;
|
||||
u32 pvr;
|
||||
const u32 *value;
|
||||
|
||||
if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
|
||||
return 1;
|
||||
|
||||
hi_freq = cur_freq;
|
||||
value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
|
||||
if (!value)
|
||||
return 1;
|
||||
low_freq = (*value) / 1000;
|
||||
|
||||
volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
|
||||
if (volt_gpio_np)
|
||||
voltage_gpio = read_gpio(volt_gpio_np);
|
||||
|
||||
pvr = mfspr(SPRN_PVR);
|
||||
has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
|
||||
|
||||
set_speed_proc = cpu_750fx_cpu_speed;
|
||||
get_speed_proc = cpu_750fx_get_cpu_speed;
|
||||
cur_freq = cpu_750fx_get_cpu_speed();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Currently, we support the following machines:
|
||||
*
|
||||
* - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
|
||||
* - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
|
||||
* - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
|
||||
* - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
|
||||
* - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
|
||||
* - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
|
||||
* - Recent MacRISC3 laptops
|
||||
* - All new machines with 7447A CPUs
|
||||
*/
|
||||
static int __init pmac_cpufreq_setup(void)
|
||||
{
|
||||
struct device_node *cpunode;
|
||||
const u32 *value;
|
||||
|
||||
if (strstr(cmd_line, "nocpufreq"))
|
||||
return 0;
|
||||
|
||||
/* Assume only one CPU */
|
||||
cpunode = of_find_node_by_type(NULL, "cpu");
|
||||
if (!cpunode)
|
||||
goto out;
|
||||
|
||||
/* Get current cpu clock freq */
|
||||
value = of_get_property(cpunode, "clock-frequency", NULL);
|
||||
if (!value)
|
||||
goto out;
|
||||
cur_freq = (*value) / 1000;
|
||||
transition_latency = CPUFREQ_ETERNAL;
|
||||
|
||||
/* Check for 7447A based MacRISC3 */
|
||||
if (of_machine_is_compatible("MacRISC3") &&
|
||||
of_get_property(cpunode, "dynamic-power-step", NULL) &&
|
||||
PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
|
||||
pmac_cpufreq_init_7447A(cpunode);
|
||||
transition_latency = 8000000;
|
||||
/* Check for other MacRISC3 machines */
|
||||
} else if (of_machine_is_compatible("PowerBook3,4") ||
|
||||
of_machine_is_compatible("PowerBook3,5") ||
|
||||
of_machine_is_compatible("MacRISC3")) {
|
||||
pmac_cpufreq_init_MacRISC3(cpunode);
|
||||
/* Else check for iBook2 500/600 */
|
||||
} else if (of_machine_is_compatible("PowerBook4,1")) {
|
||||
hi_freq = cur_freq;
|
||||
low_freq = 400000;
|
||||
set_speed_proc = pmu_set_cpu_speed;
|
||||
is_pmu_based = 1;
|
||||
}
|
||||
/* Else check for TiPb 550 */
|
||||
else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
|
||||
hi_freq = cur_freq;
|
||||
low_freq = 500000;
|
||||
set_speed_proc = pmu_set_cpu_speed;
|
||||
is_pmu_based = 1;
|
||||
}
|
||||
/* Else check for TiPb 400 & 500 */
|
||||
else if (of_machine_is_compatible("PowerBook3,2")) {
|
||||
/* We only know about the 400 MHz and the 500Mhz model
|
||||
* they both have 300 MHz as low frequency
|
||||
*/
|
||||
if (cur_freq < 350000 || cur_freq > 550000)
|
||||
goto out;
|
||||
hi_freq = cur_freq;
|
||||
low_freq = 300000;
|
||||
set_speed_proc = pmu_set_cpu_speed;
|
||||
is_pmu_based = 1;
|
||||
}
|
||||
/* Else check for 750FX */
|
||||
else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
|
||||
pmac_cpufreq_init_750FX(cpunode);
|
||||
out:
|
||||
of_node_put(cpunode);
|
||||
if (set_speed_proc == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
|
||||
pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
|
||||
ppc_proc_freq = cur_freq * 1000ul;
|
||||
|
||||
printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
|
||||
printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
|
||||
low_freq/1000, hi_freq/1000, cur_freq/1000);
|
||||
|
||||
return cpufreq_register_driver(&pmac_cpufreq_driver);
|
||||
}
|
||||
|
||||
module_init(pmac_cpufreq_setup);
|
||||
|
||||
746
drivers/cpufreq/pmac64-cpufreq.c
Normal file
746
drivers/cpufreq/pmac64-cpufreq.c
Normal file
|
|
@ -0,0 +1,746 @@
|
|||
/*
|
||||
* Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
* and Markus Demleitner <msdemlei@cl.uni-heidelberg.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This driver adds basic cpufreq support for SMU & 970FX based G5 Macs,
|
||||
* that is iMac G5 and latest single CPU desktop.
|
||||
*/
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/cputable.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/smu.h>
|
||||
#include <asm/pmac_pfunc.h>
|
||||
|
||||
#define DBG(fmt...) pr_debug(fmt)
|
||||
|
||||
/* see 970FX user manual */
|
||||
|
||||
#define SCOM_PCR 0x0aa001 /* PCR scom addr */
|
||||
|
||||
#define PCR_HILO_SELECT 0x80000000U /* 1 = PCR, 0 = PCRH */
|
||||
#define PCR_SPEED_FULL 0x00000000U /* 1:1 speed value */
|
||||
#define PCR_SPEED_HALF 0x00020000U /* 1:2 speed value */
|
||||
#define PCR_SPEED_QUARTER 0x00040000U /* 1:4 speed value */
|
||||
#define PCR_SPEED_MASK 0x000e0000U /* speed mask */
|
||||
#define PCR_SPEED_SHIFT 17
|
||||
#define PCR_FREQ_REQ_VALID 0x00010000U /* freq request valid */
|
||||
#define PCR_VOLT_REQ_VALID 0x00008000U /* volt request valid */
|
||||
#define PCR_TARGET_TIME_MASK 0x00006000U /* target time */
|
||||
#define PCR_STATLAT_MASK 0x00001f00U /* STATLAT value */
|
||||
#define PCR_SNOOPLAT_MASK 0x000000f0U /* SNOOPLAT value */
|
||||
#define PCR_SNOOPACC_MASK 0x0000000fU /* SNOOPACC value */
|
||||
|
||||
#define SCOM_PSR 0x408001 /* PSR scom addr */
|
||||
/* warning: PSR is a 64 bits register */
|
||||
#define PSR_CMD_RECEIVED 0x2000000000000000U /* command received */
|
||||
#define PSR_CMD_COMPLETED 0x1000000000000000U /* command completed */
|
||||
#define PSR_CUR_SPEED_MASK 0x0300000000000000U /* current speed */
|
||||
#define PSR_CUR_SPEED_SHIFT (56)
|
||||
|
||||
/*
|
||||
* The G5 only supports two frequencies (Quarter speed is not supported)
|
||||
*/
|
||||
#define CPUFREQ_HIGH 0
|
||||
#define CPUFREQ_LOW 1
|
||||
|
||||
static struct cpufreq_frequency_table g5_cpu_freqs[] = {
|
||||
{CPUFREQ_HIGH, 0},
|
||||
{CPUFREQ_LOW, 0},
|
||||
{0, CPUFREQ_TABLE_END},
|
||||
};
|
||||
|
||||
static struct freq_attr* g5_cpu_freqs_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
/* Power mode data is an array of the 32 bits PCR values to use for
|
||||
* the various frequencies, retrieved from the device-tree
|
||||
*/
|
||||
static int g5_pmode_cur;
|
||||
|
||||
static void (*g5_switch_volt)(int speed_mode);
|
||||
static int (*g5_switch_freq)(int speed_mode);
|
||||
static int (*g5_query_freq)(void);
|
||||
|
||||
static DEFINE_MUTEX(g5_switch_mutex);
|
||||
|
||||
static unsigned long transition_latency;
|
||||
|
||||
#ifdef CONFIG_PMAC_SMU
|
||||
|
||||
static const u32 *g5_pmode_data;
|
||||
static int g5_pmode_max;
|
||||
|
||||
static struct smu_sdbp_fvt *g5_fvt_table; /* table of op. points */
|
||||
static int g5_fvt_count; /* number of op. points */
|
||||
static int g5_fvt_cur; /* current op. point */
|
||||
|
||||
/*
|
||||
* SMU based voltage switching for Neo2 platforms
|
||||
*/
|
||||
|
||||
static void g5_smu_switch_volt(int speed_mode)
|
||||
{
|
||||
struct smu_simple_cmd cmd;
|
||||
|
||||
DECLARE_COMPLETION_ONSTACK(comp);
|
||||
smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, smu_done_complete,
|
||||
&comp, 'V', 'S', 'L', 'E', 'W',
|
||||
0xff, g5_fvt_cur+1, speed_mode);
|
||||
wait_for_completion(&comp);
|
||||
}
|
||||
|
||||
/*
|
||||
* Platform function based voltage/vdnap switching for Neo2
|
||||
*/
|
||||
|
||||
static struct pmf_function *pfunc_set_vdnap0;
|
||||
static struct pmf_function *pfunc_vdnap0_complete;
|
||||
|
||||
static void g5_vdnap_switch_volt(int speed_mode)
|
||||
{
|
||||
struct pmf_args args;
|
||||
u32 slew, done = 0;
|
||||
unsigned long timeout;
|
||||
|
||||
slew = (speed_mode == CPUFREQ_LOW) ? 1 : 0;
|
||||
args.count = 1;
|
||||
args.u[0].p = &slew;
|
||||
|
||||
pmf_call_one(pfunc_set_vdnap0, &args);
|
||||
|
||||
/* It's an irq GPIO so we should be able to just block here,
|
||||
* I'll do that later after I've properly tested the IRQ code for
|
||||
* platform functions
|
||||
*/
|
||||
timeout = jiffies + HZ/10;
|
||||
while(!time_after(jiffies, timeout)) {
|
||||
args.count = 1;
|
||||
args.u[0].p = &done;
|
||||
pmf_call_one(pfunc_vdnap0_complete, &args);
|
||||
if (done)
|
||||
break;
|
||||
msleep(1);
|
||||
}
|
||||
if (done == 0)
|
||||
printk(KERN_WARNING "cpufreq: Timeout in clock slewing !\n");
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* SCOM based frequency switching for 970FX rev3
|
||||
*/
|
||||
static int g5_scom_switch_freq(int speed_mode)
|
||||
{
|
||||
unsigned long flags;
|
||||
int to;
|
||||
|
||||
/* If frequency is going up, first ramp up the voltage */
|
||||
if (speed_mode < g5_pmode_cur)
|
||||
g5_switch_volt(speed_mode);
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
/* Clear PCR high */
|
||||
scom970_write(SCOM_PCR, 0);
|
||||
/* Clear PCR low */
|
||||
scom970_write(SCOM_PCR, PCR_HILO_SELECT | 0);
|
||||
/* Set PCR low */
|
||||
scom970_write(SCOM_PCR, PCR_HILO_SELECT |
|
||||
g5_pmode_data[speed_mode]);
|
||||
|
||||
/* Wait for completion */
|
||||
for (to = 0; to < 10; to++) {
|
||||
unsigned long psr = scom970_read(SCOM_PSR);
|
||||
|
||||
if ((psr & PSR_CMD_RECEIVED) == 0 &&
|
||||
(((psr >> PSR_CUR_SPEED_SHIFT) ^
|
||||
(g5_pmode_data[speed_mode] >> PCR_SPEED_SHIFT)) & 0x3)
|
||||
== 0)
|
||||
break;
|
||||
if (psr & PSR_CMD_COMPLETED)
|
||||
break;
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
||||
/* If frequency is going down, last ramp the voltage */
|
||||
if (speed_mode > g5_pmode_cur)
|
||||
g5_switch_volt(speed_mode);
|
||||
|
||||
g5_pmode_cur = speed_mode;
|
||||
ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int g5_scom_query_freq(void)
|
||||
{
|
||||
unsigned long psr = scom970_read(SCOM_PSR);
|
||||
int i;
|
||||
|
||||
for (i = 0; i <= g5_pmode_max; i++)
|
||||
if ((((psr >> PSR_CUR_SPEED_SHIFT) ^
|
||||
(g5_pmode_data[i] >> PCR_SPEED_SHIFT)) & 0x3) == 0)
|
||||
break;
|
||||
return i;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fake voltage switching for platforms with missing support
|
||||
*/
|
||||
|
||||
static void g5_dummy_switch_volt(int speed_mode)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PMAC_SMU */
|
||||
|
||||
/*
|
||||
* Platform function based voltage switching for PowerMac7,2 & 7,3
|
||||
*/
|
||||
|
||||
static struct pmf_function *pfunc_cpu0_volt_high;
|
||||
static struct pmf_function *pfunc_cpu0_volt_low;
|
||||
static struct pmf_function *pfunc_cpu1_volt_high;
|
||||
static struct pmf_function *pfunc_cpu1_volt_low;
|
||||
|
||||
static void g5_pfunc_switch_volt(int speed_mode)
|
||||
{
|
||||
if (speed_mode == CPUFREQ_HIGH) {
|
||||
if (pfunc_cpu0_volt_high)
|
||||
pmf_call_one(pfunc_cpu0_volt_high, NULL);
|
||||
if (pfunc_cpu1_volt_high)
|
||||
pmf_call_one(pfunc_cpu1_volt_high, NULL);
|
||||
} else {
|
||||
if (pfunc_cpu0_volt_low)
|
||||
pmf_call_one(pfunc_cpu0_volt_low, NULL);
|
||||
if (pfunc_cpu1_volt_low)
|
||||
pmf_call_one(pfunc_cpu1_volt_low, NULL);
|
||||
}
|
||||
msleep(10); /* should be faster , to fix */
|
||||
}
|
||||
|
||||
/*
|
||||
* Platform function based frequency switching for PowerMac7,2 & 7,3
|
||||
*/
|
||||
|
||||
static struct pmf_function *pfunc_cpu_setfreq_high;
|
||||
static struct pmf_function *pfunc_cpu_setfreq_low;
|
||||
static struct pmf_function *pfunc_cpu_getfreq;
|
||||
static struct pmf_function *pfunc_slewing_done;
|
||||
|
||||
static int g5_pfunc_switch_freq(int speed_mode)
|
||||
{
|
||||
struct pmf_args args;
|
||||
u32 done = 0;
|
||||
unsigned long timeout;
|
||||
int rc;
|
||||
|
||||
DBG("g5_pfunc_switch_freq(%d)\n", speed_mode);
|
||||
|
||||
/* If frequency is going up, first ramp up the voltage */
|
||||
if (speed_mode < g5_pmode_cur)
|
||||
g5_switch_volt(speed_mode);
|
||||
|
||||
/* Do it */
|
||||
if (speed_mode == CPUFREQ_HIGH)
|
||||
rc = pmf_call_one(pfunc_cpu_setfreq_high, NULL);
|
||||
else
|
||||
rc = pmf_call_one(pfunc_cpu_setfreq_low, NULL);
|
||||
|
||||
if (rc)
|
||||
printk(KERN_WARNING "cpufreq: pfunc switch error %d\n", rc);
|
||||
|
||||
/* It's an irq GPIO so we should be able to just block here,
|
||||
* I'll do that later after I've properly tested the IRQ code for
|
||||
* platform functions
|
||||
*/
|
||||
timeout = jiffies + HZ/10;
|
||||
while(!time_after(jiffies, timeout)) {
|
||||
args.count = 1;
|
||||
args.u[0].p = &done;
|
||||
pmf_call_one(pfunc_slewing_done, &args);
|
||||
if (done)
|
||||
break;
|
||||
msleep(1);
|
||||
}
|
||||
if (done == 0)
|
||||
printk(KERN_WARNING "cpufreq: Timeout in clock slewing !\n");
|
||||
|
||||
/* If frequency is going down, last ramp the voltage */
|
||||
if (speed_mode > g5_pmode_cur)
|
||||
g5_switch_volt(speed_mode);
|
||||
|
||||
g5_pmode_cur = speed_mode;
|
||||
ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int g5_pfunc_query_freq(void)
|
||||
{
|
||||
struct pmf_args args;
|
||||
u32 val = 0;
|
||||
|
||||
args.count = 1;
|
||||
args.u[0].p = &val;
|
||||
pmf_call_one(pfunc_cpu_getfreq, &args);
|
||||
return val ? CPUFREQ_HIGH : CPUFREQ_LOW;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Common interface to the cpufreq core
|
||||
*/
|
||||
|
||||
static int g5_cpufreq_verify(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, g5_cpu_freqs);
|
||||
}
|
||||
|
||||
static int g5_cpufreq_target(struct cpufreq_policy *policy,
|
||||
unsigned int target_freq, unsigned int relation)
|
||||
{
|
||||
unsigned int newstate = 0;
|
||||
struct cpufreq_freqs freqs;
|
||||
int rc;
|
||||
|
||||
if (cpufreq_frequency_table_target(policy, g5_cpu_freqs,
|
||||
target_freq, relation, &newstate))
|
||||
return -EINVAL;
|
||||
|
||||
if (g5_pmode_cur == newstate)
|
||||
return 0;
|
||||
|
||||
mutex_lock(&g5_switch_mutex);
|
||||
|
||||
freqs.old = g5_cpu_freqs[g5_pmode_cur].frequency;
|
||||
freqs.new = g5_cpu_freqs[newstate].frequency;
|
||||
|
||||
cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
|
||||
rc = g5_switch_freq(newstate);
|
||||
cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
mutex_unlock(&g5_switch_mutex);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static unsigned int g5_cpufreq_get_speed(unsigned int cpu)
|
||||
{
|
||||
return g5_cpu_freqs[g5_pmode_cur].frequency;
|
||||
}
|
||||
|
||||
static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
policy->cpuinfo.transition_latency = transition_latency;
|
||||
policy->cur = g5_cpu_freqs[g5_query_freq()].frequency;
|
||||
/* secondary CPUs are tied to the primary one by the
|
||||
* cpufreq core if in the secondary policy we tell it that
|
||||
* it actually must be one policy together with all others. */
|
||||
cpumask_copy(policy->cpus, cpu_online_mask);
|
||||
cpufreq_frequency_table_get_attr(g5_cpu_freqs, policy->cpu);
|
||||
|
||||
return cpufreq_frequency_table_cpuinfo(policy,
|
||||
g5_cpu_freqs);
|
||||
}
|
||||
|
||||
|
||||
static struct cpufreq_driver g5_cpufreq_driver = {
|
||||
.name = "powermac",
|
||||
.owner = THIS_MODULE,
|
||||
.flags = CPUFREQ_CONST_LOOPS,
|
||||
.init = g5_cpufreq_cpu_init,
|
||||
.verify = g5_cpufreq_verify,
|
||||
.target = g5_cpufreq_target,
|
||||
.get = g5_cpufreq_get_speed,
|
||||
.attr = g5_cpu_freqs_attr,
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_PMAC_SMU
|
||||
|
||||
static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
|
||||
{
|
||||
struct device_node *cpunode;
|
||||
unsigned int psize, ssize;
|
||||
unsigned long max_freq;
|
||||
char *freq_method, *volt_method;
|
||||
const u32 *valp;
|
||||
u32 pvr_hi;
|
||||
int use_volts_vdnap = 0;
|
||||
int use_volts_smu = 0;
|
||||
int rc = -ENODEV;
|
||||
|
||||
/* Check supported platforms */
|
||||
if (of_machine_is_compatible("PowerMac8,1") ||
|
||||
of_machine_is_compatible("PowerMac8,2") ||
|
||||
of_machine_is_compatible("PowerMac9,1"))
|
||||
use_volts_smu = 1;
|
||||
else if (of_machine_is_compatible("PowerMac11,2"))
|
||||
use_volts_vdnap = 1;
|
||||
else
|
||||
return -ENODEV;
|
||||
|
||||
/* Get first CPU node */
|
||||
for (cpunode = NULL;
|
||||
(cpunode = of_get_next_child(cpus, cpunode)) != NULL;) {
|
||||
const u32 *reg = of_get_property(cpunode, "reg", NULL);
|
||||
if (reg == NULL || (*reg) != 0)
|
||||
continue;
|
||||
if (!strcmp(cpunode->type, "cpu"))
|
||||
break;
|
||||
}
|
||||
if (cpunode == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find any CPU 0 node\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Check 970FX for now */
|
||||
valp = of_get_property(cpunode, "cpu-version", NULL);
|
||||
if (!valp) {
|
||||
DBG("No cpu-version property !\n");
|
||||
goto bail_noprops;
|
||||
}
|
||||
pvr_hi = (*valp) >> 16;
|
||||
if (pvr_hi != 0x3c && pvr_hi != 0x44) {
|
||||
printk(KERN_ERR "cpufreq: Unsupported CPU version\n");
|
||||
goto bail_noprops;
|
||||
}
|
||||
|
||||
/* Look for the powertune data in the device-tree */
|
||||
g5_pmode_data = of_get_property(cpunode, "power-mode-data",&psize);
|
||||
if (!g5_pmode_data) {
|
||||
DBG("No power-mode-data !\n");
|
||||
goto bail_noprops;
|
||||
}
|
||||
g5_pmode_max = psize / sizeof(u32) - 1;
|
||||
|
||||
if (use_volts_smu) {
|
||||
const struct smu_sdbp_header *shdr;
|
||||
|
||||
/* Look for the FVT table */
|
||||
shdr = smu_get_sdb_partition(SMU_SDB_FVT_ID, NULL);
|
||||
if (!shdr)
|
||||
goto bail_noprops;
|
||||
g5_fvt_table = (struct smu_sdbp_fvt *)&shdr[1];
|
||||
ssize = (shdr->len * sizeof(u32)) -
|
||||
sizeof(struct smu_sdbp_header);
|
||||
g5_fvt_count = ssize / sizeof(struct smu_sdbp_fvt);
|
||||
g5_fvt_cur = 0;
|
||||
|
||||
/* Sanity checking */
|
||||
if (g5_fvt_count < 1 || g5_pmode_max < 1)
|
||||
goto bail_noprops;
|
||||
|
||||
g5_switch_volt = g5_smu_switch_volt;
|
||||
volt_method = "SMU";
|
||||
} else if (use_volts_vdnap) {
|
||||
struct device_node *root;
|
||||
|
||||
root = of_find_node_by_path("/");
|
||||
if (root == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find root of "
|
||||
"device tree\n");
|
||||
goto bail_noprops;
|
||||
}
|
||||
pfunc_set_vdnap0 = pmf_find_function(root, "set-vdnap0");
|
||||
pfunc_vdnap0_complete =
|
||||
pmf_find_function(root, "slewing-done");
|
||||
if (pfunc_set_vdnap0 == NULL ||
|
||||
pfunc_vdnap0_complete == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find required "
|
||||
"platform function\n");
|
||||
goto bail_noprops;
|
||||
}
|
||||
|
||||
g5_switch_volt = g5_vdnap_switch_volt;
|
||||
volt_method = "GPIO";
|
||||
} else {
|
||||
g5_switch_volt = g5_dummy_switch_volt;
|
||||
volt_method = "none";
|
||||
}
|
||||
|
||||
/*
|
||||
* From what I see, clock-frequency is always the maximal frequency.
|
||||
* The current driver can not slew sysclk yet, so we really only deal
|
||||
* with powertune steps for now. We also only implement full freq and
|
||||
* half freq in this version. So far, I haven't yet seen a machine
|
||||
* supporting anything else.
|
||||
*/
|
||||
valp = of_get_property(cpunode, "clock-frequency", NULL);
|
||||
if (!valp)
|
||||
return -ENODEV;
|
||||
max_freq = (*valp)/1000;
|
||||
g5_cpu_freqs[0].frequency = max_freq;
|
||||
g5_cpu_freqs[1].frequency = max_freq/2;
|
||||
|
||||
/* Set callbacks */
|
||||
transition_latency = 12000;
|
||||
g5_switch_freq = g5_scom_switch_freq;
|
||||
g5_query_freq = g5_scom_query_freq;
|
||||
freq_method = "SCOM";
|
||||
|
||||
/* Force apply current frequency to make sure everything is in
|
||||
* sync (voltage is right for example). Firmware may leave us with
|
||||
* a strange setting ...
|
||||
*/
|
||||
g5_switch_volt(CPUFREQ_HIGH);
|
||||
msleep(10);
|
||||
g5_pmode_cur = -1;
|
||||
g5_switch_freq(g5_query_freq());
|
||||
|
||||
printk(KERN_INFO "Registering G5 CPU frequency driver\n");
|
||||
printk(KERN_INFO "Frequency method: %s, Voltage method: %s\n",
|
||||
freq_method, volt_method);
|
||||
printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Cur: %d MHz\n",
|
||||
g5_cpu_freqs[1].frequency/1000,
|
||||
g5_cpu_freqs[0].frequency/1000,
|
||||
g5_cpu_freqs[g5_pmode_cur].frequency/1000);
|
||||
|
||||
rc = cpufreq_register_driver(&g5_cpufreq_driver);
|
||||
|
||||
/* We keep the CPU node on hold... hopefully, Apple G5 don't have
|
||||
* hotplug CPU with a dynamic device-tree ...
|
||||
*/
|
||||
return rc;
|
||||
|
||||
bail_noprops:
|
||||
of_node_put(cpunode);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PMAC_SMU */
|
||||
|
||||
|
||||
static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
|
||||
{
|
||||
struct device_node *cpuid = NULL, *hwclock = NULL, *cpunode = NULL;
|
||||
const u8 *eeprom = NULL;
|
||||
const u32 *valp;
|
||||
u64 max_freq, min_freq, ih, il;
|
||||
int has_volt = 1, rc = 0;
|
||||
|
||||
DBG("cpufreq: Initializing for PowerMac7,2, PowerMac7,3 and"
|
||||
" RackMac3,1...\n");
|
||||
|
||||
/* Get first CPU node */
|
||||
for (cpunode = NULL;
|
||||
(cpunode = of_get_next_child(cpus, cpunode)) != NULL;) {
|
||||
if (!strcmp(cpunode->type, "cpu"))
|
||||
break;
|
||||
}
|
||||
if (cpunode == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find any CPU node\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Lookup the cpuid eeprom node */
|
||||
cpuid = of_find_node_by_path("/u3@0,f8000000/i2c@f8001000/cpuid@a0");
|
||||
if (cpuid != NULL)
|
||||
eeprom = of_get_property(cpuid, "cpuid", NULL);
|
||||
if (eeprom == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find cpuid EEPROM !\n");
|
||||
rc = -ENODEV;
|
||||
goto bail;
|
||||
}
|
||||
|
||||
/* Lookup the i2c hwclock */
|
||||
for (hwclock = NULL;
|
||||
(hwclock = of_find_node_by_name(hwclock, "i2c-hwclock")) != NULL;){
|
||||
const char *loc = of_get_property(hwclock,
|
||||
"hwctrl-location", NULL);
|
||||
if (loc == NULL)
|
||||
continue;
|
||||
if (strcmp(loc, "CPU CLOCK"))
|
||||
continue;
|
||||
if (!of_get_property(hwclock, "platform-get-frequency", NULL))
|
||||
continue;
|
||||
break;
|
||||
}
|
||||
if (hwclock == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find i2c clock chip !\n");
|
||||
rc = -ENODEV;
|
||||
goto bail;
|
||||
}
|
||||
|
||||
DBG("cpufreq: i2c clock chip found: %s\n", hwclock->full_name);
|
||||
|
||||
/* Now get all the platform functions */
|
||||
pfunc_cpu_getfreq =
|
||||
pmf_find_function(hwclock, "get-frequency");
|
||||
pfunc_cpu_setfreq_high =
|
||||
pmf_find_function(hwclock, "set-frequency-high");
|
||||
pfunc_cpu_setfreq_low =
|
||||
pmf_find_function(hwclock, "set-frequency-low");
|
||||
pfunc_slewing_done =
|
||||
pmf_find_function(hwclock, "slewing-done");
|
||||
pfunc_cpu0_volt_high =
|
||||
pmf_find_function(hwclock, "set-voltage-high-0");
|
||||
pfunc_cpu0_volt_low =
|
||||
pmf_find_function(hwclock, "set-voltage-low-0");
|
||||
pfunc_cpu1_volt_high =
|
||||
pmf_find_function(hwclock, "set-voltage-high-1");
|
||||
pfunc_cpu1_volt_low =
|
||||
pmf_find_function(hwclock, "set-voltage-low-1");
|
||||
|
||||
/* Check we have minimum requirements */
|
||||
if (pfunc_cpu_getfreq == NULL || pfunc_cpu_setfreq_high == NULL ||
|
||||
pfunc_cpu_setfreq_low == NULL || pfunc_slewing_done == NULL) {
|
||||
printk(KERN_ERR "cpufreq: Can't find platform functions !\n");
|
||||
rc = -ENODEV;
|
||||
goto bail;
|
||||
}
|
||||
|
||||
/* Check that we have complete sets */
|
||||
if (pfunc_cpu0_volt_high == NULL || pfunc_cpu0_volt_low == NULL) {
|
||||
pmf_put_function(pfunc_cpu0_volt_high);
|
||||
pmf_put_function(pfunc_cpu0_volt_low);
|
||||
pfunc_cpu0_volt_high = pfunc_cpu0_volt_low = NULL;
|
||||
has_volt = 0;
|
||||
}
|
||||
if (!has_volt ||
|
||||
pfunc_cpu1_volt_high == NULL || pfunc_cpu1_volt_low == NULL) {
|
||||
pmf_put_function(pfunc_cpu1_volt_high);
|
||||
pmf_put_function(pfunc_cpu1_volt_low);
|
||||
pfunc_cpu1_volt_high = pfunc_cpu1_volt_low = NULL;
|
||||
}
|
||||
|
||||
/* Note: The device tree also contains a "platform-set-values"
|
||||
* function for which I haven't quite figured out the usage. It
|
||||
* might have to be called on init and/or wakeup, I'm not too sure
|
||||
* but things seem to work fine without it so far ...
|
||||
*/
|
||||
|
||||
/* Get max frequency from device-tree */
|
||||
valp = of_get_property(cpunode, "clock-frequency", NULL);
|
||||
if (!valp) {
|
||||
printk(KERN_ERR "cpufreq: Can't find CPU frequency !\n");
|
||||
rc = -ENODEV;
|
||||
goto bail;
|
||||
}
|
||||
|
||||
max_freq = (*valp)/1000;
|
||||
|
||||
/* Now calculate reduced frequency by using the cpuid input freq
|
||||
* ratio. This requires 64 bits math unless we are willing to lose
|
||||
* some precision
|
||||
*/
|
||||
ih = *((u32 *)(eeprom + 0x10));
|
||||
il = *((u32 *)(eeprom + 0x20));
|
||||
|
||||
/* Check for machines with no useful settings */
|
||||
if (il == ih) {
|
||||
printk(KERN_WARNING "cpufreq: No low frequency mode available"
|
||||
" on this model !\n");
|
||||
rc = -ENODEV;
|
||||
goto bail;
|
||||
}
|
||||
|
||||
min_freq = 0;
|
||||
if (ih != 0 && il != 0)
|
||||
min_freq = (max_freq * il) / ih;
|
||||
|
||||
/* Sanity check */
|
||||
if (min_freq >= max_freq || min_freq < 1000) {
|
||||
printk(KERN_ERR "cpufreq: Can't calculate low frequency !\n");
|
||||
rc = -ENXIO;
|
||||
goto bail;
|
||||
}
|
||||
g5_cpu_freqs[0].frequency = max_freq;
|
||||
g5_cpu_freqs[1].frequency = min_freq;
|
||||
|
||||
/* Set callbacks */
|
||||
transition_latency = CPUFREQ_ETERNAL;
|
||||
g5_switch_volt = g5_pfunc_switch_volt;
|
||||
g5_switch_freq = g5_pfunc_switch_freq;
|
||||
g5_query_freq = g5_pfunc_query_freq;
|
||||
|
||||
/* Force apply current frequency to make sure everything is in
|
||||
* sync (voltage is right for example). Firmware may leave us with
|
||||
* a strange setting ...
|
||||
*/
|
||||
g5_switch_volt(CPUFREQ_HIGH);
|
||||
msleep(10);
|
||||
g5_pmode_cur = -1;
|
||||
g5_switch_freq(g5_query_freq());
|
||||
|
||||
printk(KERN_INFO "Registering G5 CPU frequency driver\n");
|
||||
printk(KERN_INFO "Frequency method: i2c/pfunc, "
|
||||
"Voltage method: %s\n", has_volt ? "i2c/pfunc" : "none");
|
||||
printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Cur: %d MHz\n",
|
||||
g5_cpu_freqs[1].frequency/1000,
|
||||
g5_cpu_freqs[0].frequency/1000,
|
||||
g5_cpu_freqs[g5_pmode_cur].frequency/1000);
|
||||
|
||||
rc = cpufreq_register_driver(&g5_cpufreq_driver);
|
||||
bail:
|
||||
if (rc != 0) {
|
||||
pmf_put_function(pfunc_cpu_getfreq);
|
||||
pmf_put_function(pfunc_cpu_setfreq_high);
|
||||
pmf_put_function(pfunc_cpu_setfreq_low);
|
||||
pmf_put_function(pfunc_slewing_done);
|
||||
pmf_put_function(pfunc_cpu0_volt_high);
|
||||
pmf_put_function(pfunc_cpu0_volt_low);
|
||||
pmf_put_function(pfunc_cpu1_volt_high);
|
||||
pmf_put_function(pfunc_cpu1_volt_low);
|
||||
}
|
||||
of_node_put(hwclock);
|
||||
of_node_put(cpuid);
|
||||
of_node_put(cpunode);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int __init g5_cpufreq_init(void)
|
||||
{
|
||||
struct device_node *cpus;
|
||||
int rc = 0;
|
||||
|
||||
cpus = of_find_node_by_path("/cpus");
|
||||
if (cpus == NULL) {
|
||||
DBG("No /cpus node !\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (of_machine_is_compatible("PowerMac7,2") ||
|
||||
of_machine_is_compatible("PowerMac7,3") ||
|
||||
of_machine_is_compatible("RackMac3,1"))
|
||||
rc = g5_pm72_cpufreq_init(cpus);
|
||||
#ifdef CONFIG_PMAC_SMU
|
||||
else
|
||||
rc = g5_neo2_cpufreq_init(cpus);
|
||||
#endif /* CONFIG_PMAC_SMU */
|
||||
|
||||
of_node_put(cpus);
|
||||
return rc;
|
||||
}
|
||||
|
||||
module_init(g5_cpufreq_init);
|
||||
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in a new issue