Merge "ARM: dts: msm: Enable smmu s1 from wlan side"

This commit is contained in:
qctecmdr 2020-08-26 04:59:22 -07:00 • committed by Gerrit - the friendly Code Review server
commit 806bc88b67

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@ -2429,7 +2429,8 @@
<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,
<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;
qcom,iommu-dma = "bypass";
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,wlan-msa-fixed-region = <&pil_wlan_mem>;
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
vdd-cx-mx-supply = <&L4A>;