mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (132 commits) sh: oprofile: Fix up the module build. sh: add UIO support for JPU on SH7722. serial: sh-sci: Fix up port pinmux for SH7366. sh: mach-rsk: Use uImage generation by default for rsk7201/7203. sh: mach-sh03: Fix up pata_platform build breakage. sh: enable deferred io LCDC on Migo-R video: sh_mobile_lcdcfb deferred io support video: deferred io with physically contiguous memory video: deferred io cleanup video: fix deferred io fsync() sh: add LCDC interrupt configuration to AP325 and Migo-R sh_mobile_lcdc: use FB_SYS helpers instead of FB_CFB sh: split coherent pages sh: dma: Kill off ISA DMA wrapper. sh: Conditionalize the code dumper on CONFIG_DUMP_CODE. sh: Kill off the unused SH_ALPHANUMERIC debug option. sh: Enable skipping of bss on debug platforms for sh32 also. doc: Update sh cpufreq documentation. sh: mrshpc_setup_windows() needs to be inline. serial: sh-sci: sci_poll_get_char() is only used by CONFIG_CONSOLE_POLL. ...
This commit is contained in:
Linus Torvalds
commit
81d6e59dab
177 changed files with 9290 additions and 5692 deletions
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@ -160,9 +160,39 @@ struct sh_mobile_i2c_data {
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static void activate_ch(struct sh_mobile_i2c_data *pd)
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{
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unsigned long i2c_clk;
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u_int32_t num;
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u_int32_t denom;
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u_int32_t tmp;
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/* Make sure the clock is enabled */
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clk_enable(pd->clk);
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/* Get clock rate after clock is enabled */
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i2c_clk = clk_get_rate(pd->clk);
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/* Calculate the value for iccl. From the data sheet:
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* iccl = (p clock / transfer rate) * (L / (L + H))
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* where L and H are the SCL low/high ratio (5/4 in this case).
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* We also round off the result.
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*/
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num = i2c_clk * 5;
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denom = NORMAL_SPEED * 9;
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tmp = num * 10 / denom;
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if (tmp % 10 >= 5)
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pd->iccl = (u_int8_t)((num/denom) + 1);
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else
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pd->iccl = (u_int8_t)(num/denom);
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/* Calculate the value for icch. From the data sheet:
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icch = (p clock / transfer rate) * (H / (L + H)) */
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num = i2c_clk * 4;
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tmp = num * 10 / denom;
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if (tmp % 10 >= 5)
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pd->icch = (u_int8_t)((num/denom) + 1);
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else
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pd->icch = (u_int8_t)(num/denom);
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/* Enable channel and configure rx ack */
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iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
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@ -459,40 +489,6 @@ static struct i2c_algorithm sh_mobile_i2c_algorithm = {
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.master_xfer = sh_mobile_i2c_xfer,
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};
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static void sh_mobile_i2c_setup_channel(struct platform_device *dev)
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{
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struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
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unsigned long peripheral_clk = clk_get_rate(pd->clk);
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u_int32_t num;
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u_int32_t denom;
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u_int32_t tmp;
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spin_lock_init(&pd->lock);
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init_waitqueue_head(&pd->wait);
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/* Calculate the value for iccl. From the data sheet:
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* iccl = (p clock / transfer rate) * (L / (L + H))
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* where L and H are the SCL low/high ratio (5/4 in this case).
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* We also round off the result.
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*/
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num = peripheral_clk * 5;
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denom = NORMAL_SPEED * 9;
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tmp = num * 10 / denom;
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if (tmp % 10 >= 5)
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pd->iccl = (u_int8_t)((num/denom) + 1);
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else
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pd->iccl = (u_int8_t)(num/denom);
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/* Calculate the value for icch. From the data sheet:
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icch = (p clock / transfer rate) * (H / (L + H)) */
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num = peripheral_clk * 4;
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tmp = num * 10 / denom;
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if (tmp % 10 >= 5)
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pd->icch = (u_int8_t)((num/denom) + 1);
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else
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pd->icch = (u_int8_t)(num/denom);
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}
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static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
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{
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struct resource *res;
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@ -533,6 +529,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
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struct sh_mobile_i2c_data *pd;
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struct i2c_adapter *adap;
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struct resource *res;
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char clk_name[8];
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int size;
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int ret;
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@ -542,9 +539,10 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
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return -ENOMEM;
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}
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pd->clk = clk_get(&dev->dev, "peripheral_clk");
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snprintf(clk_name, sizeof(clk_name), "i2c%d", dev->id);
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pd->clk = clk_get(&dev->dev, clk_name);
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if (IS_ERR(pd->clk)) {
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dev_err(&dev->dev, "cannot get peripheral clock\n");
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dev_err(&dev->dev, "cannot get clock \"%s\"\n", clk_name);
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ret = PTR_ERR(pd->clk);
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goto err;
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}
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@ -586,7 +584,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
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strlcpy(adap->name, dev->name, sizeof(adap->name));
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sh_mobile_i2c_setup_channel(dev);
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spin_lock_init(&pd->lock);
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init_waitqueue_head(&pd->wait);
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ret = i2c_add_numbered_adapter(adap);
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if (ret < 0) {
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@ -18,6 +18,7 @@
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <asm/sh_keysc.h>
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@ -39,6 +40,7 @@ static const struct {
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struct sh_keysc_priv {
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void __iomem *iomem_base;
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struct clk *clk;
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unsigned long last_keys;
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struct input_dev *input;
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struct sh_keysc_info pdata;
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@ -125,6 +127,7 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev)
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struct sh_keysc_info *pdata;
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struct resource *res;
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struct input_dev *input;
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char clk_name[8];
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int i, k;
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int irq, error;
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@ -165,11 +168,19 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev)
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goto err1;
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}
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snprintf(clk_name, sizeof(clk_name), "keysc%d", pdev->id);
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priv->clk = clk_get(&pdev->dev, clk_name);
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if (IS_ERR(priv->clk)) {
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dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
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error = PTR_ERR(priv->clk);
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goto err2;
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}
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priv->input = input_allocate_device();
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if (!priv->input) {
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dev_err(&pdev->dev, "failed to allocate input device\n");
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error = -ENOMEM;
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goto err2;
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goto err3;
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}
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input = priv->input;
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@ -187,7 +198,7 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev)
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error = request_irq(irq, sh_keysc_isr, 0, pdev->name, pdev);
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if (error) {
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dev_err(&pdev->dev, "failed to request IRQ\n");
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goto err3;
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goto err4;
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}
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for (i = 0; i < SH_KEYSC_MAXKEYS; i++) {
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@ -199,18 +210,22 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev)
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error = input_register_device(input);
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if (error) {
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dev_err(&pdev->dev, "failed to register input device\n");
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goto err4;
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goto err5;
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}
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clk_enable(priv->clk);
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iowrite16((sh_keysc_mode[pdata->mode].kymd << 8) |
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pdata->scan_timing, priv->iomem_base + KYCR1_OFFS);
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iowrite16(0, priv->iomem_base + KYOUTDR_OFFS);
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iowrite16(KYCR2_IRQ_LEVEL, priv->iomem_base + KYCR2_OFFS);
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return 0;
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err4:
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err5:
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free_irq(irq, pdev);
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err3:
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err4:
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input_free_device(input);
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err3:
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clk_put(priv->clk);
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err2:
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iounmap(priv->iomem_base);
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err1:
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@ -230,6 +245,9 @@ static int __devexit sh_keysc_remove(struct platform_device *pdev)
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free_irq(platform_get_irq(pdev, 0), pdev);
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iounmap(priv->iomem_base);
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clk_disable(priv->clk);
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clk_put(priv->clk);
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platform_set_drvdata(pdev, NULL);
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kfree(priv);
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return 0;
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@ -759,7 +759,7 @@ config VIDEO_PXA27x
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config VIDEO_SH_MOBILE_CEU
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tristate "SuperH Mobile CEU Interface driver"
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depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA
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depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK
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select VIDEOBUF_DMA_CONTIG
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---help---
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This is a v4l2 driver for the SuperH Mobile CEU Interface
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@ -31,6 +31,7 @@
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#include <linux/platform_device.h>
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#include <linux/mutex.h>
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#include <linux/videodev2.h>
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#include <linux/clk.h>
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#include <media/v4l2-common.h>
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#include <media/v4l2-dev.h>
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@ -89,6 +90,7 @@ struct sh_mobile_ceu_dev {
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unsigned int irq;
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void __iomem *base;
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struct clk *clk;
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unsigned long video_limit;
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/* lock used to protect videobuf */
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@ -309,6 +311,8 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
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if (ret)
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goto err;
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clk_enable(pcdev->clk);
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ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
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while (ceu_read(pcdev, CSTSR) & 1)
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msleep(1);
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@ -342,6 +346,8 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
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}
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spin_unlock_irqrestore(&pcdev->lock, flags);
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clk_disable(pcdev->clk);
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icd->ops->release(icd);
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dev_info(&icd->dev,
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@ -550,6 +556,7 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
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struct sh_mobile_ceu_dev *pcdev;
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struct resource *res;
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void __iomem *base;
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char clk_name[8];
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unsigned int irq;
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int err = 0;
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@ -615,6 +622,14 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
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goto exit_release_mem;
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}
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snprintf(clk_name, sizeof(clk_name), "ceu%d", pdev->id);
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pcdev->clk = clk_get(&pdev->dev, clk_name);
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if (IS_ERR(pcdev->clk)) {
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dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
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err = PTR_ERR(pcdev->clk);
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goto exit_free_irq;
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}
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pcdev->ici.priv = pcdev;
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pcdev->ici.dev.parent = &pdev->dev;
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pcdev->ici.nr = pdev->id;
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|
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@ -623,10 +638,12 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
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|
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err = soc_camera_host_register(&pcdev->ici);
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if (err)
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goto exit_free_irq;
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goto exit_free_clk;
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|
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return 0;
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|
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exit_free_clk:
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clk_put(pcdev->clk);
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exit_free_irq:
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free_irq(pcdev->irq, pcdev);
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exit_release_mem:
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|
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@ -645,6 +662,7 @@ static int sh_mobile_ceu_remove(struct platform_device *pdev)
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struct sh_mobile_ceu_dev *pcdev = platform_get_drvdata(pdev);
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|
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soc_camera_host_unregister(&pcdev->ici);
|
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clk_put(pcdev->clk);
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free_irq(pcdev->irq, pcdev);
|
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if (platform_get_resource(pdev, IORESOURCE_MEM, 1))
|
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dma_release_declared_memory(&pdev->dev);
|
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|
|
|
|||
|
|
@ -51,7 +51,6 @@
|
|||
#ifdef CONFIG_SUPERH
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#include <asm/clock.h>
|
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#include <asm/sh_bios.h>
|
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#include <asm/kgdb.h>
|
||||
#endif
|
||||
|
||||
#include "sh-sci.h"
|
||||
|
|
@ -65,10 +64,6 @@ struct sci_port {
|
|||
/* Port IRQs: ERI, RXI, TXI, BRI (optional) */
|
||||
unsigned int irqs[SCIx_NR_IRQS];
|
||||
|
||||
/* Port pin configuration */
|
||||
void (*init_pins)(struct uart_port *port,
|
||||
unsigned int cflag);
|
||||
|
||||
/* Port enable callback */
|
||||
void (*enable)(struct uart_port *port);
|
||||
|
||||
|
|
@ -85,10 +80,6 @@ struct sci_port {
|
|||
#endif
|
||||
};
|
||||
|
||||
#ifdef CONFIG_SH_KGDB
|
||||
static struct sci_port *kgdb_sci_port;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
|
||||
static struct sci_port *serial_console_port;
|
||||
#endif
|
||||
|
|
@ -101,21 +92,26 @@ static void sci_stop_tx(struct uart_port *port);
|
|||
static struct sci_port sci_ports[SCI_NPORTS];
|
||||
static struct uart_driver sci_uart_driver;
|
||||
|
||||
#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
|
||||
defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
|
||||
static inline struct sci_port *
|
||||
to_sci_port(struct uart_port *uart)
|
||||
{
|
||||
return container_of(uart, struct sci_port, port);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
|
||||
|
||||
#ifdef CONFIG_CONSOLE_POLL
|
||||
static inline void handle_error(struct uart_port *port)
|
||||
{
|
||||
/* Clear error flags */
|
||||
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
|
||||
}
|
||||
|
||||
static int get_char(struct uart_port *port)
|
||||
static int sci_poll_get_char(struct uart_port *port)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short status;
|
||||
int c;
|
||||
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
do {
|
||||
status = sci_in(port, SCxSR);
|
||||
if (status & SCxSR_ERRORS(port)) {
|
||||
|
|
@ -123,23 +119,21 @@ static int get_char(struct uart_port *port)
|
|||
continue;
|
||||
}
|
||||
} while (!(status & SCxSR_RDxF(port)));
|
||||
|
||||
c = sci_in(port, SCxRDR);
|
||||
sci_in(port, SCxSR); /* Dummy read */
|
||||
|
||||
/* Dummy read */
|
||||
sci_in(port, SCxSR);
|
||||
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
|
||||
return c;
|
||||
}
|
||||
#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
|
||||
static void put_char(struct uart_port *port, char c)
|
||||
static void sci_poll_put_char(struct uart_port *port, unsigned char c)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short status;
|
||||
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
|
||||
do {
|
||||
status = sci_in(port, SCxSR);
|
||||
} while (!(status & SCxSR_TDxE(port)));
|
||||
|
|
@ -147,96 +141,22 @@ static void put_char(struct uart_port *port, char c)
|
|||
sci_in(port, SCxSR); /* Dummy read */
|
||||
sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
|
||||
sci_out(port, SCxTDR, c);
|
||||
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
|
||||
static void put_string(struct sci_port *sci_port, const char *buffer, int count)
|
||||
{
|
||||
struct uart_port *port = &sci_port->port;
|
||||
const unsigned char *p = buffer;
|
||||
int i;
|
||||
|
||||
#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
|
||||
int checksum;
|
||||
int usegdb=0;
|
||||
|
||||
#ifdef CONFIG_SH_STANDARD_BIOS
|
||||
/* This call only does a trap the first time it is
|
||||
* called, and so is safe to do here unconditionally
|
||||
*/
|
||||
usegdb |= sh_bios_in_gdb_mode();
|
||||
#endif
|
||||
#ifdef CONFIG_SH_KGDB
|
||||
usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
|
||||
#endif
|
||||
|
||||
if (usegdb) {
|
||||
/* $<packet info>#<checksum>. */
|
||||
do {
|
||||
unsigned char c;
|
||||
put_char(port, '$');
|
||||
put_char(port, 'O'); /* 'O'utput to console */
|
||||
checksum = 'O';
|
||||
|
||||
for (i=0; i<count; i++) { /* Don't use run length encoding */
|
||||
int h, l;
|
||||
|
||||
c = *p++;
|
||||
h = hex_asc_hi(c);
|
||||
l = hex_asc_lo(c);
|
||||
put_char(port, h);
|
||||
put_char(port, l);
|
||||
checksum += h + l;
|
||||
}
|
||||
put_char(port, '#');
|
||||
put_char(port, hex_asc_hi(checksum));
|
||||
put_char(port, hex_asc_lo(checksum));
|
||||
} while (get_char(port) != '+');
|
||||
} else
|
||||
#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
|
||||
for (i=0; i<count; i++) {
|
||||
if (*p == 10)
|
||||
put_char(port, '\r');
|
||||
put_char(port, *p++);
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
|
||||
|
||||
#ifdef CONFIG_SH_KGDB
|
||||
static int kgdb_sci_getchar(void)
|
||||
{
|
||||
int c;
|
||||
|
||||
/* Keep trying to read a character, this could be neater */
|
||||
while ((c = get_char(&kgdb_sci_port->port)) < 0)
|
||||
cpu_relax();
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
static inline void kgdb_sci_putchar(int c)
|
||||
{
|
||||
put_char(&kgdb_sci_port->port, c);
|
||||
}
|
||||
#endif /* CONFIG_SH_KGDB */
|
||||
#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
|
||||
|
||||
#if defined(__H8300S__)
|
||||
enum { sci_disable, sci_enable };
|
||||
|
||||
static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
|
||||
static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
|
||||
{
|
||||
volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
|
||||
volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
|
||||
int ch = (port->mapbase - SMR0) >> 3;
|
||||
unsigned char mask = 1 << (ch+1);
|
||||
|
||||
if (ctrl == sci_disable) {
|
||||
if (ctrl == sci_disable)
|
||||
*mstpcrl |= mask;
|
||||
} else {
|
||||
else
|
||||
*mstpcrl &= ~mask;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void h8300_sci_enable(struct uart_port *port)
|
||||
|
|
@ -251,7 +171,7 @@ static inline void h8300_sci_disable(struct uart_port *port)
|
|||
#endif
|
||||
|
||||
#if defined(__H8300H__) || defined(__H8300S__)
|
||||
static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
|
||||
static void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
int ch = (port->mapbase - SMR0) >> 3;
|
||||
|
||||
|
|
@ -266,141 +186,99 @@ static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
|
|||
/* tx mark output*/
|
||||
H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
|
||||
}
|
||||
#else
|
||||
#define sci_init_pins_sci NULL
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
|
||||
static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
unsigned int fcr_val = 0;
|
||||
|
||||
if (cflag & CRTSCTS)
|
||||
fcr_val |= SCFCR_MCE;
|
||||
|
||||
sci_out(port, SCFCR, fcr_val);
|
||||
}
|
||||
#else
|
||||
#define sci_init_pins_irda NULL
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
|
||||
{
|
||||
unsigned int fcr_val = 0;
|
||||
|
||||
set_sh771x_scif_pfc(port);
|
||||
if (cflag & CRTSCTS) {
|
||||
fcr_val |= SCFCR_MCE;
|
||||
}
|
||||
sci_out(port, SCFCR, fcr_val);
|
||||
if (port->mapbase == 0xA4400000) {
|
||||
__raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
|
||||
__raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
|
||||
} else if (port->mapbase == 0xA4410000)
|
||||
__raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
|
||||
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
unsigned int fcr_val = 0;
|
||||
unsigned short data;
|
||||
|
||||
if (cflag & CRTSCTS) {
|
||||
/* enable RTS/CTS */
|
||||
if (port->mapbase == 0xa4430000) { /* SCIF0 */
|
||||
/* Clear PTCR bit 9-2; enable all scif pins but sck */
|
||||
data = ctrl_inw(PORT_PTCR);
|
||||
ctrl_outw((data & 0xfc03), PORT_PTCR);
|
||||
data = __raw_readw(PORT_PTCR);
|
||||
__raw_writew((data & 0xfc03), PORT_PTCR);
|
||||
} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
|
||||
/* Clear PVCR bit 9-2 */
|
||||
data = ctrl_inw(PORT_PVCR);
|
||||
ctrl_outw((data & 0xfc03), PORT_PVCR);
|
||||
data = __raw_readw(PORT_PVCR);
|
||||
__raw_writew((data & 0xfc03), PORT_PVCR);
|
||||
}
|
||||
fcr_val |= SCFCR_MCE;
|
||||
} else {
|
||||
if (port->mapbase == 0xa4430000) { /* SCIF0 */
|
||||
/* Clear PTCR bit 5-2; enable only tx and rx */
|
||||
data = ctrl_inw(PORT_PTCR);
|
||||
ctrl_outw((data & 0xffc3), PORT_PTCR);
|
||||
data = __raw_readw(PORT_PTCR);
|
||||
__raw_writew((data & 0xffc3), PORT_PTCR);
|
||||
} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
|
||||
/* Clear PVCR bit 5-2 */
|
||||
data = ctrl_inw(PORT_PVCR);
|
||||
ctrl_outw((data & 0xffc3), PORT_PVCR);
|
||||
data = __raw_readw(PORT_PVCR);
|
||||
__raw_writew((data & 0xffc3), PORT_PVCR);
|
||||
}
|
||||
}
|
||||
sci_out(port, SCFCR, fcr_val);
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SH3)
|
||||
/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
|
||||
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
unsigned int fcr_val = 0;
|
||||
unsigned short data;
|
||||
|
||||
/* We need to set SCPCR to enable RTS/CTS */
|
||||
data = ctrl_inw(SCPCR);
|
||||
data = __raw_readw(SCPCR);
|
||||
/* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
|
||||
ctrl_outw(data & 0x0fcf, SCPCR);
|
||||
__raw_writew(data & 0x0fcf, SCPCR);
|
||||
|
||||
if (cflag & CRTSCTS)
|
||||
fcr_val |= SCFCR_MCE;
|
||||
else {
|
||||
if (!(cflag & CRTSCTS)) {
|
||||
/* We need to set SCPCR to enable RTS/CTS */
|
||||
data = ctrl_inw(SCPCR);
|
||||
data = __raw_readw(SCPCR);
|
||||
/* Clear out SCP7MD1,0, SCP4MD1,0,
|
||||
Set SCP6MD1,0 = {01} (output) */
|
||||
ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
|
||||
__raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
|
||||
|
||||
data = ctrl_inb(SCPDR);
|
||||
/* Set /RTS2 (bit6) = 0 */
|
||||
ctrl_outb(data & 0xbf, SCPDR);
|
||||
}
|
||||
|
||||
sci_out(port, SCFCR, fcr_val);
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
|
||||
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
unsigned int fcr_val = 0;
|
||||
unsigned short data;
|
||||
|
||||
if (port->mapbase == 0xffe00000) {
|
||||
data = ctrl_inw(PSCR);
|
||||
data = __raw_readw(PSCR);
|
||||
data &= ~0x03cf;
|
||||
if (cflag & CRTSCTS)
|
||||
fcr_val |= SCFCR_MCE;
|
||||
else
|
||||
if (!(cflag & CRTSCTS))
|
||||
data |= 0x0340;
|
||||
|
||||
ctrl_outw(data, PSCR);
|
||||
__raw_writew(data, PSCR);
|
||||
}
|
||||
/* SCIF1 and SCIF2 should be setup by board code */
|
||||
|
||||
sci_out(port, SCFCR, fcr_val);
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
|
||||
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
/* Nothing to do here.. */
|
||||
sci_out(port, SCFCR, 0);
|
||||
}
|
||||
#else
|
||||
/* For SH7750 */
|
||||
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
unsigned int fcr_val = 0;
|
||||
|
||||
if (cflag & CRTSCTS) {
|
||||
fcr_val |= SCFCR_MCE;
|
||||
} else {
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
|
||||
/* Nothing */
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7785) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SHX3)
|
||||
ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
if (!(cflag & CRTSCTS))
|
||||
__raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
if (!(cflag & CRTSCTS))
|
||||
__raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
|
||||
}
|
||||
#else
|
||||
ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
|
||||
#endif
|
||||
}
|
||||
sci_out(port, SCFCR, fcr_val);
|
||||
static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
|
||||
{
|
||||
/* Nothing to do */
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -419,18 +297,26 @@ static inline int scif_rxroom(struct uart_port *port)
|
|||
#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
|
||||
static inline int scif_txroom(struct uart_port *port)
|
||||
{
|
||||
if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/
|
||||
if ((port->mapbase == 0xffe00000) ||
|
||||
(port->mapbase == 0xffe08000)) {
|
||||
/* SCIF0/1*/
|
||||
return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
|
||||
else /* SCIF2 */
|
||||
} else {
|
||||
/* SCIF2 */
|
||||
return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
static inline int scif_rxroom(struct uart_port *port)
|
||||
{
|
||||
if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/
|
||||
if ((port->mapbase == 0xffe00000) ||
|
||||
(port->mapbase == 0xffe08000)) {
|
||||
/* SCIF0/1*/
|
||||
return sci_in(port, SCRFDR) & 0xff;
|
||||
else /* SCIF2 */
|
||||
} else {
|
||||
/* SCIF2 */
|
||||
return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
|
||||
}
|
||||
}
|
||||
#else
|
||||
static inline int scif_txroom(struct uart_port *port)
|
||||
|
|
@ -446,12 +332,12 @@ static inline int scif_rxroom(struct uart_port *port)
|
|||
|
||||
static inline int sci_txroom(struct uart_port *port)
|
||||
{
|
||||
return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
|
||||
return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
|
||||
}
|
||||
|
||||
static inline int sci_rxroom(struct uart_port *port)
|
||||
{
|
||||
return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
|
||||
return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
|
||||
}
|
||||
|
||||
/* ********************************************************************** *
|
||||
|
|
@ -469,11 +355,10 @@ static void sci_transmit_chars(struct uart_port *port)
|
|||
status = sci_in(port, SCxSR);
|
||||
if (!(status & SCxSR_TDxE(port))) {
|
||||
ctrl = sci_in(port, SCSCR);
|
||||
if (uart_circ_empty(xmit)) {
|
||||
if (uart_circ_empty(xmit))
|
||||
ctrl &= ~SCI_CTRL_FLAGS_TIE;
|
||||
} else {
|
||||
else
|
||||
ctrl |= SCI_CTRL_FLAGS_TIE;
|
||||
}
|
||||
sci_out(port, SCSCR, ctrl);
|
||||
return;
|
||||
}
|
||||
|
|
@ -521,11 +406,11 @@ static void sci_transmit_chars(struct uart_port *port)
|
|||
}
|
||||
|
||||
/* On SH3, SCIF may read end-of-break as a space->mark char */
|
||||
#define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
|
||||
#define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
|
||||
|
||||
static inline void sci_receive_chars(struct uart_port *port)
|
||||
{
|
||||
struct sci_port *sci_port = (struct sci_port *)port;
|
||||
struct sci_port *sci_port = to_sci_port(port);
|
||||
struct tty_struct *tty = port->info->port.tty;
|
||||
int i, count, copied = 0;
|
||||
unsigned short status;
|
||||
|
|
@ -550,13 +435,13 @@ static inline void sci_receive_chars(struct uart_port *port)
|
|||
|
||||
if (port->type == PORT_SCI) {
|
||||
char c = sci_in(port, SCxRDR);
|
||||
if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
|
||||
if (uart_handle_sysrq_char(port, c) ||
|
||||
sci_port->break_flag)
|
||||
count = 0;
|
||||
else {
|
||||
else
|
||||
tty_insert_flip_char(tty, c, TTY_NORMAL);
|
||||
}
|
||||
} else {
|
||||
for (i=0; i<count; i++) {
|
||||
for (i = 0; i < count; i++) {
|
||||
char c = sci_in(port, SCxRDR);
|
||||
status = sci_in(port, SCxSR);
|
||||
#if defined(CONFIG_CPU_SH3)
|
||||
|
|
@ -569,7 +454,7 @@ static inline void sci_receive_chars(struct uart_port *port)
|
|||
}
|
||||
|
||||
/* Nonzero => end-of-break */
|
||||
pr_debug("scif: debounce<%02x>\n", c);
|
||||
dev_dbg(port->dev, "debounce<%02x>\n", c);
|
||||
sci_port->break_flag = 0;
|
||||
|
||||
if (STEPFN(c)) {
|
||||
|
|
@ -586,12 +471,13 @@ static inline void sci_receive_chars(struct uart_port *port)
|
|||
/* Store data and status */
|
||||
if (status&SCxSR_FER(port)) {
|
||||
flag = TTY_FRAME;
|
||||
pr_debug("sci: frame error\n");
|
||||
dev_notice(port->dev, "frame error\n");
|
||||
} else if (status&SCxSR_PER(port)) {
|
||||
flag = TTY_PARITY;
|
||||
pr_debug("sci: parity error\n");
|
||||
dev_notice(port->dev, "parity error\n");
|
||||
} else
|
||||
flag = TTY_NORMAL;
|
||||
|
||||
tty_insert_flip_char(tty, c, flag);
|
||||
}
|
||||
}
|
||||
|
|
@ -651,13 +537,14 @@ static inline int sci_handle_errors(struct uart_port *port)
|
|||
/* overrun error */
|
||||
if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
|
||||
copied++;
|
||||
pr_debug("sci: overrun error\n");
|
||||
|
||||
dev_notice(port->dev, "overrun error");
|
||||
}
|
||||
|
||||
if (status & SCxSR_FER(port)) {
|
||||
if (sci_rxd_in(port) == 0) {
|
||||
/* Notify of BREAK */
|
||||
struct sci_port *sci_port = (struct sci_port *)port;
|
||||
struct sci_port *sci_port = to_sci_port(port);
|
||||
|
||||
if (!sci_port->break_flag) {
|
||||
sci_port->break_flag = 1;
|
||||
|
|
@ -666,15 +553,19 @@ static inline int sci_handle_errors(struct uart_port *port)
|
|||
/* Do sysrq handling. */
|
||||
if (uart_handle_break(port))
|
||||
return 0;
|
||||
pr_debug("sci: BREAK detected\n");
|
||||
|
||||
dev_dbg(port->dev, "BREAK detected\n");
|
||||
|
||||
if (tty_insert_flip_char(tty, 0, TTY_BREAK))
|
||||
copied++;
|
||||
}
|
||||
copied++;
|
||||
}
|
||||
|
||||
} else {
|
||||
/* frame error */
|
||||
if (tty_insert_flip_char(tty, 0, TTY_FRAME))
|
||||
copied++;
|
||||
pr_debug("sci: frame error\n");
|
||||
|
||||
dev_notice(port->dev, "frame error\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -682,7 +573,8 @@ static inline int sci_handle_errors(struct uart_port *port)
|
|||
/* parity error */
|
||||
if (tty_insert_flip_char(tty, 0, TTY_PARITY))
|
||||
copied++;
|
||||
pr_debug("sci: parity error\n");
|
||||
|
||||
dev_notice(port->dev, "parity error");
|
||||
}
|
||||
|
||||
if (copied)
|
||||
|
|
@ -691,6 +583,27 @@ static inline int sci_handle_errors(struct uart_port *port)
|
|||
return copied;
|
||||
}
|
||||
|
||||
static inline int sci_handle_fifo_overrun(struct uart_port *port)
|
||||
{
|
||||
struct tty_struct *tty = port->info->port.tty;
|
||||
int copied = 0;
|
||||
|
||||
if (port->type != PORT_SCIF)
|
||||
return 0;
|
||||
|
||||
if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
|
||||
sci_out(port, SCLSR, 0);
|
||||
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
tty_flip_buffer_push(tty);
|
||||
|
||||
dev_notice(port->dev, "overrun error\n");
|
||||
copied++;
|
||||
}
|
||||
|
||||
return copied;
|
||||
}
|
||||
|
||||
static inline int sci_handle_breaks(struct uart_port *port)
|
||||
{
|
||||
int copied = 0;
|
||||
|
|
@ -709,23 +622,15 @@ static inline int sci_handle_breaks(struct uart_port *port)
|
|||
/* Notify of BREAK */
|
||||
if (tty_insert_flip_char(tty, 0, TTY_BREAK))
|
||||
copied++;
|
||||
pr_debug("sci: BREAK detected\n");
|
||||
}
|
||||
|
||||
#if defined(SCIF_ORER)
|
||||
/* XXX: Handle SCIF overrun error */
|
||||
if (port->type != PORT_SCI && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
|
||||
sci_out(port, SCLSR, 0);
|
||||
if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
|
||||
copied++;
|
||||
pr_debug("sci: overrun error\n");
|
||||
}
|
||||
dev_dbg(port->dev, "BREAK detected\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
if (copied)
|
||||
tty_flip_buffer_push(tty);
|
||||
|
||||
copied += sci_handle_fifo_overrun(port);
|
||||
|
||||
return copied;
|
||||
}
|
||||
|
||||
|
|
@ -763,16 +668,7 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr)
|
|||
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
||||
}
|
||||
} else {
|
||||
#if defined(SCIF_ORER)
|
||||
if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
|
||||
struct tty_struct *tty = port->info->port.tty;
|
||||
|
||||
sci_out(port, SCLSR, 0);
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
tty_flip_buffer_push(tty);
|
||||
pr_debug("scif: overrun error\n");
|
||||
}
|
||||
#endif
|
||||
sci_handle_fifo_overrun(port);
|
||||
sci_rx_interrupt(irq, ptr);
|
||||
}
|
||||
|
||||
|
|
@ -801,8 +697,8 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
|
|||
struct uart_port *port = ptr;
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
|
||||
ssr_status = sci_in(port,SCxSR);
|
||||
scr_status = sci_in(port,SCSCR);
|
||||
ssr_status = sci_in(port, SCxSR);
|
||||
scr_status = sci_in(port, SCSCR);
|
||||
|
||||
/* Tx Interrupt */
|
||||
if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE))
|
||||
|
|
@ -820,7 +716,7 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
/*
|
||||
* Here we define a transistion notifier so that we can update all of our
|
||||
* ports' baud rate when the peripheral clock changes.
|
||||
|
|
@ -828,41 +724,20 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
|
|||
static int sci_notifier(struct notifier_block *self,
|
||||
unsigned long phase, void *p)
|
||||
{
|
||||
struct cpufreq_freqs *freqs = p;
|
||||
int i;
|
||||
|
||||
if ((phase == CPUFREQ_POSTCHANGE) ||
|
||||
(phase == CPUFREQ_RESUMECHANGE)){
|
||||
(phase == CPUFREQ_RESUMECHANGE))
|
||||
for (i = 0; i < SCI_NPORTS; i++) {
|
||||
struct uart_port *port = &sci_ports[i].port;
|
||||
struct clk *clk;
|
||||
|
||||
/*
|
||||
* Update the uartclk per-port if frequency has
|
||||
* changed, since it will no longer necessarily be
|
||||
* consistent with the old frequency.
|
||||
*
|
||||
* Really we want to be able to do something like
|
||||
* uart_change_speed() or something along those lines
|
||||
* here to implicitly reset the per-port baud rate..
|
||||
*
|
||||
* Clean this up later..
|
||||
*/
|
||||
clk = clk_get(NULL, "module_clk");
|
||||
port->uartclk = clk_get_rate(clk);
|
||||
clk_put(clk);
|
||||
struct sci_port *s = &sci_ports[i];
|
||||
s->port.uartclk = clk_get_rate(s->clk);
|
||||
}
|
||||
|
||||
printk(KERN_INFO "%s: got a postchange notification "
|
||||
"for cpu %d (old %d, new %d)\n",
|
||||
__func__, freqs->cpu, freqs->old, freqs->new);
|
||||
}
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
|
||||
#endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */
|
||||
#endif
|
||||
|
||||
static int sci_request_irq(struct sci_port *port)
|
||||
{
|
||||
|
|
@ -875,23 +750,22 @@ static int sci_request_irq(struct sci_port *port)
|
|||
"SCI Transmit Data Empty", "SCI Break" };
|
||||
|
||||
if (port->irqs[0] == port->irqs[1]) {
|
||||
if (!port->irqs[0]) {
|
||||
printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
|
||||
if (unlikely(!port->irqs[0]))
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (request_irq(port->irqs[0], sci_mpxed_interrupt,
|
||||
IRQF_DISABLED, "sci", port)) {
|
||||
printk(KERN_ERR "sci: Cannot allocate irq.\n");
|
||||
dev_err(port->port.dev, "Can't allocate IRQ\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < ARRAY_SIZE(handlers); i++) {
|
||||
if (!port->irqs[i])
|
||||
if (unlikely(!port->irqs[i]))
|
||||
continue;
|
||||
|
||||
if (request_irq(port->irqs[i], handlers[i],
|
||||
IRQF_DISABLED, desc[i], port)) {
|
||||
printk(KERN_ERR "sci: Cannot allocate irq.\n");
|
||||
dev_err(port->port.dev, "Can't allocate IRQ\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
|
@ -904,12 +778,9 @@ static void sci_free_irq(struct sci_port *port)
|
|||
{
|
||||
int i;
|
||||
|
||||
if (port->irqs[0] == port->irqs[1]) {
|
||||
if (!port->irqs[0])
|
||||
printk("sci: sci_free_irq error\n");
|
||||
else
|
||||
free_irq(port->irqs[0], port);
|
||||
} else {
|
||||
if (port->irqs[0] == port->irqs[1])
|
||||
free_irq(port->irqs[0], port);
|
||||
else {
|
||||
for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
|
||||
if (!port->irqs[i])
|
||||
continue;
|
||||
|
|
@ -1028,7 +899,6 @@ static void sci_shutdown(struct uart_port *port)
|
|||
static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
struct ktermios *old)
|
||||
{
|
||||
struct sci_port *s = &sci_ports[port->line];
|
||||
unsigned int status, baud, smr_val;
|
||||
int t = -1;
|
||||
|
||||
|
|
@ -1060,32 +930,36 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
sci_out(port, SCSMR, smr_val);
|
||||
|
||||
if (t > 0) {
|
||||
if(t >= 256) {
|
||||
if (t >= 256) {
|
||||
sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
|
||||
t >>= 2;
|
||||
} else {
|
||||
} else
|
||||
sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
|
||||
}
|
||||
|
||||
sci_out(port, SCBRR, t);
|
||||
udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
|
||||
}
|
||||
|
||||
if (likely(s->init_pins))
|
||||
s->init_pins(port, termios->c_cflag);
|
||||
sci_init_pins(port, termios->c_cflag);
|
||||
sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
|
||||
|
||||
sci_out(port, SCSCR, SCSCR_INIT(port));
|
||||
|
||||
if ((termios->c_cflag & CREAD) != 0)
|
||||
sci_start_rx(port,0);
|
||||
sci_start_rx(port, 0);
|
||||
}
|
||||
|
||||
static const char *sci_type(struct uart_port *port)
|
||||
{
|
||||
switch (port->type) {
|
||||
case PORT_SCI: return "sci";
|
||||
case PORT_SCIF: return "scif";
|
||||
case PORT_IRDA: return "irda";
|
||||
case PORT_SCIFA: return "scifa";
|
||||
case PORT_IRDA:
|
||||
return "irda";
|
||||
case PORT_SCI:
|
||||
return "sci";
|
||||
case PORT_SCIF:
|
||||
return "scif";
|
||||
case PORT_SCIFA:
|
||||
return "scifa";
|
||||
}
|
||||
|
||||
return NULL;
|
||||
|
|
@ -1108,19 +982,6 @@ static void sci_config_port(struct uart_port *port, int flags)
|
|||
|
||||
port->type = s->type;
|
||||
|
||||
switch (port->type) {
|
||||
case PORT_SCI:
|
||||
s->init_pins = sci_init_pins_sci;
|
||||
break;
|
||||
case PORT_SCIF:
|
||||
case PORT_SCIFA:
|
||||
s->init_pins = sci_init_pins_scif;
|
||||
break;
|
||||
case PORT_IRDA:
|
||||
s->init_pins = sci_init_pins_irda;
|
||||
break;
|
||||
}
|
||||
|
||||
if (port->flags & UPF_IOREMAP && !port->membase) {
|
||||
#if defined(CONFIG_SUPERH64)
|
||||
port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
|
||||
|
|
@ -1129,7 +990,7 @@ static void sci_config_port(struct uart_port *port, int flags)
|
|||
port->membase = ioremap_nocache(port->mapbase, 0x40);
|
||||
#endif
|
||||
|
||||
printk(KERN_ERR "sci: can't remap port#%d\n", port->line);
|
||||
dev_err(port->dev, "can't remap port#%d\n", port->line);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1163,6 +1024,10 @@ static struct uart_ops sci_uart_ops = {
|
|||
.request_port = sci_request_port,
|
||||
.config_port = sci_config_port,
|
||||
.verify_port = sci_verify_port,
|
||||
#ifdef CONFIG_CONSOLE_POLL
|
||||
.poll_get_char = sci_poll_get_char,
|
||||
.poll_put_char = sci_poll_put_char,
|
||||
#endif
|
||||
};
|
||||
|
||||
static void __init sci_init_ports(void)
|
||||
|
|
@ -1229,7 +1094,15 @@ int __init early_sci_setup(struct uart_port *port)
|
|||
static void serial_console_write(struct console *co, const char *s,
|
||||
unsigned count)
|
||||
{
|
||||
put_string(serial_console_port, s, count);
|
||||
struct uart_port *port = &serial_console_port->port;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
if (*s == 10)
|
||||
sci_poll_put_char(port, '\r');
|
||||
|
||||
sci_poll_put_char(port, *s++);
|
||||
}
|
||||
}
|
||||
|
||||
static int __init serial_console_setup(struct console *co, char *options)
|
||||
|
|
@ -1307,89 +1180,8 @@ static int __init sci_console_init(void)
|
|||
console_initcall(sci_console_init);
|
||||
#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
|
||||
|
||||
#ifdef CONFIG_SH_KGDB_CONSOLE
|
||||
/*
|
||||
* FIXME: Most of this can go away.. at the moment, we rely on
|
||||
* arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
|
||||
* most of that can easily be done here instead.
|
||||
*
|
||||
* For the time being, just accept the values that were parsed earlier..
|
||||
*/
|
||||
static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
*baud = kgdb_baud;
|
||||
*parity = tolower(kgdb_parity);
|
||||
*bits = kgdb_bits - '0';
|
||||
}
|
||||
|
||||
/*
|
||||
* The naming here is somewhat misleading, since kgdb_console_setup() takes
|
||||
* care of the early-on initialization for kgdb, regardless of whether we
|
||||
* actually use kgdb as a console or not.
|
||||
*
|
||||
* On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
|
||||
*/
|
||||
int __init kgdb_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct uart_port *port = &sci_ports[kgdb_portnum].port;
|
||||
int baud = 38400;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
int flow = 'n';
|
||||
|
||||
if (co->index != kgdb_portnum)
|
||||
co->index = kgdb_portnum;
|
||||
|
||||
kgdb_sci_port = &sci_ports[co->index];
|
||||
port = &kgdb_sci_port->port;
|
||||
|
||||
/*
|
||||
* Also need to check port->type, we don't actually have any
|
||||
* UPIO_PORT ports, but uart_report_port() handily misreports
|
||||
* it anyways if we don't have a port available by the time this is
|
||||
* called.
|
||||
*/
|
||||
if (!port->type)
|
||||
return -ENODEV;
|
||||
if (!port->membase || !port->mapbase)
|
||||
return -ENODEV;
|
||||
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
else
|
||||
kgdb_console_get_options(port, &baud, &parity, &bits);
|
||||
|
||||
kgdb_getchar = kgdb_sci_getchar;
|
||||
kgdb_putchar = kgdb_sci_putchar;
|
||||
|
||||
return uart_set_options(port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
static struct console kgdb_console = {
|
||||
.name = "ttySC",
|
||||
.device = uart_console_device,
|
||||
.write = kgdb_console_write,
|
||||
.setup = kgdb_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
.data = &sci_uart_driver,
|
||||
};
|
||||
|
||||
/* Register the KGDB console so we get messages (d'oh!) */
|
||||
static int __init kgdb_console_init(void)
|
||||
{
|
||||
sci_init_ports();
|
||||
register_console(&kgdb_console);
|
||||
return 0;
|
||||
}
|
||||
console_initcall(kgdb_console_init);
|
||||
#endif /* CONFIG_SH_KGDB_CONSOLE */
|
||||
|
||||
#if defined(CONFIG_SH_KGDB_CONSOLE)
|
||||
#define SCI_CONSOLE &kgdb_console
|
||||
#elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
|
||||
#define SCI_CONSOLE &serial_console
|
||||
#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
|
||||
#define SCI_CONSOLE (&serial_console)
|
||||
#else
|
||||
#define SCI_CONSOLE 0
|
||||
#endif
|
||||
|
|
@ -1463,15 +1255,8 @@ static int __devinit sci_probe(struct platform_device *dev)
|
|||
uart_add_one_port(&sci_uart_driver, &sciport->port);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
|
||||
kgdb_sci_port = &sci_ports[kgdb_portnum];
|
||||
kgdb_getchar = kgdb_sci_getchar;
|
||||
kgdb_putchar = kgdb_sci_putchar;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
|
||||
dev_info(&dev->dev, "CPU frequency notifier registered\n");
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SH_STANDARD_BIOS
|
||||
|
|
@ -1491,6 +1276,10 @@ static int __devexit sci_remove(struct platform_device *dev)
|
|||
{
|
||||
int i;
|
||||
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
cpufreq_unregister_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
|
||||
#endif
|
||||
|
||||
for (i = 0; i < SCI_NPORTS; i++)
|
||||
uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
|
||||
|
||||
|
|
|
|||
|
|
@ -133,13 +133,20 @@
|
|||
# define SCSPTR5 0xffef0024 /* 16 bit SCIF */
|
||||
# define SCIF_OPER 0x0001 /* Overrun error bit */
|
||||
# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7203) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7206) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7263)
|
||||
# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
|
||||
# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
|
||||
# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
|
||||
# define SCSPTR3 0xfffe9820 /* 16 bit SCIF */
|
||||
# if defined(CONFIG_CPU_SUBTYPE_SH7201)
|
||||
# define SCSPTR4 0xfffeA020 /* 16 bit SCIF */
|
||||
# define SCSPTR5 0xfffeA820 /* 16 bit SCIF */
|
||||
# define SCSPTR6 0xfffeB020 /* 16 bit SCIF */
|
||||
# define SCSPTR7 0xfffeB820 /* 16 bit SCIF */
|
||||
# endif
|
||||
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
|
||||
# define SCSPTR0 0xf8400020 /* 16 bit SCIF */
|
||||
|
|
@ -225,6 +232,10 @@
|
|||
# define SCIF_TXROOM_MAX 16
|
||||
#endif
|
||||
|
||||
#ifndef SCIF_ORER
|
||||
#define SCIF_ORER 0x0000
|
||||
#endif
|
||||
|
||||
#define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
|
||||
#define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS)
|
||||
#define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF)
|
||||
|
|
@ -232,12 +243,7 @@
|
|||
#define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER)
|
||||
#define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
|
||||
#define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
|
||||
# define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER)
|
||||
#else
|
||||
# define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000)
|
||||
#endif
|
||||
#define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER)
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
|
||||
|
|
@ -501,18 +507,6 @@ static inline int sci_rxd_in(struct uart_port *port)
|
|||
{
|
||||
return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
|
||||
}
|
||||
static inline void set_sh771x_scif_pfc(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xA4400000){
|
||||
ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR);
|
||||
ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR);
|
||||
return;
|
||||
}
|
||||
if (port->mapbase == 0xA4410000){
|
||||
ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR);
|
||||
return;
|
||||
}
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7721)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
|
|
@ -664,7 +658,8 @@ static inline int sci_rxd_in(struct uart_port *port)
|
|||
return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7203) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7206) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7263)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
|
|
@ -677,6 +672,16 @@ static inline int sci_rxd_in(struct uart_port *port)
|
|||
return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffe9800)
|
||||
return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7201)
|
||||
if (port->mapbase == 0xfffeA000)
|
||||
return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffeA800)
|
||||
return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffeB000)
|
||||
return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffeB800)
|
||||
return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
#endif
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
|
||||
|
|
|
|||
|
|
@ -623,7 +623,6 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
|
|||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
|
||||
static void init_controller(struct m66592 *m66592)
|
||||
{
|
||||
usbf_start_clock();
|
||||
m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
|
||||
m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
|
||||
m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
|
||||
|
|
@ -671,9 +670,7 @@ static void init_controller(struct m66592 *m66592)
|
|||
|
||||
static void disable_controller(struct m66592 *m66592)
|
||||
{
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
|
||||
usbf_stop_clock();
|
||||
#else
|
||||
#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
|
||||
m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
|
||||
udelay(1);
|
||||
m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
|
||||
|
|
@ -686,9 +683,7 @@ static void disable_controller(struct m66592 *m66592)
|
|||
|
||||
static void m66592_start_xclock(struct m66592 *m66592)
|
||||
{
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
|
||||
usbf_start_clock();
|
||||
#else
|
||||
#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
|
||||
u16 tmp;
|
||||
|
||||
tmp = m66592_read(m66592, M66592_SYSCFG);
|
||||
|
|
@ -1539,7 +1534,10 @@ static int __exit m66592_remove(struct platform_device *pdev)
|
|||
iounmap(m66592->reg);
|
||||
free_irq(platform_get_irq(pdev, 0), m66592);
|
||||
m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
|
||||
usbf_stop_clock();
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK)
|
||||
clk_disable(m66592->clk);
|
||||
clk_put(m66592->clk);
|
||||
#endif
|
||||
kfree(m66592);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1556,6 +1554,9 @@ static int __init m66592_probe(struct platform_device *pdev)
|
|||
int irq;
|
||||
void __iomem *reg = NULL;
|
||||
struct m66592 *m66592 = NULL;
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK)
|
||||
char clk_name[8];
|
||||
#endif
|
||||
int ret = 0;
|
||||
int i;
|
||||
|
||||
|
|
@ -1614,6 +1615,16 @@ static int __init m66592_probe(struct platform_device *pdev)
|
|||
goto clean_up;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK)
|
||||
snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
|
||||
m66592->clk = clk_get(&pdev->dev, clk_name);
|
||||
if (IS_ERR(m66592->clk)) {
|
||||
dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
|
||||
ret = PTR_ERR(m66592->clk);
|
||||
goto clean_up2;
|
||||
}
|
||||
clk_enable(m66592->clk);
|
||||
#endif
|
||||
INIT_LIST_HEAD(&m66592->gadget.ep_list);
|
||||
m66592->gadget.ep0 = &m66592->ep[0].ep;
|
||||
INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list);
|
||||
|
|
@ -1645,7 +1656,7 @@ static int __init m66592_probe(struct platform_device *pdev)
|
|||
|
||||
m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL);
|
||||
if (m66592->ep0_req == NULL)
|
||||
goto clean_up2;
|
||||
goto clean_up3;
|
||||
m66592->ep0_req->complete = nop_completion;
|
||||
|
||||
init_controller(m66592);
|
||||
|
|
@ -1653,7 +1664,12 @@ static int __init m66592_probe(struct platform_device *pdev)
|
|||
dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
|
||||
return 0;
|
||||
|
||||
clean_up3:
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK)
|
||||
clk_disable(m66592->clk);
|
||||
clk_put(m66592->clk);
|
||||
clean_up2:
|
||||
#endif
|
||||
free_irq(irq, m66592);
|
||||
clean_up:
|
||||
if (m66592) {
|
||||
|
|
|
|||
|
|
@ -23,6 +23,10 @@
|
|||
#ifndef __M66592_UDC_H__
|
||||
#define __M66592_UDC_H__
|
||||
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK)
|
||||
#include <linux/clk.h>
|
||||
#endif
|
||||
|
||||
#define M66592_SYSCFG 0x00
|
||||
#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */
|
||||
#define M66592_XTAL48 0x8000 /* 48MHz */
|
||||
|
|
@ -476,6 +480,9 @@ struct m66592_ep {
|
|||
struct m66592 {
|
||||
spinlock_t lock;
|
||||
void __iomem *reg;
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK)
|
||||
struct clk *clk;
|
||||
#endif
|
||||
|
||||
struct usb_gadget gadget;
|
||||
struct usb_gadget_driver *driver;
|
||||
|
|
@ -604,26 +611,6 @@ static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat,
|
|||
#define m66592_bset(m66592, val, offset) \
|
||||
m66592_mdfy(m66592, val, 0, offset)
|
||||
|
||||
#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
|
||||
#include <asm/io.h>
|
||||
#define MSTPCR2 0xA4150038 /* for SH7722 */
|
||||
#define MSTPCR2_USB 0x00000800
|
||||
|
||||
static inline void usbf_start_clock(void)
|
||||
{
|
||||
ctrl_outl(ctrl_inl(MSTPCR2) & ~MSTPCR2_USB, MSTPCR2);
|
||||
}
|
||||
|
||||
static inline void usbf_stop_clock(void)
|
||||
{
|
||||
ctrl_outl(ctrl_inl(MSTPCR2) | MSTPCR2_USB, MSTPCR2);
|
||||
}
|
||||
|
||||
#else
|
||||
#define usbf_start_clock(x)
|
||||
#define usbf_stop_clock(x)
|
||||
#endif /* if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
|
||||
|
||||
#endif /* ifndef __M66592_UDC_H__ */
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -114,6 +114,9 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
|
|||
int i = 0;
|
||||
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
|
||||
#if defined(CONFIG_HAVE_CLK)
|
||||
clk_enable(r8a66597->clk);
|
||||
#endif
|
||||
do {
|
||||
r8a66597_write(r8a66597, SCKE, SYSCFG0);
|
||||
tmp = r8a66597_read(r8a66597, SYSCFG0);
|
||||
|
|
@ -154,7 +157,11 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
|
|||
{
|
||||
r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
|
||||
udelay(1);
|
||||
#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
|
||||
#if defined(CONFIG_HAVE_CLK)
|
||||
clk_disable(r8a66597->clk);
|
||||
#endif
|
||||
#else
|
||||
r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
|
||||
r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
|
||||
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
|
||||
|
|
@ -2261,6 +2268,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
|
|||
del_timer_sync(&r8a66597->rh_timer);
|
||||
usb_remove_hcd(hcd);
|
||||
iounmap((void *)r8a66597->reg);
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
|
||||
clk_put(r8a66597->clk);
|
||||
#endif
|
||||
usb_put_hcd(hcd);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -2268,6 +2278,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
|
|||
#define resource_len(r) (((r)->end - (r)->start) + 1)
|
||||
static int __init r8a66597_probe(struct platform_device *pdev)
|
||||
{
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
|
||||
char clk_name[8];
|
||||
#endif
|
||||
struct resource *res = NULL, *ires;
|
||||
int irq = -1;
|
||||
void __iomem *reg = NULL;
|
||||
|
|
@ -2320,6 +2333,16 @@ static int __init r8a66597_probe(struct platform_device *pdev)
|
|||
memset(r8a66597, 0, sizeof(struct r8a66597));
|
||||
dev_set_drvdata(&pdev->dev, r8a66597);
|
||||
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
|
||||
snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
|
||||
r8a66597->clk = clk_get(&pdev->dev, clk_name);
|
||||
if (IS_ERR(r8a66597->clk)) {
|
||||
dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
|
||||
ret = PTR_ERR(r8a66597->clk);
|
||||
goto clean_up2;
|
||||
}
|
||||
#endif
|
||||
|
||||
spin_lock_init(&r8a66597->lock);
|
||||
init_timer(&r8a66597->rh_timer);
|
||||
r8a66597->rh_timer.function = r8a66597_timer;
|
||||
|
|
@ -2365,11 +2388,18 @@ static int __init r8a66597_probe(struct platform_device *pdev)
|
|||
ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | irq_trigger);
|
||||
if (ret != 0) {
|
||||
dev_err(&pdev->dev, "Failed to add hcd\n");
|
||||
goto clean_up;
|
||||
goto clean_up3;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
clean_up3:
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
|
||||
clk_put(r8a66597->clk);
|
||||
clean_up2:
|
||||
#endif
|
||||
usb_put_hcd(hcd);
|
||||
|
||||
clean_up:
|
||||
if (reg)
|
||||
iounmap(reg);
|
||||
|
|
|
|||
|
|
@ -26,6 +26,10 @@
|
|||
#ifndef __R8A66597_H__
|
||||
#define __R8A66597_H__
|
||||
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
|
||||
#include <linux/clk.h>
|
||||
#endif
|
||||
|
||||
#define SYSCFG0 0x00
|
||||
#define SYSCFG1 0x02
|
||||
#define SYSSTS0 0x04
|
||||
|
|
@ -481,7 +485,9 @@ struct r8a66597_root_hub {
|
|||
struct r8a66597 {
|
||||
spinlock_t lock;
|
||||
unsigned long reg;
|
||||
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK)
|
||||
struct clk *clk;
|
||||
#endif
|
||||
struct r8a66597_device device0;
|
||||
struct r8a66597_root_hub root_hub[R8A66597_MAX_ROOT_HUB];
|
||||
struct list_head pipe_queue[R8A66597_MAX_NUM_PIPE];
|
||||
|
|
|
|||
|
|
@ -1889,10 +1889,11 @@ config FB_W100
|
|||
config FB_SH_MOBILE_LCDC
|
||||
tristate "SuperH Mobile LCDC framebuffer support"
|
||||
depends on FB && SUPERH
|
||||
select FB_CFB_FILLRECT
|
||||
select FB_CFB_COPYAREA
|
||||
select FB_CFB_IMAGEBLIT
|
||||
default m
|
||||
select FB_SYS_FILLRECT
|
||||
select FB_SYS_COPYAREA
|
||||
select FB_SYS_IMAGEBLIT
|
||||
select FB_SYS_FOPS
|
||||
select FB_DEFERRED_IO
|
||||
---help---
|
||||
Frame buffer driver for the on-chip SH-Mobile LCD controller.
|
||||
|
||||
|
|
@ -2021,17 +2022,19 @@ config FB_COBALT
|
|||
depends on FB && MIPS_COBALT
|
||||
|
||||
config FB_SH7760
|
||||
bool "SH7760/SH7763 LCDC support"
|
||||
depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763)
|
||||
select FB_CFB_FILLRECT
|
||||
select FB_CFB_COPYAREA
|
||||
select FB_CFB_IMAGEBLIT
|
||||
help
|
||||
Support for the SH7760/SH7763 integrated (D)STN/TFT LCD Controller.
|
||||
Supports display resolutions up to 1024x1024 pixel, grayscale and
|
||||
color operation, with depths ranging from 1 bpp to 8 bpp monochrome
|
||||
and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
|
||||
panels <= 320 pixel horizontal resolution.
|
||||
bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
|
||||
depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \
|
||||
|| CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721)
|
||||
select FB_CFB_FILLRECT
|
||||
select FB_CFB_COPYAREA
|
||||
select FB_CFB_IMAGEBLIT
|
||||
---help---
|
||||
Support for the SH7760/SH7763/SH7720/SH7721 integrated
|
||||
(D)STN/TFT LCD Controller.
|
||||
Supports display resolutions up to 1024x1024 pixel, grayscale and
|
||||
color operation, with depths ranging from 1 bpp to 8 bpp monochrome
|
||||
and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
|
||||
panels <= 320 pixel horizontal resolution.
|
||||
|
||||
config FB_VIRTUAL
|
||||
tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
|
||||
|
|
|
|||
|
|
@ -24,6 +24,19 @@
|
|||
#include <linux/rmap.h>
|
||||
#include <linux/pagemap.h>
|
||||
|
||||
struct page *fb_deferred_io_page(struct fb_info *info, unsigned long offs)
|
||||
{
|
||||
void *screen_base = (void __force *) info->screen_base;
|
||||
struct page *page;
|
||||
|
||||
if (is_vmalloc_addr(screen_base + offs))
|
||||
page = vmalloc_to_page(screen_base + offs);
|
||||
else
|
||||
page = pfn_to_page((info->fix.smem_start + offs) >> PAGE_SHIFT);
|
||||
|
||||
return page;
|
||||
}
|
||||
|
||||
/* this is to find and return the vmalloc-ed fb pages */
|
||||
static int fb_deferred_io_fault(struct vm_area_struct *vma,
|
||||
struct vm_fault *vmf)
|
||||
|
|
@ -31,14 +44,12 @@ static int fb_deferred_io_fault(struct vm_area_struct *vma,
|
|||
unsigned long offset;
|
||||
struct page *page;
|
||||
struct fb_info *info = vma->vm_private_data;
|
||||
/* info->screen_base is virtual memory */
|
||||
void *screen_base = (void __force *) info->screen_base;
|
||||
|
||||
offset = vmf->pgoff << PAGE_SHIFT;
|
||||
if (offset >= info->fix.smem_len)
|
||||
return VM_FAULT_SIGBUS;
|
||||
|
||||
page = vmalloc_to_page(screen_base + offset);
|
||||
page = fb_deferred_io_page(info, offset);
|
||||
if (!page)
|
||||
return VM_FAULT_SIGBUS;
|
||||
|
||||
|
|
@ -60,6 +71,10 @@ int fb_deferred_io_fsync(struct file *file, struct dentry *dentry, int datasync)
|
|||
{
|
||||
struct fb_info *info = file->private_data;
|
||||
|
||||
/* Skip if deferred io is complied-in but disabled on this fbdev */
|
||||
if (!info->fbdefio)
|
||||
return 0;
|
||||
|
||||
/* Kill off the delayed work */
|
||||
cancel_rearming_delayed_work(&info->deferred_work);
|
||||
|
||||
|
|
@ -184,7 +199,6 @@ EXPORT_SYMBOL_GPL(fb_deferred_io_open);
|
|||
|
||||
void fb_deferred_io_cleanup(struct fb_info *info)
|
||||
{
|
||||
void *screen_base = (void __force *) info->screen_base;
|
||||
struct fb_deferred_io *fbdefio = info->fbdefio;
|
||||
struct page *page;
|
||||
int i;
|
||||
|
|
@ -195,9 +209,12 @@ void fb_deferred_io_cleanup(struct fb_info *info)
|
|||
|
||||
/* clear out the mapping that we setup */
|
||||
for (i = 0 ; i < info->fix.smem_len; i += PAGE_SIZE) {
|
||||
page = vmalloc_to_page(screen_base + i);
|
||||
page = fb_deferred_io_page(info, i);
|
||||
page->mapping = NULL;
|
||||
}
|
||||
|
||||
info->fbops->fb_mmap = NULL;
|
||||
mutex_destroy(&fbdefio->lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fb_deferred_io_cleanup);
|
||||
|
||||
|
|
|
|||
|
|
@ -13,6 +13,8 @@
|
|||
*
|
||||
* Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de>
|
||||
* for his original source and testing!
|
||||
*
|
||||
* sh7760_setcolreg get from drivers/video/sh_mobile_lcdcfb.c
|
||||
*/
|
||||
|
||||
#include <linux/completion.h>
|
||||
|
|
@ -53,29 +55,6 @@ static irqreturn_t sh7760fb_irq(int irq, void *data)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void sh7760fb_wait_vsync(struct fb_info *info)
|
||||
{
|
||||
struct sh7760fb_par *par = info->par;
|
||||
|
||||
if (par->pd->novsync)
|
||||
return;
|
||||
|
||||
iowrite16(ioread16(par->base + LDINTR) & ~VINT_CHECK,
|
||||
par->base + LDINTR);
|
||||
|
||||
if (par->irq < 0) {
|
||||
/* poll for vert. retrace: status bit is sticky */
|
||||
while (!(ioread16(par->base + LDINTR) & VINT_CHECK))
|
||||
cpu_relax();
|
||||
} else {
|
||||
/* a "wait_for_irq_event(par->irq)" would be extremely nice */
|
||||
init_completion(&par->vsync);
|
||||
enable_irq(par->irq);
|
||||
wait_for_completion(&par->vsync);
|
||||
disable_irq_nosync(par->irq);
|
||||
}
|
||||
}
|
||||
|
||||
/* wait_for_lps - wait until power supply has reached a certain state. */
|
||||
static int wait_for_lps(struct sh7760fb_par *par, int val)
|
||||
{
|
||||
|
|
@ -117,55 +96,28 @@ static int sh7760fb_blank(int blank, struct fb_info *info)
|
|||
return wait_for_lps(par, lps);
|
||||
}
|
||||
|
||||
/* set color registers */
|
||||
static int sh7760fb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
|
||||
static int sh7760_setcolreg (u_int regno,
|
||||
u_int red, u_int green, u_int blue,
|
||||
u_int transp, struct fb_info *info)
|
||||
{
|
||||
struct sh7760fb_par *par = info->par;
|
||||
u32 s = cmap->start;
|
||||
u32 l = cmap->len;
|
||||
u16 *r = cmap->red;
|
||||
u16 *g = cmap->green;
|
||||
u16 *b = cmap->blue;
|
||||
u32 col, tmo;
|
||||
int ret;
|
||||
u32 *palette = info->pseudo_palette;
|
||||
|
||||
ret = 0;
|
||||
if (regno >= 16)
|
||||
return -EINVAL;
|
||||
|
||||
sh7760fb_wait_vsync(info);
|
||||
/* only FB_VISUAL_TRUECOLOR supported */
|
||||
|
||||
/* request palette access */
|
||||
iowrite16(LDPALCR_PALEN, par->base + LDPALCR);
|
||||
red >>= 16 - info->var.red.length;
|
||||
green >>= 16 - info->var.green.length;
|
||||
blue >>= 16 - info->var.blue.length;
|
||||
transp >>= 16 - info->var.transp.length;
|
||||
|
||||
/* poll for access grant */
|
||||
tmo = 100;
|
||||
while (!(ioread16(par->base + LDPALCR) & LDPALCR_PALS) && (--tmo))
|
||||
cpu_relax();
|
||||
palette[regno] = (red << info->var.red.offset) |
|
||||
(green << info->var.green.offset) |
|
||||
(blue << info->var.blue.offset) |
|
||||
(transp << info->var.transp.offset);
|
||||
|
||||
if (!tmo) {
|
||||
ret = 1;
|
||||
dev_dbg(info->dev, "no palette access!\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
while (l && (s < 256)) {
|
||||
col = ((*r) & 0xff) << 16;
|
||||
col |= ((*g) & 0xff) << 8;
|
||||
col |= ((*b) & 0xff);
|
||||
col &= SH7760FB_PALETTE_MASK;
|
||||
iowrite32(col, par->base + LDPR(s));
|
||||
|
||||
if (s < 16)
|
||||
((u32 *) (info->pseudo_palette))[s] = s;
|
||||
|
||||
s++;
|
||||
l--;
|
||||
r++;
|
||||
g++;
|
||||
b++;
|
||||
}
|
||||
out:
|
||||
iowrite16(0, par->base + LDPALCR);
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void encode_fix(struct fb_fix_screeninfo *fix, struct fb_info *info,
|
||||
|
|
@ -406,7 +358,7 @@ static struct fb_ops sh7760fb_ops = {
|
|||
.owner = THIS_MODULE,
|
||||
.fb_blank = sh7760fb_blank,
|
||||
.fb_check_var = sh7760fb_check_var,
|
||||
.fb_setcmap = sh7760fb_setcmap,
|
||||
.fb_setcolreg = sh7760_setcolreg,
|
||||
.fb_set_par = sh7760fb_set_par,
|
||||
.fb_fillrect = cfb_fillrect,
|
||||
.fb_copyarea = cfb_copyarea,
|
||||
|
|
|
|||
|
|
@ -16,7 +16,9 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <video/sh_mobile_lcdc.h>
|
||||
#include <asm/atomic.h>
|
||||
|
||||
#define PALETTE_NR 16
|
||||
|
||||
|
|
@ -30,11 +32,15 @@ struct sh_mobile_lcdc_chan {
|
|||
u32 pseudo_palette[PALETTE_NR];
|
||||
struct fb_info info;
|
||||
dma_addr_t dma_handle;
|
||||
struct fb_deferred_io defio;
|
||||
};
|
||||
|
||||
struct sh_mobile_lcdc_priv {
|
||||
void __iomem *base;
|
||||
int irq;
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
atomic_t clk_usecnt;
|
||||
struct clk *dot_clk;
|
||||
struct clk *clk;
|
||||
#endif
|
||||
unsigned long lddckr;
|
||||
|
|
@ -56,7 +62,7 @@ struct sh_mobile_lcdc_priv {
|
|||
|
||||
/* per-channel registers */
|
||||
enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
|
||||
LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR };
|
||||
LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR };
|
||||
|
||||
static unsigned long lcdc_offs_mainlcd[] = {
|
||||
[LDDCKPAT1R] = 0x400,
|
||||
|
|
@ -66,6 +72,7 @@ static unsigned long lcdc_offs_mainlcd[] = {
|
|||
[LDMT3R] = 0x420,
|
||||
[LDDFR] = 0x424,
|
||||
[LDSM1R] = 0x428,
|
||||
[LDSM2R] = 0x42c,
|
||||
[LDSA1R] = 0x430,
|
||||
[LDMLSR] = 0x438,
|
||||
[LDHCNR] = 0x448,
|
||||
|
|
@ -83,6 +90,7 @@ static unsigned long lcdc_offs_sublcd[] = {
|
|||
[LDMT3R] = 0x608,
|
||||
[LDDFR] = 0x60c,
|
||||
[LDSM1R] = 0x610,
|
||||
[LDSM2R] = 0x614,
|
||||
[LDSA1R] = 0x618,
|
||||
[LDMLSR] = 0x620,
|
||||
[LDHCNR] = 0x624,
|
||||
|
|
@ -96,6 +104,8 @@ static unsigned long lcdc_offs_sublcd[] = {
|
|||
#define LCDC_RESET 0x00000100
|
||||
#define DISPLAY_BEU 0x00000008
|
||||
#define LCDC_ENABLE 0x00000001
|
||||
#define LDINTR_FE 0x00000400
|
||||
#define LDINTR_FS 0x00000004
|
||||
|
||||
static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
|
||||
int reg_nr, unsigned long data)
|
||||
|
|
@ -170,6 +180,65 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
|
|||
lcdc_sys_read_data,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
|
||||
{
|
||||
if (atomic_inc_and_test(&priv->clk_usecnt)) {
|
||||
clk_enable(priv->clk);
|
||||
if (priv->dot_clk)
|
||||
clk_enable(priv->dot_clk);
|
||||
}
|
||||
}
|
||||
|
||||
static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
|
||||
{
|
||||
if (atomic_sub_return(1, &priv->clk_usecnt) == -1) {
|
||||
if (priv->dot_clk)
|
||||
clk_disable(priv->dot_clk);
|
||||
clk_disable(priv->clk);
|
||||
}
|
||||
}
|
||||
#else
|
||||
static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {}
|
||||
static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {}
|
||||
#endif
|
||||
|
||||
static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
|
||||
struct list_head *pagelist)
|
||||
{
|
||||
struct sh_mobile_lcdc_chan *ch = info->par;
|
||||
|
||||
/* enable clocks before accessing hardware */
|
||||
sh_mobile_lcdc_clk_on(ch->lcdc);
|
||||
|
||||
/* trigger panel update */
|
||||
lcdc_write_chan(ch, LDSM2R, 1);
|
||||
}
|
||||
|
||||
static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
|
||||
{
|
||||
struct fb_deferred_io *fbdefio = info->fbdefio;
|
||||
|
||||
if (fbdefio)
|
||||
schedule_delayed_work(&info->deferred_work, fbdefio->delay);
|
||||
}
|
||||
|
||||
static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
|
||||
{
|
||||
struct sh_mobile_lcdc_priv *priv = data;
|
||||
unsigned long tmp;
|
||||
|
||||
/* acknowledge interrupt */
|
||||
tmp = lcdc_read(priv, _LDINTR);
|
||||
tmp &= 0xffffff00; /* mask in high 24 bits */
|
||||
tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */
|
||||
lcdc_write(priv, _LDINTR, tmp);
|
||||
|
||||
/* disable clocks */
|
||||
sh_mobile_lcdc_clk_off(priv);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
|
||||
int start)
|
||||
{
|
||||
|
|
@ -207,6 +276,11 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
|||
int k, m;
|
||||
int ret = 0;
|
||||
|
||||
/* enable clocks before accessing the hardware */
|
||||
for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
|
||||
if (priv->ch[k].enabled)
|
||||
sh_mobile_lcdc_clk_on(priv);
|
||||
|
||||
/* reset */
|
||||
lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
|
||||
lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
|
||||
|
|
@ -249,7 +323,7 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
|||
lcdc_write(priv, _LDDCKSTPR, 0);
|
||||
lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
|
||||
|
||||
/* interrupts are disabled */
|
||||
/* interrupts are disabled to begin with */
|
||||
lcdc_write(priv, _LDINTR, 0);
|
||||
|
||||
for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
|
||||
|
|
@ -310,9 +384,6 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* --- display_lcdc_data() --- */
|
||||
lcdc_write(priv, _LDINTR, 0x00000f00);
|
||||
|
||||
/* word and long word swap */
|
||||
lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
|
||||
|
||||
|
|
@ -334,8 +405,24 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
|||
/* set line size */
|
||||
lcdc_write_chan(ch, LDMLSR, ch->info.fix.line_length);
|
||||
|
||||
/* continuous read mode */
|
||||
lcdc_write_chan(ch, LDSM1R, 0);
|
||||
/* setup deferred io if SYS bus */
|
||||
tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
|
||||
if (ch->ldmt1r_value & (1 << 12) && tmp) {
|
||||
ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
|
||||
ch->defio.delay = msecs_to_jiffies(tmp);
|
||||
ch->info.fbdefio = &ch->defio;
|
||||
fb_deferred_io_init(&ch->info);
|
||||
|
||||
/* one-shot mode */
|
||||
lcdc_write_chan(ch, LDSM1R, 1);
|
||||
|
||||
/* enable "Frame End Interrupt Enable" bit */
|
||||
lcdc_write(priv, _LDINTR, LDINTR_FE);
|
||||
|
||||
} else {
|
||||
/* continuous read mode */
|
||||
lcdc_write_chan(ch, LDSM1R, 0);
|
||||
}
|
||||
}
|
||||
|
||||
/* display output */
|
||||
|
|
@ -359,6 +446,7 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
|
|||
{
|
||||
struct sh_mobile_lcdc_chan *ch;
|
||||
struct sh_mobile_lcdc_board_cfg *board_cfg;
|
||||
unsigned long tmp;
|
||||
int k;
|
||||
|
||||
/* tell the board code to disable the panel */
|
||||
|
|
@ -367,10 +455,22 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
|
|||
board_cfg = &ch->cfg.board_cfg;
|
||||
if (board_cfg->display_off)
|
||||
board_cfg->display_off(board_cfg->board_data);
|
||||
|
||||
/* cleanup deferred io if SYS bus */
|
||||
tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
|
||||
if (ch->ldmt1r_value & (1 << 12) && tmp) {
|
||||
fb_deferred_io_cleanup(&ch->info);
|
||||
ch->info.fbdefio = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/* stop the lcdc */
|
||||
sh_mobile_lcdc_start_stop(priv, 0);
|
||||
|
||||
/* stop clocks */
|
||||
for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
|
||||
if (priv->ch[k].enabled)
|
||||
sh_mobile_lcdc_clk_off(priv);
|
||||
}
|
||||
|
||||
static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
|
||||
|
|
@ -413,9 +513,13 @@ static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int sh_mobile_lcdc_setup_clocks(struct device *dev, int clock_source,
|
||||
static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
|
||||
int clock_source,
|
||||
struct sh_mobile_lcdc_priv *priv)
|
||||
{
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
char clk_name[8];
|
||||
#endif
|
||||
char *str;
|
||||
int icksel;
|
||||
|
||||
|
|
@ -430,14 +534,21 @@ static int sh_mobile_lcdc_setup_clocks(struct device *dev, int clock_source,
|
|||
priv->lddckr = icksel << 16;
|
||||
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
atomic_set(&priv->clk_usecnt, -1);
|
||||
snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
|
||||
priv->clk = clk_get(&pdev->dev, clk_name);
|
||||
if (IS_ERR(priv->clk)) {
|
||||
dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
|
||||
return PTR_ERR(priv->clk);
|
||||
}
|
||||
|
||||
if (str) {
|
||||
priv->clk = clk_get(dev, str);
|
||||
if (IS_ERR(priv->clk)) {
|
||||
dev_err(dev, "cannot get clock %s\n", str);
|
||||
return PTR_ERR(priv->clk);
|
||||
priv->dot_clk = clk_get(&pdev->dev, str);
|
||||
if (IS_ERR(priv->dot_clk)) {
|
||||
dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
|
||||
clk_put(priv->clk);
|
||||
return PTR_ERR(priv->dot_clk);
|
||||
}
|
||||
|
||||
clk_enable(priv->clk);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -475,11 +586,34 @@ static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
|
|||
.accel = FB_ACCEL_NONE,
|
||||
};
|
||||
|
||||
static void sh_mobile_lcdc_fillrect(struct fb_info *info,
|
||||
const struct fb_fillrect *rect)
|
||||
{
|
||||
sys_fillrect(info, rect);
|
||||
sh_mobile_lcdc_deferred_io_touch(info);
|
||||
}
|
||||
|
||||
static void sh_mobile_lcdc_copyarea(struct fb_info *info,
|
||||
const struct fb_copyarea *area)
|
||||
{
|
||||
sys_copyarea(info, area);
|
||||
sh_mobile_lcdc_deferred_io_touch(info);
|
||||
}
|
||||
|
||||
static void sh_mobile_lcdc_imageblit(struct fb_info *info,
|
||||
const struct fb_image *image)
|
||||
{
|
||||
sys_imageblit(info, image);
|
||||
sh_mobile_lcdc_deferred_io_touch(info);
|
||||
}
|
||||
|
||||
static struct fb_ops sh_mobile_lcdc_ops = {
|
||||
.fb_setcolreg = sh_mobile_lcdc_setcolreg,
|
||||
.fb_fillrect = cfb_fillrect,
|
||||
.fb_copyarea = cfb_copyarea,
|
||||
.fb_imageblit = cfb_imageblit,
|
||||
.fb_read = fb_sys_read,
|
||||
.fb_write = fb_sys_write,
|
||||
.fb_fillrect = sh_mobile_lcdc_fillrect,
|
||||
.fb_copyarea = sh_mobile_lcdc_copyarea,
|
||||
.fb_imageblit = sh_mobile_lcdc_imageblit,
|
||||
};
|
||||
|
||||
static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
|
||||
|
|
@ -540,8 +674,9 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (res == NULL) {
|
||||
dev_err(&pdev->dev, "cannot find IO resource\n");
|
||||
i = platform_get_irq(pdev, 0);
|
||||
if (!res || i < 0) {
|
||||
dev_err(&pdev->dev, "cannot get platform resources\n");
|
||||
error = -ENOENT;
|
||||
goto err0;
|
||||
}
|
||||
|
|
@ -553,6 +688,14 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
goto err0;
|
||||
}
|
||||
|
||||
error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
|
||||
pdev->dev.bus_id, priv);
|
||||
if (error) {
|
||||
dev_err(&pdev->dev, "unable to request irq\n");
|
||||
goto err1;
|
||||
}
|
||||
|
||||
priv->irq = i;
|
||||
platform_set_drvdata(pdev, priv);
|
||||
pdata = pdev->dev.platform_data;
|
||||
|
||||
|
|
@ -587,8 +730,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
error = sh_mobile_lcdc_setup_clocks(&pdev->dev,
|
||||
pdata->clock_source, priv);
|
||||
error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
|
||||
if (error) {
|
||||
dev_err(&pdev->dev, "unable to setup clocks\n");
|
||||
goto err1;
|
||||
|
|
@ -637,6 +779,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
info->fix.smem_start = priv->ch[i].dma_handle;
|
||||
info->screen_base = buf;
|
||||
info->device = &pdev->dev;
|
||||
info->par = &priv->ch[i];
|
||||
}
|
||||
|
||||
if (error)
|
||||
|
|
@ -664,6 +807,10 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
(int) priv->ch[i].cfg.lcd_cfg.xres,
|
||||
(int) priv->ch[i].cfg.lcd_cfg.yres,
|
||||
priv->ch[i].cfg.bpp);
|
||||
|
||||
/* deferred io mode: disable clock to save power */
|
||||
if (info->fbdefio)
|
||||
sh_mobile_lcdc_clk_off(priv);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -697,15 +844,16 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
if (priv->clk) {
|
||||
clk_disable(priv->clk);
|
||||
clk_put(priv->clk);
|
||||
}
|
||||
if (priv->dot_clk)
|
||||
clk_put(priv->dot_clk);
|
||||
clk_put(priv->clk);
|
||||
#endif
|
||||
|
||||
if (priv->base)
|
||||
iounmap(priv->base);
|
||||
|
||||
if (priv->irq)
|
||||
free_irq(priv->irq, priv);
|
||||
kfree(priv);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue