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msm: ep_pcie: Correct clkreq override value

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Use unshifted value to set the clock req override value
and enable fields as the register write function already
shifts the values to the correct position.

Change-Id: I0b5dea0f6f8462363471910ffe93f8f8975e7929
Signed-off-by: Siva Kumar Akkireddi <sivaa@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
This commit is contained in:
Siva Kumar Akkireddi 2020-06-30 02:06:57 +05:30 • committed by Gerrit - the friendly Code Review server
commit 821b9fac95
2 changed files with 14 additions and 6 deletions
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8
drivers/platform/msm/ep_pcie/ep_pcie_com.h
View file

@ -47,9 +47,13 @@
#define PCIE20_PARF_CLKREQ_OVERRIDE 0x2B0
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_STS BIT(5)
#define PCIE20_PARF_CLKREQ_OE_OVERRIDE_STS BIT(4)
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL BIT(3)
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_MASK BIT(3)
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_ASSERT 0
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_DEASSERT 1
#define PCIE20_PARF_CLKREQ_OE_OVERRIDE_VAL BIT(2)
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE BIT(1)
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_MASK BIT(1)
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_DIS 0
#define PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_EN 1
#define PCIE20_PARF_CLKREQ_OE_OVERRIDE_ENABLE BIT(0)
#define PCIE20_PARF_SLV_ADDR_MSB_CTRL 0x2C0

12
drivers/platform/msm/ep_pcie/ep_pcie_core.c
View file

@ -1440,14 +1440,18 @@ static int ep_pcie_core_clkreq_override(bool config)
if (config) {
ep_pcie_write_reg_field(dev->parf, PCIE20_PARF_CLKREQ_OVERRIDE,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL, BIT(3));
PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_MASK,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_DEASSERT);
ep_pcie_write_reg_field(dev->parf, PCIE20_PARF_CLKREQ_OVERRIDE,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE, BIT(1));
PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_MASK,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_EN);
} else {
ep_pcie_write_reg_field(dev->parf, PCIE20_PARF_CLKREQ_OVERRIDE,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE, 0);
PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_MASK,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_ENABLE_DIS);
ep_pcie_write_reg_field(dev->parf, PCIE20_PARF_CLKREQ_OVERRIDE,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL, 0);
PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_MASK,
PCIE20_PARF_CLKREQ_IN_OVERRIDE_VAL_ASSERT);
}
return 0;