diff --git a/drivers/platform/msm/sps/bam.c b/drivers/platform/msm/sps/bam.c
index 3c37ffb421df..e99e9e3c2b66 100644
--- a/drivers/platform/msm/sps/bam.c
+++ b/drivers/platform/msm/sps/bam.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2021, The Linux Foundation. All rights reserved.
  */
 /* Bus-Access-Manager (BAM) Hardware manager. */
 
@@ -2140,13 +2140,16 @@ void print_bam_pipe_desc_fifo(void *virt_addr, u32 pipe_index, u32 option)
 	u32 pipe = pipe_index;
 	u32 desc_fifo_addr;
 	u32 desc_fifo_size;
-	u32 *desc_fifo;
+	u32 __iomem *desc_fifo;
 	int i;
 	char desc_info[MAX_MSG_LEN];
+	struct sps_bam *dev;
 
 	if (base == NULL)
 		return;
 
+	dev = to_sps_bam_dev(virt_addr);
+
 	desc_fifo_addr = bam_read_reg(base, P_DESC_FIFO_ADDR, pipe);
 	desc_fifo_size = bam_read_reg_field(base, P_FIFO_SIZES, pipe,
 						P_DESC_FIFO_SIZE);
@@ -2167,7 +2170,14 @@ void print_bam_pipe_desc_fifo(void *virt_addr, u32 pipe_index, u32 option)
 		"BAM_P_DESC_FIFO_SIZE: 0x%x (%d)\n\n",
 		desc_fifo_addr, desc_fifo_size, desc_fifo_size);
 
-	desc_fifo = (u32 *) phys_to_virt(desc_fifo_addr);
+	if (dev->props.options & SPS_BAM_SMMU_EN) {
+		struct sps_pipe *pipe_indx = dev->pipes[pipe_index];
+
+		SPS_DUMP("%s", "SMMU is enabled\n");
+		desc_fifo = pipe_indx->map->desc.base;
+	} else {
+		desc_fifo = (u32 __iomem *) phys_to_virt(desc_fifo_addr);
+	}
 
 	if (option == 100) {
 		SPS_DUMP("%s",
diff --git a/include/linux/msm-sps.h b/include/linux/msm-sps.h
index 67247dcaa155..773a0be9302b 100644
--- a/include/linux/msm-sps.h
+++ b/include/linux/msm-sps.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  */
 /* Smart-Peripheral-Switch (SPS) API. */
 
@@ -485,7 +485,7 @@ struct sps_bam_props {
  *
  */
 struct sps_mem_buffer {
-	void *base;
+	void __iomem *base;
 	phys_addr_t phys_base;
 	unsigned long iova;
 	u32 size;