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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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stmicro_mmi: update driver to version 5.2.19
Added support for multiple ST chipsets Change-Id: Iaf54dc69f28eaf90f0308028bde20e3a3af1fb84 Signed-off-by: Konstantin Makariev <hcv867@motorola.com> Reviewed-on: https://gerrit.mot.com/1824927 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Ling Jin <lingjin@motorola.com> Submit-Approved: Jira Key
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1cb72c3447
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8250cd3d74
4 changed files with 143 additions and 5 deletions
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@ -3127,6 +3127,88 @@ static void fts_interrupt_enable(struct fts_ts_info *info)
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static int fts_init(struct fts_ts_info *info)
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{
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int error;
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u8 readData[3];
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#if !defined(I2C_INTERFACE) && defined(SPI4_WIRE)
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/* configure manually SPI4 because when no fw is running the chip use
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* SPI3 by default */
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u8 cmd[1] = {0x00};
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logError(0, "%s Setting SPI4 mode...\n", tag);
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cmd[0] = 0x10;
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error = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_DIRECTION, cmd, 1);
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if (error < OK) {
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logError(1, "%s can not set gpio dir ERROR %08X\n",
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tag, error);
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return error;
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}
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cmd[0] = 0x02;
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error = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_PULLUP, cmd, 1);
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if (error < OK) {
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logError(1, "%s can not set gpio pull-up ERROR %08X\n",
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tag, error);
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return error;
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}
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#if defined(ALIX) || defined (SALIXP)
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#if defined(ALIX)
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cmd[0] = 0x70;
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#else
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cmd[0] = 0x07;
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#endif
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error = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_CONFIG_REG3, cmd, 1);
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if (error < OK) {
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logError(1, "%s can not set gpio config ERROR %08X\n",
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tag, error);
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return error;
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}
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#else
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cmd[0] = 0x07;
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error = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_CONFIG_REG2, cmd, 1);
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if (error < OK) {
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logError(1, "%s can not set gpio config ERROR %08X\n",
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tag, error);
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return error;
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}
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#endif
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cmd[0] = 0x30;
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error = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_CONFIG_REG0, cmd, 1);
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if (error < OK) {
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logError(1, "%s can not set gpio config ERROR %08X\n",
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tag, error);
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return error;
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}
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cmd[0] = SPI4_MASK;
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error = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG, ADDR_ICR, cmd,
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1);
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if (error < OK) {
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logError(1, "%s can not set spi4 mode ERROR %08X\n",
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tag, error);
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return error;
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}
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msleep(1); /* wait for the GPIO to stabilize */
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#endif
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logError(1, "%s Reading chip id\n", tag);
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error = fts_writeReadU8UX(FTS_CMD_HW_REG_R, ADDR_SIZE_HW_REG,
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ADDR_DCHIP_ID, readData, 2, DUMMY_FIFO);
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logError(1, "%s chip id: %02X %02X!\n",tag, readData[0], readData[1]);
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if((readData[0] != DCHIP_ID_0) || (readData[1] != DCHIP_ID_1))
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{
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logError(1, "%s wrong chip id detected!\n", tag);
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return ERROR_OP_NOT_ALLOW;
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}
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else
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logError(1, "%s chip id read successful!\n", tag);
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error = fts_system_reset();
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@ -45,8 +45,8 @@
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*/
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/* **** CODE CONFIGURATION **** */
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#define FTS_TS_DRV_NAME "fts" /* /< driver name */
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#define FTS_TS_DRV_VERSION "5.2.18" /* /< driver version string format */
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#define FTS_TS_DRV_VER 0x05021200 /* driver version u32 format */
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#define FTS_TS_DRV_VERSION "5.2.19" /* /< driver version string format */
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#define FTS_TS_DRV_VER 0x05021300 /* driver version u32 format */
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#define DEBUG /* /< define to print more logs in the kernel log and better
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* follow the code flow */
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@ -293,6 +293,21 @@ int hold_m3(void)
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return ret;
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}
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#if defined(ALIX) || defined (SALIXP)
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#if defined(ALIX)
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cmd[0] = 0x70;
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#else
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cmd[0] = 0x07;
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#endif
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ret = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_CONFIG_REG3, cmd, 1);
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if (ret < OK) {
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logError(1, "%s hold_m3: can not set gpio config ERROR %08X\n",
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tag, ret);
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return ret;
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}
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#else
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cmd[0] = 0x07;
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ret = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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ADDR_GPIO_CONFIG_REG2, cmd, 1);
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@ -301,6 +316,7 @@ int hold_m3(void)
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tag, ret);
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return ret;
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}
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#endif
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cmd[0] = 0x30;
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ret = fts_writeU8UX(FTS_CMD_HW_REG_W, ADDR_SIZE_HW_REG,
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@ -683,6 +699,16 @@ int flash_erase_page_by_page(ErasePage keep_cx, Firmware *fw)
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u8 flash_panel_start_page = FLASH_PANEL_PAGE_START;
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u8 flash_panel_end_page = FLASH_PANEL_PAGE_END;
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#ifdef SALIXP
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u8 cmd[10] = { FTS_CMD_HW_REG_W, 0x20, 0x00, 0x00, FLASH_ERASE_CODE0,
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0x80, 0x00, 0xFF, 0x1C, 0x90 };
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u8 cmd2[11] = { FTS_CMD_HW_REG_W, 0x20, 0x00,
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0x01, 0x28,
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0xFF,
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0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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u8 mask[6] = { 0 };
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u8 mask_cnt = 6;
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#else
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u8 cmd1[6] = { FTS_CMD_HW_REG_W, 0x20, 0x00, 0x00,
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FLASH_ERASE_CODE0 + 1, 0x00 };
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u8 cmd[6] = { FTS_CMD_HW_REG_W, 0x20, 0x00, 0x00, FLASH_ERASE_CODE0,
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@ -692,6 +718,8 @@ int flash_erase_page_by_page(ErasePage keep_cx, Firmware *fw)
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0xFF,
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0xFF, 0xFF, 0xFF };
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u8 mask[4] = { 0 };
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u8 mask_cnt = 4;
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#endif
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if ((fw->fw_code_size == 0) || (fw->panel_config_size == 0) || (fw->cx_area_size == 0) || (fw->fw_config_size == 0))
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{
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@ -719,19 +747,21 @@ int flash_erase_page_by_page(ErasePage keep_cx, Firmware *fw)
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for (i = flash_cx_start_page; i <= flash_cx_end_page && keep_cx >=
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SKIP_PANEL_CX_INIT; i++) {
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logError(0, "%s Skipping erase CX page %d!\n", tag, i);
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fromIDtoMask(i, mask, 4);
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fromIDtoMask(i, mask, mask_cnt);
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}
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for (i = flash_panel_start_page; i <= flash_panel_end_page && keep_cx >=
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SKIP_PANEL_INIT; i++) {
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logError(0, "%s Skipping erase Panel Init page %d!\n", tag, i);
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fromIDtoMask(i, mask, 4);
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fromIDtoMask(i, mask, mask_cnt);
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}
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logError(0, "%s Setting the page mask = ", tag);
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for (i = 0; i < 4; i++) {
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for (i = 0; i < mask_cnt; i++) {
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cmd2[5 + i] = cmd2[5 + i] & (~mask[i]);
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logError(0, "%02X ", cmd2[5 + i]);
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}
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@ -745,6 +775,7 @@ int flash_erase_page_by_page(ErasePage keep_cx, Firmware *fw)
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return ERROR_BUS_W;
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}
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#ifndef SALIXP
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if (fts_write(cmd1, ARRAY_SIZE(cmd1)) < OK) {
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logError(1,
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"%s flash_erase_page_by_page: Disable info ERROR %08X\n",
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@ -752,6 +783,7 @@ int flash_erase_page_by_page(ErasePage keep_cx, Firmware *fw)
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ERROR_BUS_W);
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return ERROR_BUS_W;
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}
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#endif
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logError(0, "%s Command erase pages sent ...\n", tag);
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if (fts_write(cmd, ARRAY_SIZE(cmd)) < OK) {
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@ -783,8 +815,14 @@ int flash_erase_page_by_page(ErasePage keep_cx, Firmware *fw)
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int start_flash_dma(void)
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{
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int status;
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#ifdef SALIXP
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u8 cmd[12] = { FLASH_CMD_WRITE_REGISTER, 0x20, 0x00, 0x00,
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0x6B, 0x00, 0xFF, 0x1C, 0x10, 0x00, 0x00, FLASH_DMA_CODE1 };
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#else
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u8 cmd[12] = { FLASH_CMD_WRITE_REGISTER, 0x20, 0x00, 0x00,
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0x6B, 0x00, 0x40, 0x42, 0x0F, 0x00, 0x00, FLASH_DMA_CODE1 };
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#endif
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/* write the command to erase the flash */
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@ -25,10 +25,18 @@
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/* DIGITAL CHIP INFO */
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//#define ALIX
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//#define WALNUT
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//#define SALIXP
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#ifdef ALIX
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#define DCHIP_ID_0 0x36 /* /< LSB chip ID for FTM5 */
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#define DCHIP_ID_1 0x48 /* /< MSB chip ID for FTM5 */
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#elif defined(WALNUT)
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#define DCHIP_ID_0 0x36 /* /< LSB chip ID for FTM5 */
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#define DCHIP_ID_1 0x50 /* /< MSB chip ID for FTM5 */
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#elif defined(SALIXP)
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#define DCHIP_ID_0 0x36 /* /< LSB chip ID for FTM5 */
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#define DCHIP_ID_1 0x40 /* /< MSB chip ID for FTM5 */
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#else
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#define DCHIP_ID_0 0x36 /* /< LSB chip ID for FTM5 */
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#define DCHIP_ID_1 0x39 /* /< MSB chip ID for FTM5 */
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@ -106,8 +114,14 @@
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#define FLASH_ERASE_CODE0 0x6A
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#define FLASH_DMA_CODE0 0x71
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#define FLASH_DMA_CONFIG 0x72
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#ifdef SALIXP
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#define FLASH_NUM_PAGE 48 /* /< number of pages in main
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* flash */
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#else
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#define FLASH_NUM_PAGE 32 /* /< number of pages in main
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* flash */
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#endif
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#define FLASH_CX_PAGE_START 28 /* /< starting page which
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* contain Cx data */
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@ -300,6 +314,10 @@
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#define ADDR_GPIO_CONFIG_REG2 ((u64)0x000000002000003F) /* /< address of
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* GPIO config register
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*/
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#define ADDR_GPIO_CONFIG_REG3 ((u64)0x000000002000003E) /* /< address of
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* GPIO config register
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*/
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/**@}*/
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