From 76259444f1036fc97d02d9fd18c7fb7d4ff2d524 Mon Sep 17 00:00:00 2001 From: Krishna Manikandan Date: Wed, 2 Sep 2020 12:33:59 +0530 Subject: [PATCH 1/2] ARM: dts: msm: enable SDE RSC driver on shima Enable sde rscc v4 driver on shima target Change-Id: Ib0d930dfc6837f53edbff41970035ec0165586ae --- display/shima-sde-display.dtsi | 2 +- display/shima-sde.dtsi | 16 ---------------- 2 files changed, 1 insertion(+), 17 deletions(-) diff --git a/display/shima-sde-display.dtsi b/display/shima-sde-display.dtsi index 915fcb443d56..27f33e0b435c 100644 --- a/display/shima-sde-display.dtsi +++ b/display/shima-sde-display.dtsi @@ -138,7 +138,7 @@ &mdss_mdp { connectors = <&smmu_sde_unsec &smmu_sde_sec &sde_wb &sde_dsi - &sde_dsi1>; + &sde_dsi1 &sde_rscc>; }; &dsi_r66451_amoled_video { diff --git a/display/shima-sde.dtsi b/display/shima-sde.dtsi index 6e5e724c7e6e..6cbbb353d36f 100644 --- a/display/shima-sde.dtsi +++ b/display/shima-sde.dtsi @@ -147,7 +147,6 @@ sde_rscc: qcom,sde_rscc { cell-index = <0>; compatible = "qcom,sde-rsc"; - status = "disabled"; reg = <0xaf20000 0x4d68>, <0xaf30000 0x3fd4>; reg-names = "drv", "wrapper"; @@ -200,7 +199,6 @@ clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus", "iface_clk", "core_clk", "vsync_clk", "lut_clk"; - vdd-supply = <&disp_cc_mdss_core_gdsc>; /* data and reg bus scale settings */ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>, @@ -213,20 +211,6 @@ qcom,sde-dspp-ltm-version = <0x00010000>; /* offsets are based off dspp 0 and dspp 1 */ qcom,sde-dspp-ltm-off = <0x2a000 0x28100>; - - qcom,platform-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,platform-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdd"; - qcom,supply-min-voltage = <0>; - qcom,supply-max-voltage = <0>; - qcom,supply-enable-load = <0>; - qcom,supply-disable-load = <0>; - }; - }; }; &mdss_dsi0 { From 54f2fa30c41af22e04c5b63188f50ba65d5e2909 Mon Sep 17 00:00:00 2001 From: Rajat Gupta Date: Wed, 2 Sep 2020 15:07:40 +0530 Subject: [PATCH 2/2] ARM: dts: msm: Enable display port for shima Enable display port feature for shima target. Change-Id: Id62f46940f138ed97e7e0c9950c73b7964a7c763 --- display/shima-sde-display.dtsi | 2 +- display/shima-sde.dtsi | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/display/shima-sde-display.dtsi b/display/shima-sde-display.dtsi index 27f33e0b435c..4734603d6edf 100644 --- a/display/shima-sde-display.dtsi +++ b/display/shima-sde-display.dtsi @@ -137,7 +137,7 @@ }; &mdss_mdp { - connectors = <&smmu_sde_unsec &smmu_sde_sec &sde_wb &sde_dsi + connectors = <&smmu_sde_unsec &smmu_sde_sec &sde_dp &sde_wb &sde_dsi &sde_dsi1 &sde_rscc>; }; diff --git a/display/shima-sde.dtsi b/display/shima-sde.dtsi index 6cbbb353d36f..7b2994593d5f 100644 --- a/display/shima-sde.dtsi +++ b/display/shima-sde.dtsi @@ -3,7 +3,6 @@ &soc { ext_disp: qcom,msm-ext-disp { - status = "disabled"; compatible = "qcom,msm-ext-disp"; ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { @@ -12,12 +11,10 @@ }; qcom_msmhdcp: qcom,msm_hdcp { - status = "disabled"; compatible = "qcom,msm-hdcp"; }; sde_dp: qcom,dp_display@ae90000 { - status = "disabled"; cell-index = <0>; compatible = "qcom,dp-display";