From 826b4dc9485d4264764ff744ed4a3a98f5dff5bc Mon Sep 17 00:00:00 2001
From: Odelu Kukatla <okukatla@qti.qualcomm.com>
Date: Tue, 17 Nov 2020 22:39:21 +0530
Subject: [PATCH] dt-bindings: interconnect: add interconnect bindings for
 SDXNIGHTJAR

Add interconnect device bindings. These devices can be used to
describe any RPM and NoC based interconnect devices.

Change-Id: I434ab6ce6cdaa17a3d86d52920c6e7500720526d
---
 bindings/interconnect/qcom,sdxnightjar.txt | 52 ++++++++++++++++++++++
 1 file changed, 52 insertions(+)
 create mode 100644 bindings/interconnect/qcom,sdxnightjar.txt

diff --git a/bindings/interconnect/qcom,sdxnightjar.txt b/bindings/interconnect/qcom,sdxnightjar.txt
new file mode 100644
index 000000000000..72e19d5edae9
--- /dev/null
+++ b/bindings/interconnect/qcom,sdxnightjar.txt
@@ -0,0 +1,52 @@
+QTI SDXNIGHTJAR Network-On-Chip interconnect driver binding
+-----------------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+			"qcom,sdxnightjar-bimc",
+			"qcom,sdxnightjar-pcnoc",
+			"qcom,sdxnightjar-snoc",
+- #interconnect-cells : should contain 1
+
+reg : specifies the physical base address and size of registers
+clocks : list of phandles and specifiers to all interconnect bus clocks
+clock-names : clock names should include both "bus" and "bus_a"
+
+The following are optional properties:
+
+qcom,util-factor : Parameter that represents the DDR utilization factor
+		to be used in aggregation scheme. It is represented as
+		actual util-factor * 100.
+
+Examples:
+
+soc {
+	...
+	system_noc: interconnect@580000 {
+		reg = <0x580000 0x14000>;
+		compatible = "qcom,sdxnightjar-snoc";
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+			<&rpmcc RPM_SMD_SNOC_A_CLK>,
+	};
+
+	pc_noc: interconnect@500000{
+		reg = <0x500000 0x11000>;
+		compatible = "qcom,sdxnightjar-pcnoc";
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
+			<&rpmcc RPM_SMD_PCNOC_A_CLK>;
+	};
+
+	bimc: interconnect@400000{
+		reg = <0x400000 0x62000>;
+		compatible = "qcom,sdxnightjar-bimc";
+		qcom,util-factor = <153>;
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+			<&rpmcc RPM_SMD_BIMC_A_CLK>;
+	};
+};