mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: arm-soc: Header cleanups
This is a collection of header file cleanups, mostly for OMAP and AT91, that keeps moving the platforms in the direction of multiplatform by removing the need for mach-dependent header files used in drivers and other places. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQx2reAAoJEIwa5zzehBx3Z/oQAIHp8aXbUD0GvbBPQ2vIydZ8 Qfdh2ypbyFB9GSLmPP6BhurEFUcwmW3MH2r9Kq68omPt4XxrFEt1SdEn3TgZlhTY YYzEv2DLbWfmKCDBFAEFullsfVkrpggyou5ty30YVp/u2lVLvChpkciE5/9HADy5 uoh/W2KZcLE51tvnbRy/1DBaOtxEdCjJ9hTaef7FCB9ugOG+yMDYwIPRW/b4fNA6 o/1NuZTWp0H4ePRG2oqLxYnjSiF63DVTJZjSJ+c5gW34bWgh8+/xzaLFA9U++/ig meGUD1Oe65+ctr+Wk2mV29eb02jauUe6qvkwt+iFIDDopgc2mn5BcW+ENpgpjhe3 6l3ClRd94qh4cMWzqDa5PZCdetshiKqSH2IGpKS/dHNB1h5sBP7CCbvbalwzWd5n qjfkPC7kSFyU3XV+9SEAXE6HLKsiMQy9kRcKOMdTE5BA4FEAZk0wfiG9WcVCvS2D 9tDC3X0aScyXx4Mkd4wIAZVhY68QuI17fPft9zZSj691YiUW5cR2yF1qbCka0yd5 pHu/QSZg1+dUitMUvMPQmWJ15jnAtEYUtV/8zQFFVchgkxlrW+UtvW3zxghB6D+J ZwcjAMfQQz9fLoMQXlVovjQIhYsjw3SlV62ReBH7eyPs3+KfPIBn7Ks6mVQs3dS5 AMUWORsB5u92XHl9EL9C =aggA -----END PGP SIGNATURE----- Merge tag 'headers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC Header cleanups from Olof Johansson: "This is a collection of header file cleanups, mostly for OMAP and AT91, that keeps moving the platforms in the direction of multiplatform by removing the need for mach-dependent header files used in drivers and other places." Fix up mostly trivial conflicts as per Olof. * tag 'headers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (106 commits) ARM: OMAP2+: Move iommu/iovmm headers to platform_data ARM: OMAP2+: Make some definitions local ARM: OMAP2+: Move iommu2 to drivers/iommu/omap-iommu2.c ARM: OMAP2+: Move plat/iovmm.h to include/linux/omap-iommu.h ARM: OMAP2+: Move iopgtable header to drivers/iommu/ ARM: OMAP: Merge iommu2.h into iommu.h atmel: move ATMEL_MAX_UART to platform_data/atmel.h ARM: OMAP: Remove omap_init_consistent_dma_size() arm: at91: move at91rm9200 rtc header in drivers/rtc arm: at91: move reset controller header to arm/arm/mach-at91 arm: at91: move pit define to the driver arm: at91: move at91_shdwc.h to arch/arm/mach-at91 arm: at91: move board header to arch/arm/mach-at91 arn: at91: move at91_tc.h to arch/arm/mach-at91 arm: at91 move at91_aic.h to arch/arm/mach-at91 arm: at91 move board.h to arch/arm/mach-at91 arm: at91: move platfarm_data to include/linux/platform_data/atmel.h arm: at91: drop machine defconfig ARM: OMAP: Remove NEED_MACH_GPIO_H ARM: OMAP: Remove unnecessary mach and plat includes ...
This commit is contained in:
Linus Torvalds
commit
8287361abc
447 changed files with 8659 additions and 8518 deletions
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@ -27,8 +27,7 @@
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#include <linux/bch.h>
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#endif
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#include <plat/dma.h>
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#include <plat/gpmc.h>
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#include <plat-omap/dma-omap.h>
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#include <linux/platform_data/mtd-nand-omap2.h>
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#define DRIVER_NAME "omap2-nand"
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@ -106,10 +105,18 @@
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#define CS_MASK 0x7
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#define ENABLE_PREFETCH (0x1 << 7)
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#define DMA_MPU_MODE_SHIFT 2
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#define ECCSIZE0_SHIFT 12
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#define ECCSIZE1_SHIFT 22
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#define ECC1RESULTSIZE 0x1
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#define ECCCLEAR 0x100
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#define ECC1 0x1
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#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
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#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
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#define PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
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#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
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#define STATUS_BUFF_EMPTY 0x00000001
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#define OMAP24XX_DMA_GPMC 4
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/* oob info generated runtime depending on ecc algorithm and layout selected */
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static struct nand_ecclayout omap_oobinfo;
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@ -269,7 +276,7 @@ static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
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/* wait until buffer is available for write */
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do {
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status = readl(info->reg.gpmc_status) &
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GPMC_STATUS_BUFF_EMPTY;
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STATUS_BUFF_EMPTY;
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} while (!status);
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}
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}
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@ -307,7 +314,7 @@ static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
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/* wait until buffer is available for write */
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do {
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status = readl(info->reg.gpmc_status) &
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GPMC_STATUS_BUFF_EMPTY;
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STATUS_BUFF_EMPTY;
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} while (!status);
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}
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}
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@ -348,7 +355,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
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} else {
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do {
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r_count = readl(info->reg.gpmc_prefetch_status);
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r_count = GPMC_PREFETCH_STATUS_FIFO_CNT(r_count);
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r_count = PREFETCH_STATUS_FIFO_CNT(r_count);
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r_count = r_count >> 2;
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ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
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p += r_count;
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@ -395,7 +402,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
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} else {
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while (len) {
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w_count = readl(info->reg.gpmc_prefetch_status);
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w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count);
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w_count = PREFETCH_STATUS_FIFO_CNT(w_count);
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w_count = w_count >> 1;
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for (i = 0; (i < w_count) && len; i++, len -= 2)
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iowrite16(*p++, info->nand.IO_ADDR_W);
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@ -407,7 +414,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
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do {
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cpu_relax();
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val = readl(info->reg.gpmc_prefetch_status);
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val = GPMC_PREFETCH_STATUS_COUNT(val);
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val = PREFETCH_STATUS_COUNT(val);
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} while (val && (tim++ < limit));
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/* disable and stop the PFPW engine */
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@ -493,7 +500,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
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do {
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cpu_relax();
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val = readl(info->reg.gpmc_prefetch_status);
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val = GPMC_PREFETCH_STATUS_COUNT(val);
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val = PREFETCH_STATUS_COUNT(val);
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} while (val && (tim++ < limit));
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/* disable and stop the PFPW engine */
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@ -556,7 +563,7 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
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u32 bytes;
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bytes = readl(info->reg.gpmc_prefetch_status);
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bytes = GPMC_PREFETCH_STATUS_FIFO_CNT(bytes);
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bytes = PREFETCH_STATUS_FIFO_CNT(bytes);
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bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */
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if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
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if (this_irq == info->gpmc_irq_count)
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@ -682,7 +689,7 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
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limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
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do {
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val = readl(info->reg.gpmc_prefetch_status);
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val = GPMC_PREFETCH_STATUS_COUNT(val);
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val = PREFETCH_STATUS_COUNT(val);
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cpu_relax();
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} while (val && (tim++ < limit));
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@ -996,7 +1003,7 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
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cond_resched();
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}
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status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);
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status = readb(info->reg.gpmc_nand_data);
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return status;
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}
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@ -1029,19 +1036,45 @@ static int omap_dev_ready(struct mtd_info *mtd)
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static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
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{
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int nerrors;
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unsigned int dev_width;
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unsigned int dev_width, nsectors;
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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struct nand_chip *chip = mtd->priv;
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u32 val;
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nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
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dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
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nsectors = 1;
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/*
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* Program GPMC to perform correction on one 512-byte sector at a time.
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* Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and
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* gives a slight (5%) performance gain (but requires additional code).
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*/
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(void)gpmc_enable_hwecc_bch(info->gpmc_cs, mode, dev_width, 1, nerrors);
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writel(ECC1, info->reg.gpmc_ecc_control);
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/*
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* When using BCH, sector size is hardcoded to 512 bytes.
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* Here we are using wrapping mode 6 both for reading and writing, with:
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* size0 = 0 (no additional protected byte in spare area)
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* size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
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*/
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val = (32 << ECCSIZE1_SHIFT) | (0 << ECCSIZE0_SHIFT);
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writel(val, info->reg.gpmc_ecc_size_config);
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/* BCH configuration */
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val = ((1 << 16) | /* enable BCH */
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(((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
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(0x06 << 8) | /* wrap mode = 6 */
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(dev_width << 7) | /* bus width */
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(((nsectors-1) & 0x7) << 4) | /* number of sectors */
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(info->gpmc_cs << 1) | /* ECC CS */
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(0x1)); /* enable ECC */
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writel(val, info->reg.gpmc_ecc_config);
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/* clear ecc and enable bits */
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writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
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}
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/**
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@ -1055,7 +1088,32 @@ static int omap3_calculate_ecc_bch4(struct mtd_info *mtd, const u_char *dat,
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{
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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return gpmc_calculate_ecc_bch4(info->gpmc_cs, dat, ecc_code);
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unsigned long nsectors, val1, val2;
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int i;
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nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
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for (i = 0; i < nsectors; i++) {
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/* Read hw-computed remainder */
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val1 = readl(info->reg.gpmc_bch_result0[i]);
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val2 = readl(info->reg.gpmc_bch_result1[i]);
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/*
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* Add constant polynomial to remainder, in order to get an ecc
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* sequence of 0xFFs for a buffer filled with 0xFFs; and
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* left-justify the resulting polynomial.
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*/
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*ecc_code++ = 0x28 ^ ((val2 >> 12) & 0xFF);
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*ecc_code++ = 0x13 ^ ((val2 >> 4) & 0xFF);
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*ecc_code++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
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*ecc_code++ = 0x39 ^ ((val1 >> 20) & 0xFF);
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*ecc_code++ = 0x96 ^ ((val1 >> 12) & 0xFF);
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*ecc_code++ = 0xac ^ ((val1 >> 4) & 0xFF);
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*ecc_code++ = 0x7f ^ ((val1 & 0xF) << 4);
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}
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return 0;
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}
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/**
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@ -1069,7 +1127,39 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
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{
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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return gpmc_calculate_ecc_bch8(info->gpmc_cs, dat, ecc_code);
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unsigned long nsectors, val1, val2, val3, val4;
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int i;
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nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
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for (i = 0; i < nsectors; i++) {
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/* Read hw-computed remainder */
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val1 = readl(info->reg.gpmc_bch_result0[i]);
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val2 = readl(info->reg.gpmc_bch_result1[i]);
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val3 = readl(info->reg.gpmc_bch_result2[i]);
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val4 = readl(info->reg.gpmc_bch_result3[i]);
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/*
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* Add constant polynomial to remainder, in order to get an ecc
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* sequence of 0xFFs for a buffer filled with 0xFFs.
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*/
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*ecc_code++ = 0xef ^ (val4 & 0xFF);
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*ecc_code++ = 0x51 ^ ((val3 >> 24) & 0xFF);
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*ecc_code++ = 0x2e ^ ((val3 >> 16) & 0xFF);
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*ecc_code++ = 0x09 ^ ((val3 >> 8) & 0xFF);
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*ecc_code++ = 0xed ^ (val3 & 0xFF);
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*ecc_code++ = 0x93 ^ ((val2 >> 24) & 0xFF);
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*ecc_code++ = 0x9a ^ ((val2 >> 16) & 0xFF);
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*ecc_code++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
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*ecc_code++ = 0x97 ^ (val2 & 0xFF);
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*ecc_code++ = 0x79 ^ ((val1 >> 24) & 0xFF);
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*ecc_code++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
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*ecc_code++ = 0x24 ^ ((val1 >> 8) & 0xFF);
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*ecc_code++ = 0xb5 ^ (val1 & 0xFF);
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}
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return 0;
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}
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/**
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@ -1125,7 +1215,7 @@ static void omap3_free_bch(struct mtd_info *mtd)
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*/
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static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
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{
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int ret, max_errors;
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int max_errors;
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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#ifdef CONFIG_MTD_NAND_OMAP_BCH8
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@ -1142,11 +1232,6 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
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goto fail;
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}
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/* initialize GPMC BCH engine */
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ret = gpmc_init_hwecc_bch(info->gpmc_cs, 1, max_errors);
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if (ret)
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goto fail;
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/* software bch library is only used to detect and locate errors */
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info->bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);
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if (!info->bch)
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@ -1513,7 +1598,7 @@ static int omap_nand_remove(struct platform_device *pdev)
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/* Release NAND device, its internal structures and partitions */
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nand_release(&info->mtd);
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iounmap(info->nand.IO_ADDR_R);
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release_mem_region(info->phys_base, NAND_IO_SIZE);
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release_mem_region(info->phys_base, info->mem_size);
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kfree(info);
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return 0;
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}
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@ -38,12 +38,10 @@
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#include <linux/regulator/consumer.h>
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#include <asm/mach/flash.h>
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#include <plat/gpmc.h>
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#include <linux/platform_data/mtd-onenand-omap2.h>
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#include <asm/gpio.h>
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#include <plat/dma.h>
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#include <plat/cpu.h>
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#include <plat-omap/dma-omap.h>
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#define DRIVER_NAME "omap2-onenand"
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@ -63,6 +61,7 @@ struct omap2_onenand {
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int freq;
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int (*setup)(void __iomem *base, int *freq_ptr);
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struct regulator *regulator;
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u8 flags;
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};
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static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data)
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@ -155,7 +154,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
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if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) {
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syscfg |= ONENAND_SYS_CFG1_IOBE;
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write_reg(c, syscfg, ONENAND_REG_SYS_CFG1);
|
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if (cpu_is_omap34xx())
|
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if (c->flags & ONENAND_IN_OMAP34XX)
|
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/* Add a delay to let GPIO settle */
|
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syscfg = read_reg(c, ONENAND_REG_SYS_CFG1);
|
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}
|
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|
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@ -446,13 +445,19 @@ out_copy:
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|
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#else
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|
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int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
|
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unsigned char *buffer, int offset,
|
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size_t count);
|
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static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
|
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unsigned char *buffer, int offset,
|
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size_t count)
|
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{
|
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return -ENOSYS;
|
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}
|
||||
|
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int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
|
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const unsigned char *buffer,
|
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int offset, size_t count);
|
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static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
|
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const unsigned char *buffer,
|
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int offset, size_t count)
|
||||
{
|
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return -ENOSYS;
|
||||
}
|
||||
|
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#endif
|
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|
||||
|
|
@ -550,13 +555,19 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
|
|||
|
||||
#else
|
||||
|
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int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
|
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unsigned char *buffer, int offset,
|
||||
size_t count);
|
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static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
|
||||
unsigned char *buffer, int offset,
|
||||
size_t count)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
|
||||
const unsigned char *buffer,
|
||||
int offset, size_t count);
|
||||
static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
|
||||
const unsigned char *buffer,
|
||||
int offset, size_t count)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -639,6 +650,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
|
|||
|
||||
init_completion(&c->irq_done);
|
||||
init_completion(&c->dma_done);
|
||||
c->flags = pdata->flags;
|
||||
c->gpmc_cs = pdata->cs;
|
||||
c->gpio_irq = pdata->gpio_irq;
|
||||
c->dma_channel = pdata->dma_channel;
|
||||
|
|
@ -729,7 +741,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
|
|||
this = &c->onenand;
|
||||
if (c->dma_channel >= 0) {
|
||||
this->wait = omap2_onenand_wait;
|
||||
if (cpu_is_omap34xx()) {
|
||||
if (c->flags & ONENAND_IN_OMAP34XX) {
|
||||
this->read_bufferram = omap3_onenand_read_bufferram;
|
||||
this->write_bufferram = omap3_onenand_write_bufferram;
|
||||
} else {
|
||||
|
|
@ -803,7 +815,6 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
|
|||
}
|
||||
iounmap(c->onenand.base);
|
||||
release_mem_region(c->phys_base, c->mem_size);
|
||||
gpmc_cs_free(c->gpmc_cs);
|
||||
kfree(c);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
Loading…
Reference in a new issue