From 7ed72aef1a168c949dfbf7df028ad93ee3d5db11 Mon Sep 17 00:00:00 2001 From: Manikandan Mohan Date: Fri, 29 May 2020 14:38:17 -0700 Subject: [PATCH 1/2] cnss2: Add support for bus bandwidth scale Register MHI bus bandwidth scale callback function. Change-Id: I0829db892545565c1d59898a988ed9f0da5d1470 Signed-off-by: Manikandan Mohan --- drivers/net/wireless/cnss2/pci.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/net/wireless/cnss2/pci.c b/drivers/net/wireless/cnss2/pci.c index 00c8f6998ccf..1ace9db7c33c 100644 --- a/drivers/net/wireless/cnss2/pci.c +++ b/drivers/net/wireless/cnss2/pci.c @@ -1116,16 +1116,20 @@ static int cnss_pci_set_mhi_state(struct cnss_pci_data *pci_priv, ret = 0; break; case CNSS_MHI_SUSPEND: + mutex_lock(&pci_priv->mhi_ctrl->pm_mutex); if (pci_priv->drv_connected_last) ret = mhi_pm_fast_suspend(pci_priv->mhi_ctrl, true); else ret = mhi_pm_suspend(pci_priv->mhi_ctrl); + mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex); break; case CNSS_MHI_RESUME: + mutex_lock(&pci_priv->mhi_ctrl->pm_mutex); if (pci_priv->drv_connected_last) ret = mhi_pm_fast_resume(pci_priv->mhi_ctrl, true); else ret = mhi_pm_resume(pci_priv->mhi_ctrl); + mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex); break; case CNSS_MHI_TRIGGER_RDDM: ret = mhi_force_rddm_mode(pci_priv->mhi_ctrl); @@ -4265,6 +4269,25 @@ static int cnss_pci_update_fw_name(struct cnss_pci_data *pci_priv) return 0; } +static int cnss_mhi_bw_scale(struct mhi_controller *mhi_ctrl, + struct mhi_link_info *link_info) +{ + struct cnss_pci_data *pci_priv = mhi_ctrl->priv_data; + int ret = 0; + + ret = msm_pcie_set_link_bandwidth(pci_priv->pci_dev, + link_info->target_link_speed, + link_info->target_link_width); + + if (ret) + return ret; + + cnss_pr_dbg("Setting link speed:0x%x, width:0x%x\n", + link_info->target_link_speed, + link_info->target_link_width); + return 0; +} + static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv) { int ret = 0; @@ -4313,6 +4336,7 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv) mhi_ctrl->status_cb = cnss_mhi_notify_status; mhi_ctrl->runtime_get = cnss_mhi_pm_runtime_get; mhi_ctrl->runtime_put = cnss_mhi_pm_runtime_put_noidle; + mhi_ctrl->bw_scale = cnss_mhi_bw_scale; mhi_ctrl->rddm_size = pci_priv->plat_priv->ramdump_info_v2.ramdump_size; mhi_ctrl->sbl_size = SZ_512K; From fd13c5203a0c73706f7d3160f1a28f2253c91254 Mon Sep 17 00:00:00 2001 From: Yue Ma Date: Tue, 12 May 2020 18:57:52 -0700 Subject: [PATCH 2/2] cnss2: Save PCIe GEN speed and width changed from device WLAN device may adjust GEN speed and width at run time so save them accordingly from driver. Change-Id: I4b20909425c4606b3ee5995946c97542b9849a54 Signed-off-by: Yue Ma --- drivers/net/wireless/cnss2/pci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/wireless/cnss2/pci.c b/drivers/net/wireless/cnss2/pci.c index 1ace9db7c33c..040a1b5aae5d 100644 --- a/drivers/net/wireless/cnss2/pci.c +++ b/drivers/net/wireless/cnss2/pci.c @@ -4282,9 +4282,13 @@ static int cnss_mhi_bw_scale(struct mhi_controller *mhi_ctrl, if (ret) return ret; + pci_priv->def_link_speed = link_info->target_link_speed; + pci_priv->def_link_width = link_info->target_link_width; + cnss_pr_dbg("Setting link speed:0x%x, width:0x%x\n", link_info->target_link_speed, link_info->target_link_width); + return 0; }