From 83c782245516e00c6963bab97db33b055cd6367f Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 1 Dec 2020 12:05:39 +0530 Subject: [PATCH] ARM: dts: msm: Add Power management nodes for SDMSHRIKE This change adds two items for power management. 1. Add PDC interrupt controller device. The interrupt map remains same as sm8150. Also mention PDC as wakeup parent for TLMM. 2. Include power management for sm8150 for APSS low power modes and various stats drivers. Change-Id: I3473f86bbaa3c289199d3ca88d0c31be5712f145 --- qcom/sdmshrike-pinctrl.dtsi | 11 ++++++++++- qcom/sdmshrike.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/qcom/sdmshrike-pinctrl.dtsi b/qcom/sdmshrike-pinctrl.dtsi index e4af602e1c7a..c5e4ae02bc2f 100644 --- a/qcom/sdmshrike-pinctrl.dtsi +++ b/qcom/sdmshrike-pinctrl.dtsi @@ -3,11 +3,20 @@ compatible = "qcom,sdmshrike-pinctrl"; reg = <0x03000000 0xddc000>, <0x17c000f0 0x60>; reg-names = "pinctrl", "spi_cfg"; - interrupts =; + interrupts = , + , + , + , + , + , + , + , + ; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + wakeup-parent = <&pdc>; ufs_dev_reset_assert: ufs_dev_reset_assert { config { diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi index 57ced1af6751..41fde14e63a1 100644 --- a/qcom/sdmshrike.dtsi +++ b/qcom/sdmshrike.dtsi @@ -500,6 +500,15 @@ interrupt-parent = <&intc>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sm8150-pdc"; + reg = <0xb220000 0x30000>, <0x17c000f0 0x64>; + qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 1 0xf08>, @@ -674,3 +683,4 @@ #include "sdmshrike-pinctrl.dtsi" #include "sa8195-regulator.dtsi" +#include "sm8150-pm.dtsi"