From 84373dc0398b6e31fb31fe8a3c574d3ab19ee84a Mon Sep 17 00:00:00 2001 From: Tony Lijo Jose Date: Thu, 24 Jun 2021 12:26:59 +0530 Subject: [PATCH] msm: camera: csiphy: Publish rx clock to other subnodes Currently we are publishing csiphy timer clock to other submodules who needs to maintain the clock ratio between the submodules. This change changes it publish the phy_rx clock as the phy clock rate. CRs-Fixed: 2975394 Change-Id: I7331d66ebdd1e6ded0d5ac7dd6f47b4c42c2b06f Signed-off-by: Tony Lijo Jose --- drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c b/drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c index f6040e720a69..e54335e97996 100644 --- a/drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c +++ b/drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c @@ -205,7 +205,7 @@ int32_t cam_csiphy_enable_hw(struct csiphy_device *csiphy_dev, int32_t index) rc = cam_soc_util_set_src_clk_rate(soc_info, soc_info->clk_rate[0][soc_info->src_clk_idx]); clk_rate = cam_soc_util_get_clk_rate_applied(soc_info, - soc_info->src_clk_idx, true, vote_level); + csiphy_dev->rx_clk_src_idx, true, vote_level); cam_subdev_notify_message(CAM_TFE_DEVICE_TYPE, CAM_SUBDEV_MESSAGE_CLOCK_UPDATE, clk_rate);