mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (35 commits) Blackfin Serial Driver: Fix bug - Only insert UART rx char in timer task. Blackfin Serial Driver: Fix bug - update tx dma buffer tail before wake up processes. Blackfin Serial Driver: Fix bug - Increase buffer tail immediately before starting tx dma. [Blackfin] serial driver: Add flow control support to bf54x [Blackfin] serial driver: Fix bug Poll RTS/CTS status in DMA mode as well [Blackfin] serial driver: ADSP-BF52x arch/mach support [Blackfin] serial driver: use simpler comment headers and strip out information that is maintained in the scm's log [Blackfin] serial driver: rework break flood anomaly handling to be more robust/realistic about what we can actually work around [Blackfin] serial driver: fix bug - cache the bits of the LSR on systems where the LSR is read-to-clear [Blackfin] serial driver: fix bug - should not wait for the TFI bit, just clear it when tx stop. [Blackfin] serial driver: Fix bug serial driver in DMA mode spams history to console on shell restart [Blackfin] serial driver: Fix bug Free rx dma buffer in shutdown. [Blackfin] serial driver: Clean up UART DMA code. Blackfin Serial driver: Fix bug - serial driver in PIO mode cant handle input very quickly [Blackfin] arch: kill section mismatch warnings [Blackfin] arch: handle the most common L1 shrinkage case (L1 does not exist for a part) so that any parts labeled for L1 instead get placed into external memory sections [Blackfin] arch: add bfin_clear_PPIx_STATUS() helper funcs like we have for other parts [Blackfin] arch: make sure we have proper description/copyright/license lines [Blackfin] arch: Fix CONFIG_PM support for BF561 [Blackfin] arch: Remove DPMC char driver option ...
This commit is contained in:
commit
84b9a77400
35 changed files with 504 additions and 560 deletions
|
|
@ -686,7 +686,7 @@ config UART0_RTS_PIN
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|||
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config SERIAL_BFIN_UART1
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bool "Enable UART1"
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depends on SERIAL_BFIN && (BF534 || BF536 || BF537 || BF54x)
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depends on SERIAL_BFIN && (!BF531 && !BF532 && !BF533 && !BF561)
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help
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Enable UART1
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@ -699,14 +699,14 @@ config BFIN_UART1_CTSRTS
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config UART1_CTS_PIN
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int "UART1 CTS pin"
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depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
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depends on BFIN_UART1_CTSRTS && !BF54x
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default -1
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help
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Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
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config UART1_RTS_PIN
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int "UART1 RTS pin"
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depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
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depends on BFIN_UART1_CTSRTS && !BF54x
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default -1
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help
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Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
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|
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@ -1,30 +1,11 @@
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/*
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* File: drivers/serial/bfin_5xx.c
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* Based on: Based on drivers/serial/sa1100.c
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* Author: Aubrey Li <aubrey.li@analog.com>
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* Blackfin On-Chip Serial Driver
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*
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* Created:
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* Description: Driver for blackfin 5xx serial ports
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* Copyright 2006-2007 Analog Devices Inc.
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*
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* Modified:
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* Copyright 2006 Analog Devices Inc.
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* Licensed under the GPL-2 or later.
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*/
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#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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@ -67,14 +48,12 @@
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#define DMA_RX_XCOUNT 512
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#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
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#define DMA_RX_FLUSH_JIFFIES 5
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#define DMA_RX_FLUSH_JIFFIES (HZ / 50)
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#ifdef CONFIG_SERIAL_BFIN_DMA
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static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
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#else
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static void bfin_serial_do_work(struct work_struct *work);
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static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
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static void local_put_char(struct bfin_serial_port *uart, char ch);
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#endif
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static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
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@ -85,23 +64,26 @@ static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
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static void bfin_serial_stop_tx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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struct circ_buf *xmit = &uart->port.info->xmit;
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#if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
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unsigned short ier;
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#endif
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|
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while (!(UART_GET_LSR(uart) & TEMT))
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continue;
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cpu_relax();
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||||
|
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#ifdef CONFIG_SERIAL_BFIN_DMA
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disable_dma(uart->tx_dma_channel);
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xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
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uart->port.icount.tx += uart->tx_count;
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uart->tx_count = 0;
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uart->tx_done = 1;
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#else
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#ifdef CONFIG_BF54x
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/* Waiting for Transmission Finished */
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while (!(UART_GET_LSR(uart) & TFI))
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continue;
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/* Clear TFI bit */
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UART_PUT_LSR(uart, TFI);
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UART_CLEAR_IER(uart, ETBEI);
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#else
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unsigned short ier;
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ier = UART_GET_IER(uart);
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ier &= ~ETBEI;
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UART_PUT_IER(uart, ier);
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||||
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|
@ -117,7 +99,8 @@ static void bfin_serial_start_tx(struct uart_port *port)
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
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bfin_serial_dma_tx_chars(uart);
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if (uart->tx_done)
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bfin_serial_dma_tx_chars(uart);
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#else
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#ifdef CONFIG_BF54x
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UART_SET_IER(uart, ETBEI);
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|
|
@ -209,34 +192,27 @@ int kgdb_get_debug_char(void)
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|||
}
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#endif
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||||
|
||||
#if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
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# define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
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# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
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#else
|
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# define UART_GET_ANOMALY_THRESHOLD(uart) 0
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# define UART_SET_ANOMALY_THRESHOLD(uart, v)
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#endif
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#ifdef CONFIG_SERIAL_BFIN_PIO
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static void local_put_char(struct bfin_serial_port *uart, char ch)
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{
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unsigned short status;
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int flags = 0;
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spin_lock_irqsave(&uart->port.lock, flags);
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|
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do {
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status = UART_GET_LSR(uart);
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} while (!(status & THRE));
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||||
|
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UART_PUT_CHAR(uart, ch);
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SSYNC();
|
||||
|
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spin_unlock_irqrestore(&uart->port.lock, flags);
|
||||
}
|
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|
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static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
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{
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struct tty_struct *tty = uart->port.info->tty;
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unsigned int status, ch, flg;
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static int in_break = 0;
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static struct timeval anomaly_start = { .tv_sec = 0 };
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#ifdef CONFIG_KGDB_UART
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struct pt_regs *regs = get_irq_regs();
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#endif
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|
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status = UART_GET_LSR(uart);
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UART_CLEAR_LSR(uart);
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ch = UART_GET_CHAR(uart);
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uart->port.icount.rx++;
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|
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@ -262,28 +238,56 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
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#endif
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if (ANOMALY_05000230) {
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/* The BF533 family of processors have a nice misbehavior where
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* they continuously generate characters for a "single" break.
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/* The BF533 (and BF561) family of processors have a nice anomaly
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* where they continuously generate characters for a "single" break.
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* We have to basically ignore this flood until the "next" valid
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* character comes across. All other Blackfin families operate
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* properly though.
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* character comes across. Due to the nature of the flood, it is
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* not possible to reliably catch bytes that are sent too quickly
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* after this break. So application code talking to the Blackfin
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* which sends a break signal must allow at least 1.5 character
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* times after the end of the break for things to stabilize. This
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* timeout was picked as it must absolutely be larger than 1
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* character time +/- some percent. So 1.5 sounds good. All other
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* Blackfin families operate properly. Woo.
|
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* Note: While Anomaly 05000230 does not directly address this,
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* the changes that went in for it also fixed this issue.
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* That anomaly was fixed in 0.5+ silicon. I like bunnies.
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*/
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if (in_break) {
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if (ch != 0) {
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in_break = 0;
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ch = UART_GET_CHAR(uart);
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if (bfin_revid() < 5)
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return;
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} else
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return;
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if (anomaly_start.tv_sec) {
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struct timeval curr;
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suseconds_t usecs;
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if ((~ch & (~ch + 1)) & 0xff)
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goto known_good_char;
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do_gettimeofday(&curr);
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if (curr.tv_sec - anomaly_start.tv_sec > 1)
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goto known_good_char;
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usecs = 0;
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if (curr.tv_sec != anomaly_start.tv_sec)
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usecs += USEC_PER_SEC;
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usecs += curr.tv_usec - anomaly_start.tv_usec;
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if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
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goto known_good_char;
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if (ch)
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anomaly_start.tv_sec = 0;
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else
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anomaly_start = curr;
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return;
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known_good_char:
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anomaly_start.tv_sec = 0;
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}
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}
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if (status & BI) {
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if (ANOMALY_05000230)
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in_break = 1;
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if (bfin_revid() < 5)
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do_gettimeofday(&anomaly_start);
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uart->port.icount.brk++;
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if (uart_handle_break(&uart->port))
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goto ignore_char;
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|
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@ -324,7 +328,6 @@ static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
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UART_PUT_CHAR(uart, uart->port.x_char);
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uart->port.icount.tx++;
|
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uart->port.x_char = 0;
|
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return;
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||||
}
|
||||
/*
|
||||
* Check the modem control lines before
|
||||
|
|
@ -337,9 +340,12 @@ static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
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|||
return;
|
||||
}
|
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|
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local_put_char(uart, xmit->buf[xmit->tail]);
|
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
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uart->port.icount.tx++;
|
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while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
|
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UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
uart->port.icount.tx++;
|
||||
SSYNC();
|
||||
}
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(&uart->port);
|
||||
|
|
@ -352,21 +358,11 @@ static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
|
|||
{
|
||||
struct bfin_serial_port *uart = dev_id;
|
||||
|
||||
#ifdef CONFIG_BF54x
|
||||
unsigned short status;
|
||||
spin_lock(&uart->port.lock);
|
||||
status = UART_GET_LSR(uart);
|
||||
while ((UART_GET_IER(uart) & ERBFI) && (status & DR)) {
|
||||
bfin_serial_rx_chars(uart);
|
||||
status = UART_GET_LSR(uart);
|
||||
}
|
||||
spin_unlock(&uart->port.lock);
|
||||
#else
|
||||
spin_lock(&uart->port.lock);
|
||||
while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
|
||||
while (UART_GET_LSR(uart) & DR)
|
||||
bfin_serial_rx_chars(uart);
|
||||
spin_unlock(&uart->port.lock);
|
||||
#endif
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
|
@ -374,25 +370,16 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
|
|||
{
|
||||
struct bfin_serial_port *uart = dev_id;
|
||||
|
||||
#ifdef CONFIG_BF54x
|
||||
unsigned short status;
|
||||
spin_lock(&uart->port.lock);
|
||||
status = UART_GET_LSR(uart);
|
||||
while ((UART_GET_IER(uart) & ETBEI) && (status & THRE)) {
|
||||
bfin_serial_tx_chars(uart);
|
||||
status = UART_GET_LSR(uart);
|
||||
}
|
||||
spin_unlock(&uart->port.lock);
|
||||
#else
|
||||
spin_lock(&uart->port.lock);
|
||||
while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
|
||||
if (UART_GET_LSR(uart) & THRE)
|
||||
bfin_serial_tx_chars(uart);
|
||||
spin_unlock(&uart->port.lock);
|
||||
#endif
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
static void bfin_serial_do_work(struct work_struct *work)
|
||||
{
|
||||
struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
|
||||
|
|
@ -406,33 +393,27 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
|
|||
{
|
||||
struct circ_buf *xmit = &uart->port.info->xmit;
|
||||
unsigned short ier;
|
||||
int flags = 0;
|
||||
|
||||
if (!uart->tx_done)
|
||||
return;
|
||||
|
||||
uart->tx_done = 0;
|
||||
|
||||
if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
|
||||
uart->tx_count = 0;
|
||||
uart->tx_done = 1;
|
||||
return;
|
||||
}
|
||||
|
||||
if (uart->port.x_char) {
|
||||
UART_PUT_CHAR(uart, uart->port.x_char);
|
||||
uart->port.icount.tx++;
|
||||
uart->port.x_char = 0;
|
||||
uart->tx_done = 1;
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check the modem control lines before
|
||||
* transmitting anything.
|
||||
*/
|
||||
bfin_serial_mctrl_check(uart);
|
||||
|
||||
if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
|
||||
bfin_serial_stop_tx(&uart->port);
|
||||
uart->tx_done = 1;
|
||||
return;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&uart->port.lock, flags);
|
||||
uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
|
||||
if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
|
||||
uart->tx_count = UART_XMIT_SIZE - xmit->tail;
|
||||
|
|
@ -448,6 +429,7 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
|
|||
set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
|
||||
set_dma_x_modify(uart->tx_dma_channel, 1);
|
||||
enable_dma(uart->tx_dma_channel);
|
||||
|
||||
#ifdef CONFIG_BF54x
|
||||
UART_SET_IER(uart, ETBEI);
|
||||
#else
|
||||
|
|
@ -455,7 +437,6 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
|
|||
ier |= ETBEI;
|
||||
UART_PUT_IER(uart, ier);
|
||||
#endif
|
||||
spin_unlock_irqrestore(&uart->port.lock, flags);
|
||||
}
|
||||
|
||||
static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
|
||||
|
|
@ -464,7 +445,11 @@ static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
|
|||
int i, flg, status;
|
||||
|
||||
status = UART_GET_LSR(uart);
|
||||
uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
|
||||
UART_CLEAR_LSR(uart);
|
||||
|
||||
uart->port.icount.rx +=
|
||||
CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
|
||||
UART_XMIT_SIZE);
|
||||
|
||||
if (status & BI) {
|
||||
uart->port.icount.brk++;
|
||||
|
|
@ -490,10 +475,12 @@ static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
|
|||
else
|
||||
flg = TTY_NORMAL;
|
||||
|
||||
for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
|
||||
if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
|
||||
goto dma_ignore_char;
|
||||
uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
|
||||
for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
|
||||
if (i >= UART_XMIT_SIZE)
|
||||
i = 0;
|
||||
if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
|
||||
uart_insert_char(&uart->port, status, OE,
|
||||
uart->rx_dma_buf.buf[i], flg);
|
||||
}
|
||||
|
||||
dma_ignore_char:
|
||||
|
|
@ -503,23 +490,23 @@ static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
|
|||
void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
|
||||
{
|
||||
int x_pos, pos;
|
||||
int flags = 0;
|
||||
|
||||
bfin_serial_dma_tx_chars(uart);
|
||||
|
||||
spin_lock_irqsave(&uart->port.lock, flags);
|
||||
x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
|
||||
uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
|
||||
x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
|
||||
uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
|
||||
if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
|
||||
uart->rx_dma_nrows = 0;
|
||||
x_pos = DMA_RX_XCOUNT - x_pos;
|
||||
if (x_pos == DMA_RX_XCOUNT)
|
||||
x_pos = 0;
|
||||
|
||||
pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
|
||||
|
||||
if (pos>uart->rx_dma_buf.tail) {
|
||||
uart->rx_dma_buf.tail = pos;
|
||||
if (pos != uart->rx_dma_buf.tail) {
|
||||
uart->rx_dma_buf.head = pos;
|
||||
bfin_serial_dma_rx_chars(uart);
|
||||
uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
|
||||
uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
|
||||
}
|
||||
spin_unlock_irqrestore(&uart->port.lock, flags);
|
||||
|
||||
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
|
||||
add_timer(&(uart->rx_dma_timer));
|
||||
}
|
||||
|
|
@ -532,8 +519,8 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
|
|||
|
||||
spin_lock(&uart->port.lock);
|
||||
if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
|
||||
clear_dma_irqstat(uart->tx_dma_channel);
|
||||
disable_dma(uart->tx_dma_channel);
|
||||
clear_dma_irqstat(uart->tx_dma_channel);
|
||||
#ifdef CONFIG_BF54x
|
||||
UART_CLEAR_IER(uart, ETBEI);
|
||||
#else
|
||||
|
|
@ -541,15 +528,13 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
|
|||
ier &= ~ETBEI;
|
||||
UART_PUT_IER(uart, ier);
|
||||
#endif
|
||||
xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
|
||||
uart->port.icount.tx+=uart->tx_count;
|
||||
xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
|
||||
uart->port.icount.tx += uart->tx_count;
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(&uart->port);
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
bfin_serial_stop_tx(&uart->port);
|
||||
uart->tx_done = 1;
|
||||
bfin_serial_dma_tx_chars(uart);
|
||||
}
|
||||
|
||||
spin_unlock(&uart->port.lock);
|
||||
|
|
@ -561,18 +546,15 @@ static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
|
|||
struct bfin_serial_port *uart = dev_id;
|
||||
unsigned short irqstat;
|
||||
|
||||
uart->rx_dma_nrows++;
|
||||
if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
|
||||
uart->rx_dma_nrows = 0;
|
||||
uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
|
||||
bfin_serial_dma_rx_chars(uart);
|
||||
uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
|
||||
}
|
||||
spin_lock(&uart->port.lock);
|
||||
irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
|
||||
clear_dma_irqstat(uart->rx_dma_channel);
|
||||
|
||||
spin_unlock(&uart->port.lock);
|
||||
|
||||
del_timer(&(uart->rx_dma_timer));
|
||||
uart->rx_dma_timer.expires = jiffies;
|
||||
add_timer(&(uart->rx_dma_timer));
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -599,7 +581,11 @@ static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
|
|||
if (uart->cts_pin < 0)
|
||||
return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
|
||||
|
||||
# ifdef BF54x
|
||||
if (UART_GET_MSR(uart) & CTS)
|
||||
# else
|
||||
if (gpio_get_value(uart->cts_pin))
|
||||
# endif
|
||||
return TIOCM_DSR | TIOCM_CAR;
|
||||
else
|
||||
#endif
|
||||
|
|
@ -614,9 +600,17 @@ static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|||
return;
|
||||
|
||||
if (mctrl & TIOCM_RTS)
|
||||
# ifdef BF54x
|
||||
UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
|
||||
# else
|
||||
gpio_set_value(uart->rts_pin, 0);
|
||||
# endif
|
||||
else
|
||||
# ifdef BF54x
|
||||
UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
|
||||
# else
|
||||
gpio_set_value(uart->rts_pin, 1);
|
||||
# endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -627,22 +621,17 @@ static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
|
|||
{
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
unsigned int status;
|
||||
# ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
struct uart_info *info = uart->port.info;
|
||||
struct tty_struct *tty = info->tty;
|
||||
|
||||
status = bfin_serial_get_mctrl(&uart->port);
|
||||
uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
|
||||
if (!(status & TIOCM_CTS)) {
|
||||
tty->hw_stopped = 1;
|
||||
schedule_work(&uart->cts_workqueue);
|
||||
} else {
|
||||
tty->hw_stopped = 0;
|
||||
}
|
||||
# else
|
||||
status = bfin_serial_get_mctrl(&uart->port);
|
||||
uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
|
||||
if (!(status & TIOCM_CTS))
|
||||
schedule_work(&uart->cts_workqueue);
|
||||
# endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -743,6 +732,7 @@ static void bfin_serial_shutdown(struct uart_port *port)
|
|||
disable_dma(uart->rx_dma_channel);
|
||||
free_dma(uart->rx_dma_channel);
|
||||
del_timer(&(uart->rx_dma_timer));
|
||||
dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
|
||||
#else
|
||||
#ifdef CONFIG_KGDB_UART
|
||||
if (uart->port.line != CONFIG_KGDB_UART_PORT)
|
||||
|
|
@ -814,6 +804,8 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
quot = uart_get_divisor(port, baud);
|
||||
spin_lock_irqsave(&uart->port.lock, flags);
|
||||
|
||||
UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
|
||||
|
||||
do {
|
||||
lsr = UART_GET_LSR(uart);
|
||||
} while (!(lsr & TEMT));
|
||||
|
|
@ -956,10 +948,9 @@ static void __init bfin_serial_init_ports(void)
|
|||
bfin_serial_ports[i].rx_dma_channel =
|
||||
bfin_serial_resource[i].uart_rx_dma_channel;
|
||||
init_timer(&(bfin_serial_ports[i].rx_dma_timer));
|
||||
#else
|
||||
INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
|
||||
bfin_serial_ports[i].cts_pin =
|
||||
bfin_serial_resource[i].uart_cts_pin;
|
||||
bfin_serial_ports[i].rts_pin =
|
||||
|
|
|
|||
Loading…
Reference in a new issue