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MIPS changes for 4.16
These are the main MIPS changes for 4.16. Rough overview:
- Basic support for the Ingenic JZ4770 based GCW Zero open-source
handheld video game console
- Support for the Ranchu board (used by Android emulator)
- Various cleanups and misc improvements
Fixes:
- Fix generic platform's USB_*HCI_BIG_ENDIAN selects (4.9)
- Fix vmlinuz default build when ZBOOT selected
- Fix clean up of vmlinuz targets
- Fix command line duplication (in preparation for Ingenic JZ4770)
Miscellaneous:
- Allow Processor ID reads to be to be optimised away by the compiler
(improves performance when running in guest)
- Push ARCH_MIGHT_HAVE_PC_SERIO/PARPORT down to platform level to
disable on generic platform with Ranchu board support
- Add helpers for assembler macro instructions for older assemblers
- Use assembler macro instructions to support VZ, XPA & MSA operations
on older assemblers, removing C wrapper duplication
- Various improvements to VZ & XPA assembly wrappers
- Add drivers/platform/mips/ to MIPS MAINTAINERS entry
Minor cleanups:
- Misc FPU emulation cleanups (removal of unnecessary include, moving
macros to common header, checkpatch and sparse fixes)
- Remove duplicate assignment of core in play_dead()
- Remove duplication in watchpoint handling
- Remove mips_dma_mapping_error() stub
- Use NULL instead of 0 in prepare_ftrace_return()
- Use proper kernel-doc Return keyword for
__compute_return_epc_for_insn()
- Remove duplicate semicolon in csum_fold()
Platform support:
Broadcom:
- Enable ZBOOT on BCM47xx
Generic platform:
- Add Ranchu board support, used by Android emulator
- Fix machine compatible string matching for Ranchu
- Support GIC in EIC mode
Ingenic platforms:
- Add DT, defconfig and other support for JZ4770 SoC and GCW Zero
- Support dynamnic machine types (i.e. JZ4740 / JZ4770 / JZ4780)
- Add Ingenic JZ4770 CGU clocks
- General Ingenic clk changes to prepare for JZ4770 SoC support
- Use common command line handling code
- Add DT vendor prefix to GCW (Game Consoles Worldwide)
Loongson:
- Add MAINTAINERS entry for Loongson2 and Loongson3 platforms
- Drop 32-bit support for Loongson 2E/2F devices
- Fix build failures due to multiple use of "MEM_RESERVED"
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Merge tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips
Pull MIPS updates from James Hogan:
"These are the main MIPS changes for 4.16.
Rough overview:
(1) Basic support for the Ingenic JZ4770 based GCW Zero open-source
handheld video game console
(2) Support for the Ranchu board (used by Android emulator)
(3) Various cleanups and misc improvements
More detailed summary:
Fixes:
- Fix generic platform's USB_*HCI_BIG_ENDIAN selects (4.9)
- Fix vmlinuz default build when ZBOOT selected
- Fix clean up of vmlinuz targets
- Fix command line duplication (in preparation for Ingenic JZ4770)
Miscellaneous:
- Allow Processor ID reads to be to be optimised away by the compiler
(improves performance when running in guest)
- Push ARCH_MIGHT_HAVE_PC_SERIO/PARPORT down to platform level to
disable on generic platform with Ranchu board support
- Add helpers for assembler macro instructions for older assemblers
- Use assembler macro instructions to support VZ, XPA & MSA
operations on older assemblers, removing C wrapper duplication
- Various improvements to VZ & XPA assembly wrappers
- Add drivers/platform/mips/ to MIPS MAINTAINERS entry
Minor cleanups:
- Misc FPU emulation cleanups (removal of unnecessary include, moving
macros to common header, checkpatch and sparse fixes)
- Remove duplicate assignment of core in play_dead()
- Remove duplication in watchpoint handling
- Remove mips_dma_mapping_error() stub
- Use NULL instead of 0 in prepare_ftrace_return()
- Use proper kernel-doc Return keyword for
__compute_return_epc_for_insn()
- Remove duplicate semicolon in csum_fold()
Platform support:
Broadcom:
- Enable ZBOOT on BCM47xx
Generic platform:
- Add Ranchu board support, used by Android emulator
- Fix machine compatible string matching for Ranchu
- Support GIC in EIC mode
Ingenic platforms:
- Add DT, defconfig and other support for JZ4770 SoC and GCW Zero
- Support dynamnic machine types (i.e. JZ4740 / JZ4770 / JZ4780)
- Add Ingenic JZ4770 CGU clocks
- General Ingenic clk changes to prepare for JZ4770 SoC support
- Use common command line handling code
- Add DT vendor prefix to GCW (Game Consoles Worldwide)
Loongson:
- Add MAINTAINERS entry for Loongson2 and Loongson3 platforms
- Drop 32-bit support for Loongson 2E/2F devices
- Fix build failures due to multiple use of 'MEM_RESERVED'"
* tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (53 commits)
MIPS: Malta: Sanitize mouse and keyboard configuration.
MIPS: Update defconfigs after previous patch.
MIPS: Push ARCH_MIGHT_HAVE_PC_SERIO down to platform level
MIPS: Push ARCH_MIGHT_HAVE_PC_PARPORT down to platform level
MIPS: SMP-CPS: Remove duplicate assignment of core in play_dead
MIPS: Generic: Support GIC in EIC mode
MIPS: generic: Fix Makefile alignment
MIPS: generic: Fix ranchu_of_match[] termination
MIPS: generic: Fix machine compatible matching
MIPS: Loongson fix name confict - MEM_RESERVED
MIPS: bcm47xx: enable ZBOOT support
MIPS: Fix trailing semicolon
MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers
MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.
MIPS: MSA: Update helpers to use new asm macros
MIPS: XPA: Standardise readx/writex accessors
MIPS: XPA: Allow use of $0 (zero) to MTHC0
MIPS: XPA: Use XPA instructions in assembly
MIPS: VZ: Pass GC0 register names in $n format
MIPS: VZ: Update helpers to use new asm macros
...
This commit is contained in:
Linus Torvalds
commit
8578953687
77 changed files with 1649 additions and 553 deletions
58
include/dt-bindings/clock/jz4770-cgu.h
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58
include/dt-bindings/clock/jz4770-cgu.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides clock numbers for the ingenic,jz4770-cgu DT binding.
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*/
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#ifndef __DT_BINDINGS_CLOCK_JZ4770_CGU_H__
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#define __DT_BINDINGS_CLOCK_JZ4770_CGU_H__
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#define JZ4770_CLK_EXT 0
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#define JZ4770_CLK_OSC32K 1
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#define JZ4770_CLK_PLL0 2
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#define JZ4770_CLK_PLL1 3
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#define JZ4770_CLK_CCLK 4
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#define JZ4770_CLK_H0CLK 5
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#define JZ4770_CLK_H1CLK 6
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#define JZ4770_CLK_H2CLK 7
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#define JZ4770_CLK_C1CLK 8
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#define JZ4770_CLK_PCLK 9
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#define JZ4770_CLK_MMC0_MUX 10
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#define JZ4770_CLK_MMC0 11
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#define JZ4770_CLK_MMC1_MUX 12
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#define JZ4770_CLK_MMC1 13
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#define JZ4770_CLK_MMC2_MUX 14
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#define JZ4770_CLK_MMC2 15
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#define JZ4770_CLK_CIM 16
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#define JZ4770_CLK_UHC 17
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#define JZ4770_CLK_GPU 18
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#define JZ4770_CLK_BCH 19
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#define JZ4770_CLK_LPCLK_MUX 20
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#define JZ4770_CLK_GPS 21
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#define JZ4770_CLK_SSI_MUX 22
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#define JZ4770_CLK_PCM_MUX 23
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#define JZ4770_CLK_I2S 24
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#define JZ4770_CLK_OTG 25
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#define JZ4770_CLK_SSI0 26
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#define JZ4770_CLK_SSI1 27
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#define JZ4770_CLK_SSI2 28
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#define JZ4770_CLK_PCM0 29
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#define JZ4770_CLK_PCM1 30
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#define JZ4770_CLK_DMA 31
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#define JZ4770_CLK_I2C0 32
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#define JZ4770_CLK_I2C1 33
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#define JZ4770_CLK_I2C2 34
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#define JZ4770_CLK_UART0 35
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#define JZ4770_CLK_UART1 36
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#define JZ4770_CLK_UART2 37
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#define JZ4770_CLK_UART3 38
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#define JZ4770_CLK_IPU 39
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#define JZ4770_CLK_ADC 40
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#define JZ4770_CLK_AIC 41
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#define JZ4770_CLK_AUX 42
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#define JZ4770_CLK_VPU 43
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#define JZ4770_CLK_UHC_PHY 44
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#define JZ4770_CLK_OTG_PHY 45
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#define JZ4770_CLK_EXT512 46
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#define JZ4770_CLK_RTC 47
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#endif /* __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ */
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