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arm/arm64: KVM: Add PSCI version selection API
Although we've implemented PSCI 0.1, 0.2 and 1.0, we expose either 0.1 or 1.0 to a guest, defaulting to the latest version of the PSCI implementation that is compatible with the requested version. This is no different from doing a firmware upgrade on KVM. But in order to give a chance to hypothetical badly implemented guests that would have a fit by discovering something other than PSCI 0.2, let's provide a new API that allows userspace to pick one particular version of the API. This is implemented as a new class of "firmware" registers, where we expose the PSCI version. This allows the PSCI version to be save/restored as part of a guest migration, and also set to any supported version if the guest requires it. Cc: [email protected] #4.16 Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
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10 changed files with 156 additions and 4 deletions
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@ -1960,6 +1960,9 @@ ARM 32-bit VFP control registers have the following id bit patterns:
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ARM 64-bit FP registers have the following id bit patterns:
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0x4030 0000 0012 0 <regno:12>
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ARM firmware pseudo-registers have the following bit pattern:
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0x4030 0000 0014 <regno:16>
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arm64 registers are mapped using the lower 32 bits. The upper 16 of
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that is the register group type, or coprocessor number:
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@ -1976,6 +1979,9 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value:
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arm64 system registers have the following id bit patterns:
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0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>
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arm64 firmware pseudo-registers have the following bit pattern:
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0x6030 0000 0014 <regno:16>
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MIPS registers are mapped using the lower 32 bits. The upper 16 of that is
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the register group type:
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@ -2510,7 +2516,8 @@ Possible features:
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and execute guest code when KVM_RUN is called.
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- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.
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Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).
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- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.
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- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision
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backward compatible with v0.2) for the CPU.
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Depends on KVM_CAP_ARM_PSCI_0_2.
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- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.
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Depends on KVM_CAP_ARM_PMU_V3.
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30
Documentation/virtual/kvm/arm/psci.txt
Normal file
30
Documentation/virtual/kvm/arm/psci.txt
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@ -0,0 +1,30 @@
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KVM implements the PSCI (Power State Coordination Interface)
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specification in order to provide services such as CPU on/off, reset
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and power-off to the guest.
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The PSCI specification is regularly updated to provide new features,
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and KVM implements these updates if they make sense from a virtualization
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point of view.
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This means that a guest booted on two different versions of KVM can
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observe two different "firmware" revisions. This could cause issues if
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a given guest is tied to a particular PSCI revision (unlikely), or if
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a migration causes a different PSCI version to be exposed out of the
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blue to an unsuspecting guest.
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In order to remedy this situation, KVM exposes a set of "firmware
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pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
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interface. These registers can be saved/restored by userspace, and set
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to a convenient value if required.
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The following register is defined:
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* KVM_REG_ARM_PSCI_VERSION:
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- Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
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(and thus has already been initialized)
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- Returns the current PSCI version on GET_ONE_REG (defaulting to the
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highest PSCI version implemented by KVM and compatible with v0.2)
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- Allows any PSCI version implemented by KVM and compatible with
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v0.2 to be set with SET_ONE_REG
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- Affects the whole VM (even if the register view is per-vcpu)
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