From 8616e29d2cea03b9e694367c109dea36e43a3316 Mon Sep 17 00:00:00 2001 From: Santosh Mardi Date: Sat, 17 Oct 2020 12:10:43 +0530 Subject: [PATCH] drivers: soc: qcom: fix incorrect updation of pmu cache flag in CPU_PM_EXIT rimps_memlat driver will cache PMU counter values when cpu is going down in hotplug path and also when CPU is entering lpm. Once the PMU counter values are saved to the shared memory, cache valid bit is set, and it is cleared when cpu comes back online or exit from lpm. RIMPS expects the PMU cache flag to be valid, when cpu is offline or entered lpm. Observed a race when the hotplug is in progress and that particular cpu can enter and exit lpm. The current implementation clears the cache flag during lpm exit without checking the cpu hotplug status. Once hotplug is complete, core goes offline and the status flag will remain in incorrect state indicating cache area is invalid, which will cause RIMPS to read PMU counter values directly from hardware which will result in APB read errors. When hotplug is in progress, do not set status flag to PMU_CACHE_INVALID in CPU_PM_EXIT path. Change-Id: I17947ad93eeef99b2148e873dc719622aa372b7c Signed-off-by: Santosh Mardi --- drivers/soc/qcom/rimps_memlat.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/soc/qcom/rimps_memlat.c b/drivers/soc/qcom/rimps_memlat.c index 5b4802da3d90..7e22b37fcfe3 100644 --- a/drivers/soc/qcom/rimps_memlat.c +++ b/drivers/soc/qcom/rimps_memlat.c @@ -824,7 +824,8 @@ static int memlat_idle_notif(struct notifier_block *nb, case CPU_PM_EXIT: case CPU_PM_ENTER_FAILED: __this_cpu_write(cpu_is_idle, false); - set_pmu_cache_flag(PMU_CACHE_INVALID, cpu); + if (!per_cpu(cpu_is_hp, cpu)) + set_pmu_cache_flag(PMU_CACHE_INVALID, cpu); break; } idle_exit: