Merge branch 'staging/kernel-msm/MMI-U1UGS34.23-110-23-2' into lineage-22.2

Based on tag 'MMI-U1UGS34.23-110-23-2' of https://github.com/MotorolaMobilityLLC/kernel-msm

"Fogos push for Android 14"

* staging/kernel-msm/MMI-U1UGS34.23-110-23-2: (698 commits)
  mmc: sdhci-msm: Move MMC_CAP2_MAX_DISCARD_SIZE to prevent merge conflict
  Reapply "UPSTREAM: binder: fix the missing BR_FROZEN_REPLY in binder_return_strings"
  Revert "qseecom: Suppress suspend warning if without bus scaling."
  Revert "Penang: fix for device suspend tests fail. [1/2]"
  Revert "Penang: resolve kasan panic"
  Revert "Penang: kasan panic"
  Revert "penang: device suspend tests fail"
  Revert "net: qrtr: get svc_id before queueing sk_buff"
  Revert "af_unix: Do not use atomic ops for unix_sk(sk)->inflight."
  Revert "af_unix: Fix garbage collector racing against connect()"
  Revert "BACKPORT: net: fix __dst_negative_advice() race"
  Revert "ANDROID: ABI fixup for abi break in struct dst_ops"
  Revert "BACKPORT:sched: Provide sched_set_fifo()"
  Revert "msm: npu: Fix use after free issue"
  Revert "fs:EROFS:Porting 5.10 erofs to 5.4"
  Revert "BACKPORT:erofs: add per-cpu threads for decompression as an option"
  Revert "UPSTREAM: erofs: fix an error code in z_erofs_init_zip_subsystem()"
  msm: adsprpc: Avoid taking reference for group_info
  adsprpc: Handle UAF scenario in put_args
  msm: adsprpc: use-after-free (UAF) in global maps
  ...

Change-Id: Ia48438f247670d77560472205994632fa62062dd

drivers/soc/qcom/Kconfig

@@ -4,6 +4,176 @@
 #
 menu "Qualcomm SoC drivers"
 
+config MMI_DEVICE_DTBS
+	depends on ARCH_QCOM
+	default n
+	bool "Motorola Mobility Device DTBs"
+	help
+		Only include Motorola device specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config DENVER_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "DENVER DTBs"
+	help
+		Only include DENVER specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config IBIZA_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "IBIZA DTBs"
+	help
+		Only include IBIZA specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config CORFUP_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "CORFUP DTBs"
+	help
+		Only include CORFUP specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config CORFUQ_DTB
+    depends on ARCH_QCOM
+    default n
+    bool "CORFUQ DTBs"
+    help
+        Only include CORFUQ specific DTBs to limit the number that
+        get built during kernel compilation.
+
+config CORFUR_DTB
+    depends on ARCH_QCOM
+    default n
+    bool "CORFUR DTBs"
+    help
+        Only include CORFUR specific DTBs to limit the number that
+        get built during kernel compilation.
+
+config CYPFG_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "CYPFG DTBs"
+	help
+		Only include CYPFG specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config CYPFQ_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "CYPFQ DTBs"
+	help
+		Only include CYPFQ specific DTBs to limit the number that
+		get built during kernel compilation.
+
+
+config RHODEC_DTB
+        depends on ARCH_QCOM
+        default n
+        bool "RHODEC DTBs"
+        help
+                Only include RHODEC specific DTBs to limit the number that
+                get built during kernel compilation.
+
+
+config CYPFR_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "CYPFR DTBs"
+	help
+		Only include CYPFR specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config MILANF_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "MILANF DTBs"
+	help
+		Only include MILANF specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config PENANG_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "PENANG DTBs"
+	help
+		Only include PENANG specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config PNANGN_DTB
+	depends on ARCH_QCOM
+	default n
+	bool "PNANGN DTBs"
+	help
+		Only include PNANGN specific DTBs to limit the number that
+		get built during kernel compilation.
+
+config BANGKK_DTB
+        depends on ARCH_QCOM
+        default n
+        bool "BANGKK DTBs"
+        help
+                Only include PENANG specific DTBs to limit the number that
+                get built during kernel compilation.
+
+config FOGOR_DTB
+        depends on ARCH_QCOM
+        default n
+        bool "FOGOR DTBs"
+        help
+                Only include FOGOR specific DTBs to limit the number that
+                get built during kernel compilation.
+
+config FOGOS_DTB
+        depends on ARCH_QCOM
+        default n
+        bool "FOGOS DTBs"
+        help
+                Only include FOGOS specific DTBs to limit the number that 
+                get built during kernel compilation.
+
+config FOGO_DTB
+        depends on ARCH_QCOM
+        default n
+        bool "FOGO DTBs"
+        help
+                Only include FOGO specific DTBs to limit the number that
+                get built during kernel compilation.
+
+config PENANGB_DTB
+        depends on ARCH_QCOM
+        default n
+        bool "PENANGB DTBs"
+        help
+                Only include PENANG specific DTBs to limit the number that
+                get built during kernel compilation.
+
+config RHODEP_DTB
+    depends on ARCH_QCOM
+    default n
+    bool "RHODEP DTBs"
+    help
+        Only include RHODEP specific DTBs to limit the number that
+        get built during kernel compilation.
+
+config MIAMI_DTB
+    depends on ARCH_QCOM
+    default n
+    bool "MIAMI DTBs"
+    help
+        Only include MIAMI specific DTBs to limit the number that
+        get built during kernel compilation.
+
+config RHODEI_DTB
+    depends on ARCH_QCOM
+    default n
+    bool "RHODEI DTBs"
+    help
+        Only include RHODEI specific DTBs to limit the number that
+        get built during kernel compilation.
+
 config QCOM_AOSS_QMP
 	tristate "Qualcomm AOSS Driver"
 	depends on ARCH_QCOM || COMPILE_TEST
@@ -1323,6 +1493,15 @@ config MSM_SLATECOM_INTERFACE
 		from hardware. Hardware will provide access to read
 		registers and read/write AHB memory in the device.
 
+config MSM_SLATECOM_RPMSG
+	tristate "Provide support for slate GLINK channel"
+	depends on MSM_SLATECOM_INTERFACE
+	help
+	  MSM_SLATECOM_RPMSG informs SLATECOM_INTERFACE driver if GLINK channel
+	  has been opened by remote processor. It doesn't maintain state machine
+	  and is probed when Slate opens channel and removed when the channel is
+	  closed by remote processor.
+
 config QCOM_AOP_SET_DDR
 	tristate "Sysfs to communicate with AOP using QMP protocol"
 	help

drivers/soc/qcom/Makefile

@@ -119,6 +119,7 @@ obj-$(CONFIG_RENAME_BLOCK_DEVICE) += rename_block_device.o
 obj-$(CONFIG_QCOM_ADSP_MANUAL_VOTE) += adsp_vote_qmi.o adsp_lpm_voting_v01.o
 obj-$(CONFIG_MSM_SLATECOM) += slatecom_spi.o
 obj-$(CONFIG_MSM_SLATECOM_INTERFACE) += slatecom_interface.o
+obj-$(CONFIG_MSM_SLATECOM_RPMSG) += slatecom_rpmsg.o
 obj-$(CONFIG_QCOM_AOP_SET_DDR) += aop-set-ddr.o
 obj-$(CONFIG_CPU_V7) += idle-v7.o
 obj-$(CONFIG_DUMP_XBL_LOG) += dump_boot_log.o

drivers/soc/qcom/fsa4480-i2c.c

@@ -67,6 +67,8 @@ static const struct fsa4480_reg_val fsa_reg_i2c_defaults[] = {
 	{FSA4480_SWITCH_SETTINGS, 0x98},
 };
 
+static bool fsa_reg_notifier;
+
 static void fsa4480_usbc_update_settings(struct fsa4480_priv *fsa_priv,
 		u32 switch_control, u32 switch_enable)
 {
@@ -103,7 +105,7 @@ static int fsa4480_usbc_event_changed_psupply(struct fsa4480_priv *fsa_priv,
 	dev = fsa_priv->dev;
 	if (!dev)
 		return -EINVAL;
-	dev_dbg(dev, "%s: queueing usbc_analog_work\n",
+	dev_info(dev, "%s: queueing usbc_analog_work\n",
 		__func__);
 	pm_stay_awake(fsa_priv->dev);
 	queue_work(system_freezable_wq, &fsa_priv->usbc_analog_work);
@@ -190,9 +192,14 @@ static int fsa4480_usbc_analog_setup_switches_psupply(
 		goto done;
 	}
 
-	dev_dbg(dev, "%s: setting GPIOs active = %d rcvd intval 0x%X\n",
+	dev_info(dev, "%s: setting GPIOs active = %d rcvd intval 0x%X\n",
 		__func__, mode.intval != TYPEC_ACCESSORY_NONE, mode.intval);
-	atomic_set(&(fsa_priv->usbc_mode), mode.intval);
+	if ((atomic_read(&(fsa_priv->usbc_mode)) != mode.intval) || fsa_reg_notifier) {
+		atomic_set(&(fsa_priv->usbc_mode), mode.intval);
+		fsa_reg_notifier = false;
+	} else {
+		goto done;
+	}
 
 	switch (mode.intval) {
 	/* add all modes FSA should notify for in here */
@@ -308,8 +315,9 @@ int fsa4480_reg_notifier(struct notifier_block *nb,
 	 * as part of the init sequence check if there is a connected
 	 * USB C analog adapter
 	 */
-	dev_dbg(fsa_priv->dev, "%s: verify if USB adapter is already inserted\n",
+	dev_info(fsa_priv->dev, "%s: verify if USB adapter is already inserted\n",
 		__func__);
+	fsa_reg_notifier = true;
 	rc = fsa4480_usbc_analog_setup_switches(fsa_priv);
 	regmap_update_bits(fsa_priv->regmap, FSA4480_SWITCH_CONTROL, 0x07,
 			   fsa_priv->switch_control);
@@ -494,10 +502,10 @@ static int fsa4480_probe(struct i2c_client *i2c,
 			goto err_data;
 		}
 
-		fsa_priv->iio_ch = iio_channel_get(fsa_priv->dev, "typec_mode");
+		fsa_priv->iio_ch = iio_channel_get(fsa_priv->dev, "typec_accessory_mode");
 		if (!fsa_priv->iio_ch) {
 			dev_err(fsa_priv->dev,
-				"%s: iio_channel_get failed for typec_mode\n",
+				"%s: iio_channel_get failed for typec_accessory_mode\n",
 				__func__);
 			goto err_supply;
 		}

drivers/soc/qcom/service-locator.c

@@ -25,7 +25,7 @@
 #define QMI_SERVREG_LOC_SERVER_INITIAL_TIMEOUT		2000
 #define QMI_SERVREG_LOC_SERVER_TIMEOUT			2000
 #define INITIAL_TIMEOUT					100000
-#define LOCATOR_SERVICE_TIMEOUT				300000
+#define LOCATOR_SERVICE_TIMEOUT				900000
 
 #define LOCATOR_NOT_PRESENT	0
 #define LOCATOR_PRESENT		1

drivers/soc/qcom/slatecom_interface.c

@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #define pr_fmt(msg) "slatecom_dev:" msg
 
@@ -31,7 +32,7 @@
 
 #include "peripheral-loader.h"
 #include "../../misc/qseecom_kernel.h"
-//#include "pil_slate_intf.h"
+#include "slatecom_rpmsg.h"
 
 #define SLATECOM "slate_com_dev"
 
@@ -44,6 +45,7 @@
 #define MPPS_DOWN_EVENT_TO_SLATE_TIMEOUT 3000
 #define ADSP_DOWN_EVENT_TO_SLATE_TIMEOUT 3000
 #define MAX_APP_NAME_SIZE 100
+#define SCOM_GLINK_INTENT_SIZE 308
 
 /*pil_slate_intf.h*/
 #define RESULT_SUCCESS 0
@@ -95,7 +97,14 @@ struct slatedaemon_priv {
 	unsigned long attrs;
 	u32 cmd_status;
 	struct device *platform_dev;
+	bool slatecom_rpmsg;
+	bool slate_resp_cmplt;
+	void *lhndl;
+	wait_queue_head_t link_state_wait;
+	char rx_buf[SCOM_GLINK_INTENT_SIZE];
+	struct mutex glink_mutex;
 };
+static void *slatecom_intf_drv;
 
 struct slate_event {
 	enum slate_event_type e_type;
@@ -182,6 +191,108 @@ static int send_uevent(struct slate_event *pce)
 	return kobject_uevent_env(&dev_ret->kobj, KOBJ_CHANGE, envp);
 }
 
+void slatecom_intf_notify_glink_channel_state(bool state)
+{
+	struct slatedaemon_priv *dev =
+		container_of(slatecom_intf_drv, struct slatedaemon_priv, lhndl);
+
+	pr_debug("%s: slate_ctrl channel state: %d\n", __func__, state);
+	dev->slatecom_rpmsg = state;
+}
+EXPORT_SYMBOL(slatecom_intf_notify_glink_channel_state);
+
+void slatecom_rx_msg(void *data, int len)
+{
+	struct slatedaemon_priv *dev =
+		container_of(slatecom_intf_drv, struct slatedaemon_priv, lhndl);
+
+	if (len > SCOM_GLINK_INTENT_SIZE) {
+		pr_err("Invalid slatecom_intf glink intent size\n");
+		return;
+	}
+	dev->slate_resp_cmplt = true;
+	wake_up(&dev->link_state_wait);
+	memcpy(dev->rx_buf, data, len);
+}
+EXPORT_SYMBOL(slatecom_rx_msg);
+
+static int slatecom_tx_msg(struct slatedaemon_priv *dev, void  *msg, size_t len)
+{
+	int rc = 0;
+	uint8_t resp = 0;
+
+	mutex_lock(&dev->glink_mutex);
+	if (!dev->slatecom_rpmsg) {
+		pr_err("slatecom-rpmsg is not probed yet, waiting for it to be probed\n");
+		goto err_ret;
+	}
+	rc = slatecom_rpmsg_tx_msg(msg, len);
+
+	/* wait for sending command to SLATE */
+	rc = wait_event_timeout(dev->link_state_wait,
+			(rc == 0), msecs_to_jiffies(TIMEOUT_MS));
+	if (rc == 0) {
+		pr_err("failed to send command to SLATE %d\n", rc);
+		goto err_ret;
+	}
+
+	/* wait for getting response from SLATE */
+	rc = wait_event_timeout(dev->link_state_wait,
+			dev->slate_resp_cmplt,
+				 msecs_to_jiffies(TIMEOUT_MS));
+	if (rc == 0) {
+		pr_err("failed to get SLATE response %d\n", rc);
+		goto err_ret;
+	}
+	dev->slate_resp_cmplt = false;
+	/* check SLATE response */
+	resp = *(uint8_t *)dev->rx_buf;
+	if (!(resp == 0x01)) {
+		pr_err("Bad SLATE response\n");
+		rc = -EINVAL;
+		goto err_ret;
+	}
+	rc = 0;
+
+err_ret:
+	mutex_unlock(&dev->glink_mutex);
+	return rc;
+}
+
+/**
+ * send_state_change_cmd send state transition event to Slate
+ * and wait for the response.
+ * The response is returned to the caller.
+ */
+static int send_state_change_cmd(struct slate_ui_data *ui_obj_msg)
+{
+	int ret = 0;
+	struct wear_header wear_header_t = {0, 0};
+	struct slatedaemon_priv *dev = container_of(slatecom_intf_drv,
+					struct slatedaemon_priv,
+					lhndl);
+	uint32_t state = ui_obj_msg->cmd;
+
+	switch (state) {
+	case STATE_TWM_ENTER:
+		wear_header_t.opcode = GMI_WEAR_MGR_ENTER_TWM;
+		break;
+	case STATE_DS_ENTER:
+		wear_header_t.opcode = GMI_WEAR_MGR_ENTER_TRACKER_DS;
+		break;
+	case STATE_DS_EXIT:
+		wear_header_t.opcode = GMI_WEAR_MGR_EXIT_TRACKER_DS;
+		break;
+	default:
+		pr_err("Invalid MSM State transtion cmd\n");
+		break;
+	}
+	ret = slatecom_tx_msg(dev, &wear_header_t.opcode, sizeof(wear_header_t.opcode));
+	if (ret < 0)
+		pr_err("MSM State transtion event cmd failed\n");
+	return ret;
+}
+
 static int slatecom_char_open(struct inode *inode, struct file *file)
 {
 	int ret;
@@ -382,6 +493,16 @@ static long slate_com_ioctl(struct file *filp,
 		}
 		ret = 0;
 		break;
+	case DEVICE_STATE_TRANSITION:
+		if (copy_from_user(&ui_obj_msg, (void __user *)arg,
+					sizeof(ui_obj_msg))) {
+			pr_err("The copy from user failed for state transition cmd\n");
+			ret = -EFAULT;
+		}
+		ret = send_state_change_cmd(&ui_obj_msg);
+		if (ret < 0)
+			pr_err("device state transition cmd failed\n");
+		break;
 	default:
 		ret = -ENOIOCTLCMD;
 		break;

drivers/soc/qcom/slatecom_interface.h

@@ -36,6 +36,80 @@ void set_slate_dsp_state(bool status);
  * Set slate bt state
  */
 void set_slate_bt_state(bool status);
+void slatecom_intf_notify_glink_channel_state(bool state);
+void slatecom_rx_msg(void *data, int len);
 
+/*
+ * WM header type - generic header structure
+ */
+struct wear_header {
+	uint32_t opcode;
+	uint32_t payload_size;
+};
+
+/**
+ * Opcodes to be received on slate-control channel.
+ */
+enum WMSlateCtrlChnlOpcode {
+	/*
+	 * Command to slate to enter TWM mode
+	 */
+	GMI_WEAR_MGR_ENTER_TWM = 1,
+
+	/*
+	 * Notification to slate about Modem Processor Sub System
+	 * is down due to a subsystem reset.
+	 */
+	GMI_WEAR_MGR_SSR_MPSS_DOWN_NOTIFICATION = 2,
+
+	/*
+	 * Notification to slate about Modem Processor Sub System
+	 * being brought up after a subsystem reset.
+	 */
+	GMI_WEAR_MGR_SSR_MPSS_UP_NOTIFICATION = 3,
+
+	/*
+	 * Notification to slate about ADSP Sub System
+	 * is down due to a subsystem reset.
+	 */
+	GMI_WEAR_MGR_SSR_ADSP_DOWN_INDICATION = 8,
+
+	/*
+	 * Notification to slate about Modem Processor
+	 * Sub System being brought up after a subsystem reset.
+	 */
+	GMI_WEAR_MGR_SSR_ADSP_UP_INDICATION = 9,
+
+	/*
+	 * Notification to MSM for generic wakeup in tracker mode
+	 */
+	GMI_WEAR_MGR_WAKE_UP_NO_REASON = 10,
+
+	/*
+	 * Notification to Slate About Entry to Tracker-DS
+	 */
+	GMI_WEAR_MGR_ENTER_TRACKER_DS = 11,
+
+	/*
+	 * Notification to Slate About Entry to Tracker-DS
+	 */
+	GMI_WEAR_MGR_EXIT_TRACKER_DS = 12,
+
+	/*
+	 * Notification to Slate About Time-sync update
+	 */
+	GMI_WEAR_MGR_TIME_SYNC_UPDATE = 13,	/* payload struct: wear_time_sync_t*/
+
+	/*
+	 * Notification to Slate About Timeval UTC
+	 */
+	GMI_WEAR_MGR_TIMEVAL_UTC = 14,		/* payload struct: wear_timeval_utc_t*/
+
+	/*
+	 * Notification to Slate About Daylight saving time
+	 */
+	GMI_WEAR_MGR_DST = 15,			/* payload struct: wear_dst_t*/
+
+};
 #endif /* SLATECOM_INTERFACE_H */
 

drivers/soc/qcom/slatecom_rpmsg.c

@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include "slatecom_rpmsg.h"
+
+static struct slatecom_rpmsg_dev *pdev;
+
+int slatecom_rpmsg_tx_msg(void  *msg, size_t len)
+{
+	int ret = 0;
+
+	if (pdev == NULL || !pdev->chnl_state)
+		pr_err("pmsg_device is null, channel is closed\n");
+
+	pdev->message = msg;
+	pdev->message_length = len;
+	if (pdev->message) {
+		ret = rpmsg_send(pdev->channel, pdev->message, pdev->message_length);
+		if (ret)
+			pr_err("rpmsg_send failed: %d\n", ret);
+
+	}
+	return ret;
+}
+EXPORT_SYMBOL(slatecom_rpmsg_tx_msg);
+
+static int slatecom_rpmsg_probe(struct rpmsg_device  *rpdev)
+{
+	int ret = 0;
+	void *msg = NULL;
+
+	pdev = devm_kzalloc(&rpdev->dev, sizeof(*pdev), GFP_KERNEL);
+	if (!pdev)
+		return -ENOMEM;
+
+	pdev->channel = rpdev->ept;
+	pdev->dev = &rpdev->dev;
+	if (pdev->channel == NULL)
+		return -ENOMEM;
+
+	pdev->chnl_state = true;
+	dev_set_drvdata(&rpdev->dev, pdev);
+
+	/* send a callback to slatecom-interface driver*/
+	slatecom_intf_notify_glink_channel_state(true);
+	if (pdev->message == NULL)
+		ret = slatecom_rpmsg_tx_msg(msg, 0);
+	return 0;
+}
+
+static void slatecom_rpmsg_remove(struct rpmsg_device *rpdev)
+{
+	pdev->chnl_state = false;
+	pdev->message = NULL;
+	dev_dbg(&rpdev->dev, "rpmsg client driver is removed\n");
+	slatecom_intf_notify_glink_channel_state(false);
+	dev_set_drvdata(&rpdev->dev, NULL);
+}
+
+static int slatecom_rpmsg_cb(struct rpmsg_device *rpdev,
+				   void *data, int len, void *priv, u32 src)
+{
+	struct slatecom_rpmsg_dev *dev =
+			  dev_get_drvdata(&rpdev->dev);
+
+	if (!dev)
+		return -ENODEV;
+	slatecom_rx_msg(data, len);
+	return 0;
+}
+
+static const struct rpmsg_device_id rpmsg_driver_slatecom_id_table[] = {
+	{ "SLATECOM_CTRL" },
+	{},
+};
+MODULE_DEVICE_TABLE(rpmsg, rpmsg_driver_slatecom_id_table);
+
+static const struct of_device_id rpmsg_driver_slatecom_of_match[] = {
+	{ .compatible = "qcom,slatecom-rpmsg" },
+	{},
+};
+
+static struct rpmsg_driver rpmsg_slatecom_client = {
+	.id_table = rpmsg_driver_slatecom_id_table,
+	.probe = slatecom_rpmsg_probe,
+	.callback = slatecom_rpmsg_cb,
+	.remove = slatecom_rpmsg_remove,
+	.drv = {
+		 .name = "qcom,slatecom_rpmsg",
+		 .of_match_table = rpmsg_driver_slatecom_of_match,
+	},
+};
+module_rpmsg_driver(rpmsg_slatecom_client);
+
+MODULE_DESCRIPTION("Interface Driver for SLATECOM and RPMSG");
+MODULE_LICENSE("GPL v2");

drivers/soc/qcom/slatecom_rpmsg.h

@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+#ifndef SLATECOMRPMSG_H
+#define SLATECOMRPMSG_H
+
+#include <linux/rpmsg.h>
+#include "slatecom_interface.h"
+
+#define TIMEOUT_MS 2000
+
+struct slatecom_rpmsg_dev {
+	struct rpmsg_endpoint *channel;
+	struct device *dev;
+	bool chnl_state;
+	void *message;
+	size_t message_length;
+};
+
+
+#if IS_ENABLED(CONFIG_MSM_SLATECOM_RPMSG)
+int slatecom_rpmsg_tx_msg(void  *msg, size_t len);
+#else
+static inline int slatecom_rpmsg_tx_msg(void  *msg, size_t len)
+{
+	return -EIO;
+}
+#endif
+
+#endif

drivers/soc/qcom/subsys-pil-tz.c

@@ -46,6 +46,10 @@
 #define desc_to_data(d) container_of(d, struct pil_tz_data, desc)
 #define subsys_to_data(d) container_of(d, struct pil_tz_data, subsys_desc)
 
+static char pil_ssr_reason[MAX_SSR_REASON_LEN];
+static char *ssr_reason = pil_ssr_reason;
+module_param(ssr_reason, charp, S_IRUGO);
+
 /**
  * struct reg_info - regulator info
  * @reg: regulator handle
@@ -761,7 +765,7 @@ static struct pil_reset_ops pil_ops_trusted = {
 static void log_failure_reason(const struct pil_tz_data *d)
 {
 	size_t size;
-	char *smem_reason, reason[MAX_SSR_REASON_LEN];
+	char *smem_reason;
 	const char *name = d->subsys_desc.name;
 
 	if (d->smem_id == -1)
@@ -778,8 +782,8 @@ static void log_failure_reason(const struct pil_tz_data *d)
 		return;
 	}
 
-	strlcpy(reason, smem_reason, min(size, (size_t)MAX_SSR_REASON_LEN));
-	pr_err("%s subsystem failure reason: %s.\n", name, reason);
+	strlcpy(pil_ssr_reason, smem_reason, min((size_t)size, (size_t)sizeof(pil_ssr_reason)));
+	pr_err("%s subsystem failure reason: %s.\n", name, pil_ssr_reason);
 }
 
 static int subsys_shutdown(const struct subsys_desc *subsys, bool force_stop)