diff --git a/bindings/gpu/adreno.txt b/bindings/gpu/adreno.txt index de91a4ee875e..12de7124472c 100644 --- a/bindings/gpu/adreno.txt +++ b/bindings/gpu/adreno.txt @@ -66,6 +66,8 @@ GDSC Oxili Regulators: - regulator-names: List of regulator name strings sorted in power-on order - vddcx-supply: Phandle for vddcx regulator device node. - vdd-supply: Phandle for vdd regulator device node. +- vdd-parent-supply: Phandle for vdd parent regulator device node. +- vdd-parent-min-corner: Minimum voltage corner value to set vdd parent supply. IOMMU Data: - iommu: Phandle for the KGSL IOMMU device node @@ -355,6 +357,8 @@ Example of A330 GPU in MSM8916: /* GDSC oxili regulators */ vdd-supply = <&gdsc_oxili_gx>; + vdd-parent-supply = <&VDD_GFX_LEVEL>; + vdd-parent-min-corner = ; nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>; nvmem-cell-names = "speed_bin", "gaming_bin"; diff --git a/qcom/holi-gpu.dtsi b/qcom/holi-gpu.dtsi index c0728369bff4..d18c1771c956 100644 --- a/qcom/holi-gpu.dtsi +++ b/qcom/holi-gpu.dtsi @@ -1,3 +1,5 @@ +#include + #define MHZ_TO_KBPS(mhz, w) ((mhz * 1000000 * w) / (1024)) &soc { pil_gpu: qcom,kgsl-hyp { @@ -30,6 +32,8 @@ msm_gpu: qcom,kgsl-3d0@5900000 { vddcx-supply = <&gpu_cx_gdsc>; vdd-supply = <&gpu_gx_gdsc>; + vdd-parent-supply = <&VDD_GFX_LEVEL>; + vdd-parent-min-corner = ; qcom,chipid = <0x06010900>; nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>;