mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
[PATCH] powerpc: Move various ppc64 files with no ppc32 equivalent to powerpc
This patch moves a bunch of files from arch/ppc64 and
include/asm-ppc64 which have no equivalents in ppc32 code into
arch/powerpc and include/asm-powerpc. The file affected are:
abs_addr.h
compat.h
lppaca.h
paca.h
tce.h
cpu_setup_power4.S
ioctl32.c
firmware.c
pacaData.c
The only changes apart from the move and corresponding Makefile
changes are:
- #ifndef/#define in includes updated to _ASM_POWERPC_ form
- trailing whitespace removed
- comments giving full paths removed
- pacaData.c renamed paca.c to remove studlyCaps
- Misplaced { moved in lppaca.h
Built and booted on POWER5 LPAR (ARCH=powerpc and ARCH=ppc64), built
for 32-bit powermac (ARCH=powerpc).
Signed-off-by: David Gibson <[email protected]>
Signed-off-by: Paul Mackerras <[email protected]>
This commit is contained in:
David Gibson
Paul Mackerras
parent
584224e409
commit
8882a4da1c
11 changed files with 35 additions and 39 deletions
73
include/asm-powerpc/abs_addr.h
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73
include/asm-powerpc/abs_addr.h
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@ -0,0 +1,73 @@
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#ifndef _ASM_POWERPC_ABS_ADDR_H
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#define _ASM_POWERPC_ABS_ADDR_H
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#include <linux/config.h>
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/*
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* c 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/types.h>
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#include <asm/page.h>
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#include <asm/prom.h>
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#include <asm/lmb.h>
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#include <asm/firmware.h>
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struct mschunks_map {
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unsigned long num_chunks;
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unsigned long chunk_size;
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unsigned long chunk_shift;
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unsigned long chunk_mask;
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u32 *mapping;
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};
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extern struct mschunks_map mschunks_map;
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/* Chunks are 256 KB */
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#define MSCHUNKS_CHUNK_SHIFT (18)
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#define MSCHUNKS_CHUNK_SIZE (1UL << MSCHUNKS_CHUNK_SHIFT)
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#define MSCHUNKS_OFFSET_MASK (MSCHUNKS_CHUNK_SIZE - 1)
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static inline unsigned long chunk_to_addr(unsigned long chunk)
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{
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return chunk << MSCHUNKS_CHUNK_SHIFT;
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}
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static inline unsigned long addr_to_chunk(unsigned long addr)
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{
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return addr >> MSCHUNKS_CHUNK_SHIFT;
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}
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static inline unsigned long phys_to_abs(unsigned long pa)
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{
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unsigned long chunk;
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/* This is a no-op on non-iSeries */
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if (!firmware_has_feature(FW_FEATURE_ISERIES))
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return pa;
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chunk = addr_to_chunk(pa);
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if (chunk < mschunks_map.num_chunks)
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chunk = mschunks_map.mapping[chunk];
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return chunk_to_addr(chunk) + (pa & MSCHUNKS_OFFSET_MASK);
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}
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/* Convenience macros */
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#define virt_to_abs(va) phys_to_abs(__pa(va))
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#define abs_to_virt(aa) __va(aa)
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/*
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* Converts Virtual Address to Real Address for
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* Legacy iSeries Hypervisor calls
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*/
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#define iseries_hv_addr(virtaddr) \
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(0x8000000000000000 | virt_to_abs(virtaddr))
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#endif /* _ASM_POWERPC_ABS_ADDR_H */
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205
include/asm-powerpc/compat.h
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205
include/asm-powerpc/compat.h
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@ -0,0 +1,205 @@
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#ifndef _ASM_POWERPC_COMPAT_H
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#define _ASM_POWERPC_COMPAT_H
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/*
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* Architecture specific compatibility types
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*/
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#include <linux/types.h>
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#include <linux/sched.h>
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#define COMPAT_USER_HZ 100
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typedef u32 compat_size_t;
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typedef s32 compat_ssize_t;
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typedef s32 compat_time_t;
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typedef s32 compat_clock_t;
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typedef s32 compat_pid_t;
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typedef u32 __compat_uid_t;
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typedef u32 __compat_gid_t;
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typedef u32 __compat_uid32_t;
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typedef u32 __compat_gid32_t;
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typedef u32 compat_mode_t;
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typedef u32 compat_ino_t;
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typedef u32 compat_dev_t;
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typedef s32 compat_off_t;
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typedef s64 compat_loff_t;
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typedef s16 compat_nlink_t;
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typedef u16 compat_ipc_pid_t;
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typedef s32 compat_daddr_t;
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typedef u32 compat_caddr_t;
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typedef __kernel_fsid_t compat_fsid_t;
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typedef s32 compat_key_t;
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typedef s32 compat_timer_t;
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typedef s32 compat_int_t;
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typedef s32 compat_long_t;
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typedef u32 compat_uint_t;
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typedef u32 compat_ulong_t;
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struct compat_timespec {
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compat_time_t tv_sec;
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s32 tv_nsec;
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};
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struct compat_timeval {
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compat_time_t tv_sec;
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s32 tv_usec;
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};
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struct compat_stat {
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compat_dev_t st_dev;
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compat_ino_t st_ino;
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compat_mode_t st_mode;
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compat_nlink_t st_nlink;
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__compat_uid32_t st_uid;
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__compat_gid32_t st_gid;
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compat_dev_t st_rdev;
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compat_off_t st_size;
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compat_off_t st_blksize;
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compat_off_t st_blocks;
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compat_time_t st_atime;
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u32 st_atime_nsec;
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compat_time_t st_mtime;
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u32 st_mtime_nsec;
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compat_time_t st_ctime;
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u32 st_ctime_nsec;
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u32 __unused4[2];
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};
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struct compat_flock {
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short l_type;
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short l_whence;
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compat_off_t l_start;
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compat_off_t l_len;
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compat_pid_t l_pid;
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};
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#define F_GETLK64 12 /* using 'struct flock64' */
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#define F_SETLK64 13
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#define F_SETLKW64 14
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struct compat_flock64 {
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short l_type;
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short l_whence;
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compat_loff_t l_start;
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compat_loff_t l_len;
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compat_pid_t l_pid;
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};
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struct compat_statfs {
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int f_type;
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int f_bsize;
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int f_blocks;
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int f_bfree;
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int f_bavail;
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int f_files;
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int f_ffree;
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compat_fsid_t f_fsid;
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int f_namelen; /* SunOS ignores this field. */
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int f_frsize;
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int f_spare[5];
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};
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#define COMPAT_RLIM_OLD_INFINITY 0x7fffffff
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#define COMPAT_RLIM_INFINITY 0xffffffff
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typedef u32 compat_old_sigset_t;
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#define _COMPAT_NSIG 64
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#define _COMPAT_NSIG_BPW 32
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typedef u32 compat_sigset_word;
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#define COMPAT_OFF_T_MAX 0x7fffffff
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#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
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/*
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* A pointer passed in from user mode. This should not
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* be used for syscall parameters, just declare them
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* as pointers because the syscall entry code will have
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* appropriately comverted them already.
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*/
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typedef u32 compat_uptr_t;
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static inline void __user *compat_ptr(compat_uptr_t uptr)
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{
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return (void __user *)(unsigned long)uptr;
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}
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static inline void __user *compat_alloc_user_space(long len)
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{
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struct pt_regs *regs = current->thread.regs;
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unsigned long usp = regs->gpr[1];
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/*
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* We cant access below the stack pointer in the 32bit ABI and
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* can access 288 bytes in the 64bit ABI
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*/
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if (!(test_thread_flag(TIF_32BIT)))
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usp -= 288;
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return (void __user *) (usp - len);
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}
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/*
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* ipc64_perm is actually 32/64bit clean but since the compat layer refers to
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* it we may as well define it.
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*/
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struct compat_ipc64_perm {
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compat_key_t key;
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__compat_uid_t uid;
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__compat_gid_t gid;
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__compat_uid_t cuid;
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__compat_gid_t cgid;
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compat_mode_t mode;
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unsigned int seq;
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unsigned int __pad2;
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unsigned long __unused1; /* yes they really are 64bit pads */
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unsigned long __unused2;
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};
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struct compat_semid64_ds {
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struct compat_ipc64_perm sem_perm;
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unsigned int __unused1;
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compat_time_t sem_otime;
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unsigned int __unused2;
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compat_time_t sem_ctime;
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compat_ulong_t sem_nsems;
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compat_ulong_t __unused3;
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compat_ulong_t __unused4;
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};
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struct compat_msqid64_ds {
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struct compat_ipc64_perm msg_perm;
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unsigned int __unused1;
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compat_time_t msg_stime;
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unsigned int __unused2;
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compat_time_t msg_rtime;
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unsigned int __unused3;
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compat_time_t msg_ctime;
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compat_ulong_t msg_cbytes;
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compat_ulong_t msg_qnum;
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compat_ulong_t msg_qbytes;
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compat_pid_t msg_lspid;
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compat_pid_t msg_lrpid;
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compat_ulong_t __unused4;
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compat_ulong_t __unused5;
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};
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struct compat_shmid64_ds {
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struct compat_ipc64_perm shm_perm;
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unsigned int __unused1;
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compat_time_t shm_atime;
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unsigned int __unused2;
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compat_time_t shm_dtime;
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unsigned int __unused3;
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compat_time_t shm_ctime;
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unsigned int __unused4;
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compat_size_t shm_segsz;
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compat_pid_t shm_cpid;
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compat_pid_t shm_lpid;
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compat_ulong_t shm_nattch;
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compat_ulong_t __unused5;
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compat_ulong_t __unused6;
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};
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#endif /* _ASM_POWERPC_COMPAT_H */
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131
include/asm-powerpc/lppaca.h
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131
include/asm-powerpc/lppaca.h
Normal file
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/*
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* lppaca.h
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* Copyright (C) 2001 Mike Corrigan IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ASM_POWERPC_LPPACA_H
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#define _ASM_POWERPC_LPPACA_H
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//=============================================================================
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//
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// This control block contains the data that is shared between the
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// hypervisor (PLIC) and the OS.
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//
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//
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//----------------------------------------------------------------------------
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#include <asm/types.h>
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struct lppaca {
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//=============================================================================
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// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
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// NOTE: The xDynXyz fields are fields that will be dynamically changed by
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// PLIC when preparing to bring a processor online or when dispatching a
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// virtual processor!
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//=============================================================================
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u32 desc; // Eye catcher 0xD397D781 x00-x03
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u16 size; // Size of this struct x04-x05
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u16 reserved1; // Reserved x06-x07
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u16 reserved2:14; // Reserved x08-x09
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u8 shared_proc:1; // Shared processor indicator ...
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u8 secondary_thread:1; // Secondary thread indicator ...
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volatile u8 dyn_proc_status:8; // Dynamic Status of this proc x0A-x0A
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u8 secondary_thread_count; // Secondary thread count x0B-x0B
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volatile u16 dyn_hv_phys_proc_index;// Dynamic HV Physical Proc Index0C-x0D
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volatile u16 dyn_hv_log_proc_index;// Dynamic HV Logical Proc Indexx0E-x0F
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u32 decr_val; // Value for Decr programming x10-x13
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u32 pmc_val; // Value for PMC regs x14-x17
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volatile u32 dyn_hw_node_id; // Dynamic Hardware Node id x18-x1B
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volatile u32 dyn_hw_proc_id; // Dynamic Hardware Proc Id x1C-x1F
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volatile u32 dyn_pir; // Dynamic ProcIdReg value x20-x23
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u32 dsei_data; // DSEI data x24-x27
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u64 sprg3; // SPRG3 value x28-x2F
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u8 reserved3[80]; // Reserved x30-x7F
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//=============================================================================
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// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
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//=============================================================================
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// This Dword contains a byte for each type of interrupt that can occur.
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// The IPI is a count while the others are just a binary 1 or 0.
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union {
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u64 any_int;
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struct {
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u16 reserved; // Reserved - cleared by #mpasmbl
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u8 xirr_int; // Indicates xXirrValue is valid or Immed IO
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u8 ipi_cnt; // IPI Count
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u8 decr_int; // DECR interrupt occurred
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u8 pdc_int; // PDC interrupt occurred
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u8 quantum_int; // Interrupt quantum reached
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u8 old_plic_deferred_ext_int; // Old PLIC has a deferred XIRR pending
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} fields;
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} int_dword;
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// Whenever any fields in this Dword are set then PLIC will defer the
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// processing of external interrupts. Note that PLIC will store the
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// XIRR directly into the xXirrValue field so that another XIRR will
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// not be presented until this one clears. The layout of the low
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// 4-bytes of this Dword is upto SLIC - PLIC just checks whether the
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// entire Dword is zero or not. A non-zero value in the low order
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// 2-bytes will result in SLIC being granted the highest thread
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// priority upon return. A 0 will return to SLIC as medium priority.
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u64 plic_defer_ints_area; // Entire Dword
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// Used to pass the real SRR0/1 from PLIC to SLIC as well as to
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// pass the target SRR0/1 from SLIC to PLIC on a SetAsrAndRfid.
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u64 saved_srr0; // Saved SRR0 x10-x17
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u64 saved_srr1; // Saved SRR1 x18-x1F
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// Used to pass parms from the OS to PLIC for SetAsrAndRfid
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u64 saved_gpr3; // Saved GPR3 x20-x27
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u64 saved_gpr4; // Saved GPR4 x28-x2F
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u64 saved_gpr5; // Saved GPR5 x30-x37
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u8 reserved4; // Reserved x38-x38
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u8 cpuctls_task_attrs; // Task attributes for cpuctls x39-x39
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u8 fpregs_in_use; // FP regs in use x3A-x3A
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u8 pmcregs_in_use; // PMC regs in use x3B-x3B
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volatile u32 saved_decr; // Saved Decr Value x3C-x3F
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volatile u64 emulated_time_base;// Emulated TB for this thread x40-x47
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volatile u64 cur_plic_latency; // Unaccounted PLIC latency x48-x4F
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u64 tot_plic_latency; // Accumulated PLIC latency x50-x57
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u64 wait_state_cycles; // Wait cycles for this proc x58-x5F
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u64 end_of_quantum; // TB at end of quantum x60-x67
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u64 pdc_saved_sprg1; // Saved SPRG1 for PMC int x68-x6F
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u64 pdc_saved_srr0; // Saved SRR0 for PMC int x70-x77
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volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B
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u16 slb_count; // # of SLBs to maintain x7C-x7D
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u8 idle; // Indicate OS is idle x7E
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u8 vmxregs_in_use; // VMX registers in use x7F
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//=============================================================================
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// CACHE_LINE_3 0x0100 - 0x007F: This line is shared with other processors
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//=============================================================================
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// This is the yield_count. An "odd" value (low bit on) means that
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// the processor is yielded (either because of an OS yield or a PLIC
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// preempt). An even value implies that the processor is currently
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// executing.
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// NOTE: This value will ALWAYS be zero for dedicated processors and
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// will NEVER be zero for shared processors (ie, initialized to a 1).
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volatile u32 yield_count; // PLIC increments each dispatchx00-x03
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u8 reserved6[124]; // Reserved x04-x7F
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//=============================================================================
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// CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data
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//=============================================================================
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u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF
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};
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#endif /* _ASM_POWERPC_LPPACA_H */
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120
include/asm-powerpc/paca.h
Normal file
120
include/asm-powerpc/paca.h
Normal file
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/*
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* include/asm-powerpc/paca.h
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*
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* This control block defines the PACA which defines the processor
|
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* specific data for each logical processor on the system.
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* There are some pointers defined that are utilized by PLIC.
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*
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* C 2001 PPC 64 Team, IBM Corp
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*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_PACA_H
|
||||
#define _ASM_POWERPC_PACA_H
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/types.h>
|
||||
#include <asm/lppaca.h>
|
||||
#include <asm/iseries/it_lp_reg_save.h>
|
||||
#include <asm/mmu.h>
|
||||
|
||||
register struct paca_struct *local_paca asm("r13");
|
||||
#define get_paca() local_paca
|
||||
|
||||
struct task_struct;
|
||||
|
||||
/*
|
||||
* Defines the layout of the paca.
|
||||
*
|
||||
* This structure is not directly accessed by firmware or the service
|
||||
* processor except for the first two pointers that point to the
|
||||
* lppaca area and the ItLpRegSave area for this CPU. Both the
|
||||
* lppaca and ItLpRegSave objects are currently contained within the
|
||||
* PACA but they do not need to be.
|
||||
*/
|
||||
struct paca_struct {
|
||||
/*
|
||||
* Because hw_cpu_id, unlike other paca fields, is accessed
|
||||
* routinely from other CPUs (from the IRQ code), we stick to
|
||||
* read-only (after boot) fields in the first cacheline to
|
||||
* avoid cacheline bouncing.
|
||||
*/
|
||||
|
||||
/*
|
||||
* MAGIC: These first two pointers can't be moved - they're
|
||||
* accessed by the firmware
|
||||
*/
|
||||
struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
|
||||
struct ItLpRegSave *reg_save_ptr; /* Pointer to LpRegSave for PLIC */
|
||||
|
||||
/*
|
||||
* MAGIC: the spinlock functions in arch/ppc64/lib/locks.c
|
||||
* load lock_token and paca_index with a single lwz
|
||||
* instruction. They must travel together and be properly
|
||||
* aligned.
|
||||
*/
|
||||
u16 lock_token; /* Constant 0x8000, used in locks */
|
||||
u16 paca_index; /* Logical processor number */
|
||||
|
||||
u32 default_decr; /* Default decrementer value */
|
||||
u64 kernel_toc; /* Kernel TOC address */
|
||||
u64 stab_real; /* Absolute address of segment table */
|
||||
u64 stab_addr; /* Virtual address of segment table */
|
||||
void *emergency_sp; /* pointer to emergency stack */
|
||||
s16 hw_cpu_id; /* Physical processor number */
|
||||
u8 cpu_start; /* At startup, processor spins until */
|
||||
/* this becomes non-zero. */
|
||||
|
||||
/*
|
||||
* Now, starting in cacheline 2, the exception save areas
|
||||
*/
|
||||
/* used for most interrupts/exceptions */
|
||||
u64 exgen[10] __attribute__((aligned(0x80)));
|
||||
u64 exmc[10]; /* used for machine checks */
|
||||
u64 exslb[10]; /* used for SLB/segment table misses
|
||||
* on the linear mapping */
|
||||
#ifdef CONFIG_PPC_64K_PAGES
|
||||
pgd_t *pgdir;
|
||||
#endif /* CONFIG_PPC_64K_PAGES */
|
||||
|
||||
mm_context_t context;
|
||||
u16 slb_cache[SLB_CACHE_ENTRIES];
|
||||
u16 slb_cache_ptr;
|
||||
|
||||
/*
|
||||
* then miscellaneous read-write fields
|
||||
*/
|
||||
struct task_struct *__current; /* Pointer to current */
|
||||
u64 kstack; /* Saved Kernel stack addr */
|
||||
u64 stab_rr; /* stab/slb round-robin counter */
|
||||
u64 next_jiffy_update_tb; /* TB value for next jiffy update */
|
||||
u64 saved_r1; /* r1 save for RTAS calls */
|
||||
u64 saved_msr; /* MSR saved here by enter_rtas */
|
||||
u8 proc_enabled; /* irq soft-enable flag */
|
||||
|
||||
/* not yet used */
|
||||
u64 exdsi[8]; /* used for linear mapping hash table misses */
|
||||
|
||||
/*
|
||||
* iSeries structure which the hypervisor knows about -
|
||||
* this structure should not cross a page boundary.
|
||||
* The vpa_init/register_vpa call is now known to fail if the
|
||||
* lppaca structure crosses a page boundary.
|
||||
* The lppaca is also used on POWER5 pSeries boxes.
|
||||
* The lppaca is 640 bytes long, and cannot readily change
|
||||
* since the hypervisor knows its layout, so a 1kB
|
||||
* alignment will suffice to ensure that it doesn't
|
||||
* cross a page boundary.
|
||||
*/
|
||||
struct lppaca lppaca __attribute__((__aligned__(0x400)));
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
struct ItLpRegSave reg_save;
|
||||
#endif
|
||||
};
|
||||
|
||||
extern struct paca_struct paca[];
|
||||
|
||||
#endif /* _ASM_POWERPC_PACA_H */
|
||||
64
include/asm-powerpc/tce.h
Normal file
64
include/asm-powerpc/tce.h
Normal file
|
|
@ -0,0 +1,64 @@
|
|||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
|
||||
* Rewrite, cleanup:
|
||||
* Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _ASM_POWERPC_TCE_H
|
||||
#define _ASM_POWERPC_TCE_H
|
||||
|
||||
/*
|
||||
* Tces come in two formats, one for the virtual bus and a different
|
||||
* format for PCI
|
||||
*/
|
||||
#define TCE_VB 0
|
||||
#define TCE_PCI 1
|
||||
|
||||
/* TCE page size is 4096 bytes (1 << 12) */
|
||||
|
||||
#define TCE_SHIFT 12
|
||||
#define TCE_PAGE_SIZE (1 << TCE_SHIFT)
|
||||
#define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
|
||||
|
||||
|
||||
/* tce_entry
|
||||
* Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
|
||||
* abstracted so layout is irrelevant.
|
||||
*/
|
||||
union tce_entry {
|
||||
unsigned long te_word;
|
||||
struct {
|
||||
unsigned int tb_cacheBits :6; /* Cache hash bits - not used */
|
||||
unsigned int tb_rsvd :6;
|
||||
unsigned long tb_rpn :40; /* Real page number */
|
||||
unsigned int tb_valid :1; /* Tce is valid (vb only) */
|
||||
unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */
|
||||
unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */
|
||||
unsigned int tb_pciwr :1; /* Write allowed (pci only) */
|
||||
unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */
|
||||
} te_bits;
|
||||
#define te_cacheBits te_bits.tb_cacheBits
|
||||
#define te_rpn te_bits.tb_rpn
|
||||
#define te_valid te_bits.tb_valid
|
||||
#define te_allio te_bits.tb_allio
|
||||
#define te_lpindex te_bits.tb_lpindex
|
||||
#define te_pciwr te_bits.tb_pciwr
|
||||
#define te_rdwr te_bits.tb_rdwr
|
||||
};
|
||||
|
||||
|
||||
#endif /* _ASM_POWERPC_TCE_H */
|
||||
Loading…
Reference in a new issue