From 88b04acc6e7fee15af6f7664f2a5b499e60f01ae Mon Sep 17 00:00:00 2001 From: Pankaj Gupta Date: Mon, 13 Jul 2020 21:03:53 +0530 Subject: [PATCH] msm: kgsl: Add snapshot size and highest bank bit for a619 Add GPU core configuration of snapshot_size and highest_bank_bit for A619 GPU. Change-Id: I1df21e8f32b6a2e120bf80697fc40a0a6ff65775 Signed-off-by: Pankaj Gupta --- drivers/gpu/msm/adreno-gpulist.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/msm/adreno-gpulist.h b/drivers/gpu/msm/adreno-gpulist.h index 6ee4b4c6fa95..3b161249bd05 100644 --- a/drivers/gpu/msm/adreno-gpulist.h +++ b/drivers/gpu/msm/adreno-gpulist.h @@ -938,6 +938,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a619 = { .gpudev = &adreno_a630_gpudev, .gmem_size = SZ_512K, .bus_width = 32, + .snapshot_size = SZ_2M, }, .prim_fifo_threshold = 0x0018000, .gmu_major = 1, @@ -951,6 +952,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a619 = { .vbif_count = ARRAY_SIZE(a615_gbif_regs), .hang_detect_cycles = 0x3fffff, .protected_regs = a630_protected_regs, + .highest_bank_bit = 14, }; static const struct adreno_a6xx_core adreno_gpu_core_a619_variant = { @@ -961,6 +963,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a619_variant = { .gpudev = &adreno_a6xx_gpudev, .gmem_size = SZ_512K, .bus_width = 32, + .snapshot_size = SZ_2M, }, .prim_fifo_threshold = 0x0018000, .sqefw_name = "a630_sqe.fw", @@ -972,6 +975,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a619_variant = { .hang_detect_cycles = 0x3fffff, .protected_regs = a630_protected_regs, .gx_cpr_toggle = true, + .highest_bank_bit = 14, }; static const struct adreno_reglist a620_hwcg_regs[] = {