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ARM: dts: msm: add l3 latfloor in shima target
Add cpu7-l3 latfloor dcvs node to scale l3 based onthe prime core frequency in shima target. Change-Id: Ia9e1642b9a4fe38ee1c51a0a2da8df8d94d15b7e
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1 changed files with 19 additions and 0 deletions
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@ -2373,6 +2373,16 @@
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&epss_l3_cpu SLAVE_EPSS_L3_CPU7>;
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};
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cpu7_cpu_l3_latfloor: qcom,cpu7-cpu-l3-latfloor {
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compatible = "qcom,devfreq-icc-l3";
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reg = <0x18590100 0xa0>;
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reg-names = "ftbl-base";
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governor = "compute";
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interconnects =
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<&epss_l3_cpu MASTER_EPSS_L3_APPS
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&epss_l3_cpu SLAVE_EPSS_L3_SHARED>;
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};
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cpu0_cpu_llcc_lat: qcom,cpu0-cpu-llcc-lat {
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compatible = "qcom,devfreq-icc";
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governor = "mem_latency";
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@ -2549,6 +2559,15 @@
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qcom,core-dev-table = <&cpu7_cpu_l3_tbl>;
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};
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cpu7_l3_computemon: qcom,cpu7-l3-computemon {
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compatible = "qcom,arm-compute-mon";
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qcom,cpulist = <&CPU7>;
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qcom,target-dev = <&cpu7_cpu_l3_latfloor>;
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qcom,core-dev-table =
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< 2169600 300000000 >,
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< 2707200 1420800000 >;
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};
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cpu0_cpu_llcc_latmon: qcom,cpu0-cpu-llcc-latmon {
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compatible = "qcom,arm-memlat-mon";
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qcom,target-dev = <&cpu0_cpu_llcc_lat>;
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