From 2e681f66a7c60ea101ddd385b5ee000fae965c9b Mon Sep 17 00:00:00 2001
From: Hemant Kumar <hemantk@quicinc.com>
Date: Tue, 20 Apr 2021 11:31:52 -0700
Subject: [PATCH] ARM: dts: msm: Add entry to t_power_on scale and value on
 sdxlemur

PCIe ASPM driver calculates the L1.2 threshold value based on t_common
mode and t_power_on by reading from L1SUB capability register. t_power
on scale and value are 0 power on default. Pass appropriate value to
set the L1.2 threshold above 150us.

Change-Id: I9ba7676b0548a6d3484a2aad27619a88f31b25d7
---
 qcom/sdxlemur-pcie.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/sdxlemur-pcie.dtsi b/qcom/sdxlemur-pcie.dtsi
index 62b45985834f..cdfb037da0ba 100644
--- a/qcom/sdxlemur-pcie.dtsi
+++ b/qcom/sdxlemur-pcie.dtsi
@@ -109,8 +109,8 @@
 			<0x100 &apps_smmu 0x0201 0x1>;
 
 		qcom,aux-clk-freq = <17>; /* 16.6 MHz */
-		qcom,l1-2-th-scale = <2>; /* 1us */
-		qcom,l1-2-th-value = <150>;
+		qcom,tpwr-on-scale = <1>;
+		qcom,tpwr-on-value = <9>;
 		qcom,eq-fmdc-t-min-phase23 = <1>;
 		qcom,slv-addr-space-size = <0x40000000>;
 		qcom,ep-latency = <10>;