diff --git a/qcom/monaco-gdsc.dtsi b/qcom/monaco-gdsc.dtsi
index e1bf1597ede3..f527f93bf3b1 100644
--- a/qcom/monaco-gdsc.dtsi
+++ b/qcom/monaco-gdsc.dtsi
@@ -1,35 +1,35 @@
 &soc {
 	/* GDSCs in GCC */
 	gcc_camss_top_gdsc: qcom,gdsc@1458004 {
-		compatible = "regulator-fixed";
+		compatible = "qcom,gdsc";
 		reg = <0x1458004 0x4>;
 		regulator-name = "gcc_camss_top_gdsc";
 		status = "disabled";
 	};
 
 	gcc_usb20_prim_gdsc: qcom,gdsc@141c004 {
-		compatible = "regulator-fixed";
+		compatible = "qcom,gdsc";
 		reg = <0x141c004 0x4>;
 		regulator-name = "gcc_usb20_prim_gdsc";
 		status = "disabled";
 	};
 
 	gcc_vcodec0_gdsc: qcom,gdsc@14580a8 {
-		compatible = "regulator-fixed";
+		compatible = "qcom,gdsc";
 		reg = <0x14580a8 0x4>;
 		regulator-name = "gcc_vcodec0_gdsc";
 		status = "disabled";
 	};
 
 	gcc_venus_gdsc: qcom,gdsc@1458084 {
-		compatible = "regulator-fixed";
+		compatible = "qcom,gdsc";
 		reg = <0x1458084 0x4>;
 		regulator-name = "gcc_venus_gdsc";
 		status = "disabled";
 	};
 
 	hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc: qcom,gdsc@147d078 {
-		compatible = "regulator-fixed";
+		compatible = "qcom,gdsc";
 		reg = <0x147d078 0x4>;
 		regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc";
 		qcom,no-status-check-on-disable;
@@ -37,7 +37,7 @@
 	};
 
 	hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc: qcom,gdsc@147d074 {
-		compatible = "regulator-fixed";
+		compatible = "qcom,gdsc";
 		reg = <0x147d074 0x4>;
 		regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc";
 		qcom,no-status-check-on-disable;
diff --git a/qcom/monaco-rumi.dtsi b/qcom/monaco-rumi.dtsi
index aa3e9f57a73b..00444217e4c5 100644
--- a/qcom/monaco-rumi.dtsi
+++ b/qcom/monaco-rumi.dtsi
@@ -13,4 +13,8 @@
 
 };
 
+&gcc {
+	clocks = <&bi_tcxo>, <&bi_tcxo_ao>, <&sleep_clk>;
+};
+
 #include "monaco-stub-regulator.dtsi"
diff --git a/qcom/monaco.dtsi b/qcom/monaco.dtsi
index 3742aa953dc7..60a8d4f7089d 100644
--- a/qcom/monaco.dtsi
+++ b/qcom/monaco.dtsi
@@ -532,7 +532,7 @@
 	bi_tcxo: bi_tcxo {
 		compatible = "fixed-factor-clock";
 		clock-mult = <1>;
-		clock-div = <1>;
+		clock-div = <2>;
 		clocks = <&xo_board>;
 		#clock-cells = <0>;
 	};
@@ -540,7 +540,7 @@
 	bi_tcxo_ao: bi_tcxo_ao {
 		compatible = "fixed-factor-clock";
 		clock-mult = <1>;
-		clock-div = <1>;
+		clock-div = <2>;
 		clocks = <&xo_board>;
 		#clock-cells = <0>;
 	};
@@ -553,8 +553,15 @@
 	};
 
 	gcc: clock-controller@1410000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "gcc_clocks";
+		compatible = "qcom,monaco-gcc", "syscon";
+		reg = <0x1400000 0x1e0000>;
+		reg-names = "cc_base";
+		vdd_cx-supply = <&VDD_CX_LEVEL>;
+		vdd_mx-supply = <&VDD_MXA_LEVEL>;
+		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+			 <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
+			 <&sleep_clk>;
+		clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
@@ -824,6 +831,7 @@
 #include "monaco-pinctrl.dtsi"
 #include "msm-arm-smmu-monaco.dtsi"
 #include "monaco-ion.dtsi"
+#include "monaco-stub-regulator.dtsi"
 #include "monaco-gdsc.dtsi"
 #include "monaco-qupv3.dtsi"
 
@@ -832,38 +840,47 @@
 };
 
 &gcc_camss_top_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &gcc_usb20_prim_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &gcc_vcodec0_gdsc {
 	qcom,support-hw-trigger;
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &gcc_venus_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &mdss_core_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &gpu_cx_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &gpu_gx_gdsc {
+	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };