From c3f70428c7e8f6905bd15b39d86ffe0c7922b8a9 Mon Sep 17 00:00:00 2001
From: Mukesh Ojha <mojha@qti.qualcomm.com>
Date: Fri, 20 Mar 2020 17:28:21 +0530
Subject: [PATCH 1/2] ARM: dts: msm: add msm_rtb tracing

Add qcom,msm-rtb entry to device tree to enable msm_rtb tracing.

Change-Id: Iad117ffb05d477f0ad960737782c56944f3db93e
---
 qcom/shima.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index 6ff18e644fe5..b26d9de246dd 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -449,6 +449,11 @@
 		interrupt-names = "l1-l2-faultirq","l3-scu-faultirq";
 	};
 
+	qcom,msm-rtb {
+		compatible = "qcom,msm-rtb";
+		qcom,rtb-size = <0x100000>;
+	};
+
 	clocks {
 		xo_board: xo-board {
 			compatible = "fixed-clock";

From d0179ec286927b2c4ba8e5b0a4a3583051353cd2 Mon Sep 17 00:00:00 2001
From: Mukesh Ojha <mojha@qti.qualcomm.com>
Date: Mon, 24 Feb 2020 19:34:49 +0530
Subject: [PATCH 2/2] ARM: dts: msm: Add pshold to Shima

Add pshold node to Shima devicetree.

Change-Id: Ifaf3c87e4a4fd334952801298700113e8bd5ed71
---
 qcom/shima.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index b26d9de246dd..1d09417ef7f4 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -845,6 +845,12 @@
 		qcom,config-arr = <0x18000060 0x18010060 0x18020060 0x18030060
 				0x18040060 0x18050060 0x18060060 0x18070060>;
 	};
+
+	restart: restart@c264000 {
+		compatible = "qcom,pshold";
+		reg = <0xc264000 0x4>, <0x1fd3000 0x4>;
+		reg-names = "pshold-base", "tcsr-boot-misc-detect";
+	};
 };
 
 #include "shima-pinctrl.dtsi"