From c4b397d41d00628cc16ea9b1e552efc6e294f752 Mon Sep 17 00:00:00 2001
From: Mike Tipton <mdtipton@quicinc.com>
Date: Mon, 13 Apr 2020 19:10:55 -0700
Subject: [PATCH] ARM: dts: msm: Add clock required for IPA QoS configuration

Add additional clock required for IPA QoS register access and
configuration.

Change-Id: I6323f93563a7efeb9115acddc218d4db35636215
---
 qcom/lahaina.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index ac6df549fd1f..b4f2e72ccc6d 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -2684,7 +2684,8 @@
 		clocks = <&clock_gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
 			<&clock_gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
 			<&clock_gcc GCC_AGGRE_UFS_CARD_AXI_CLK>,
-			<&clock_gcc GCC_AGGRE_UFS_PHY_AXI_CLK>;
+			<&clock_gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+			<&clock_rpmh RPMH_IPA_CLK>;
 	};
 
 	clk_virt: interconnect {