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Merge 5.4-rc1-prereleae into android-mainline

Browse source 
To make the 5.4-rc1 merge easier, merge at a prerelease point in time
before the final release happens.

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I29b683c837ed1a3324644dbf9bf863f30740cd0b
This commit is contained in:
Greg Kroah-Hartman 2019-09-23 14:14:08 +02:00
commit 896be8f44d
3550 changed files with 333627 additions and 71650 deletions
Download patch file Download diff file Expand all files Collapse all files

4
include/uapi/drm/amdgpu_drm.h
View file

@ -128,6 +128,10 @@ extern "C" {
* for the second page onward should be set to NC.
*/
#define AMDGPU_GEM_CREATE_MQD_GFX9 (1 << 8)
/* Flag that BO may contain sensitive data that must be wiped before
* releasing the memory
*/
#define AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE (1 << 9)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */

1
include/uapi/drm/drm_mode.h
View file

@ -361,6 +361,7 @@ enum drm_mode_subconnector {
#define DRM_MODE_CONNECTOR_DSI 16
#define DRM_MODE_CONNECTOR_DPI 17
#define DRM_MODE_CONNECTOR_WRITEBACK 18
#define DRM_MODE_CONNECTOR_SPI 19
struct drm_mode_get_connector {

10
include/uapi/drm/etnaviv_drm.h
View file

@ -73,6 +73,7 @@ struct drm_etnaviv_timespec {
#define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT 0x18
#define ETNAVIV_PARAM_GPU_NUM_CONSTANTS 0x19
#define ETNAVIV_PARAM_GPU_NUM_VARYINGS 0x1a
#define ETNAVIV_PARAM_SOFTPIN_START_ADDR 0x1b
#define ETNA_MAX_PIPES 4
@ -148,6 +149,11 @@ struct drm_etnaviv_gem_submit_reloc {
* then patching the cmdstream for this entry is skipped. This can
* avoid kernel needing to map/access the cmdstream bo in the common
* case.
* If the submit is a softpin submit (ETNA_SUBMIT_SOFTPIN) the 'presumed'
* field is interpreted as the fixed location to map the bo into the gpu
* virtual address space. If the kernel is unable to map the buffer at
* this location the submit will fail. This means userspace is responsible
* for the whole gpu virtual address management.
*/
#define ETNA_SUBMIT_BO_READ 0x0001
#define ETNA_SUBMIT_BO_WRITE 0x0002
@ -177,9 +183,11 @@ struct drm_etnaviv_gem_submit_pmr {
#define ETNA_SUBMIT_NO_IMPLICIT 0x0001
#define ETNA_SUBMIT_FENCE_FD_IN 0x0002
#define ETNA_SUBMIT_FENCE_FD_OUT 0x0004
#define ETNA_SUBMIT_SOFTPIN 0x0008
#define ETNA_SUBMIT_FLAGS (ETNA_SUBMIT_NO_IMPLICIT | \
ETNA_SUBMIT_FENCE_FD_IN | \
ETNA_SUBMIT_FENCE_FD_OUT)
ETNA_SUBMIT_FENCE_FD_OUT| \
ETNA_SUBMIT_SOFTPIN)
#define ETNA_PIPE_3D 0x00
#define ETNA_PIPE_2D 0x01
#define ETNA_PIPE_VG 0x02

1
include/uapi/drm/i915_drm.h
View file

@ -521,6 +521,7 @@ typedef struct drm_i915_irq_wait {
#define I915_SCHEDULER_CAP_PRIORITY (1ul << 1)
#define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
#define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3)
#define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4)
#define I915_PARAM_HUC_STATUS 42

64
include/uapi/drm/panfrost_drm.h
View file

@ -20,6 +20,7 @@ extern "C" {
#define DRM_PANFROST_GET_BO_OFFSET 0x05
#define DRM_PANFROST_PERFCNT_ENABLE 0x06
#define DRM_PANFROST_PERFCNT_DUMP 0x07
#define DRM_PANFROST_MADVISE 0x08
#define DRM_IOCTL_PANFROST_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit)
#define DRM_IOCTL_PANFROST_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo)
@ -27,6 +28,7 @@ extern "C" {
#define DRM_IOCTL_PANFROST_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MMAP_BO, struct drm_panfrost_mmap_bo)
#define DRM_IOCTL_PANFROST_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_PARAM, struct drm_panfrost_get_param)
#define DRM_IOCTL_PANFROST_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset)
#define DRM_IOCTL_PANFROST_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MADVISE, struct drm_panfrost_madvise)
/*
* Unstable ioctl(s): only exposed when the unsafe unstable_ioctls module
@ -82,6 +84,9 @@ struct drm_panfrost_wait_bo {
__s64 timeout_ns; /* absolute */
};
#define PANFROST_BO_NOEXEC 1
#define PANFROST_BO_HEAP 2
/**
* struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs.
*
@ -127,6 +132,45 @@ struct drm_panfrost_mmap_bo {
enum drm_panfrost_param {
DRM_PANFROST_PARAM_GPU_PROD_ID,
DRM_PANFROST_PARAM_GPU_REVISION,
DRM_PANFROST_PARAM_SHADER_PRESENT,
DRM_PANFROST_PARAM_TILER_PRESENT,
DRM_PANFROST_PARAM_L2_PRESENT,
DRM_PANFROST_PARAM_STACK_PRESENT,
DRM_PANFROST_PARAM_AS_PRESENT,
DRM_PANFROST_PARAM_JS_PRESENT,
DRM_PANFROST_PARAM_L2_FEATURES,
DRM_PANFROST_PARAM_CORE_FEATURES,
DRM_PANFROST_PARAM_TILER_FEATURES,
DRM_PANFROST_PARAM_MEM_FEATURES,
DRM_PANFROST_PARAM_MMU_FEATURES,
DRM_PANFROST_PARAM_THREAD_FEATURES,
DRM_PANFROST_PARAM_MAX_THREADS,
DRM_PANFROST_PARAM_THREAD_MAX_WORKGROUP_SZ,
DRM_PANFROST_PARAM_THREAD_MAX_BARRIER_SZ,
DRM_PANFROST_PARAM_COHERENCY_FEATURES,
DRM_PANFROST_PARAM_TEXTURE_FEATURES0,
DRM_PANFROST_PARAM_TEXTURE_FEATURES1,
DRM_PANFROST_PARAM_TEXTURE_FEATURES2,
DRM_PANFROST_PARAM_TEXTURE_FEATURES3,
DRM_PANFROST_PARAM_JS_FEATURES0,
DRM_PANFROST_PARAM_JS_FEATURES1,
DRM_PANFROST_PARAM_JS_FEATURES2,
DRM_PANFROST_PARAM_JS_FEATURES3,
DRM_PANFROST_PARAM_JS_FEATURES4,
DRM_PANFROST_PARAM_JS_FEATURES5,
DRM_PANFROST_PARAM_JS_FEATURES6,
DRM_PANFROST_PARAM_JS_FEATURES7,
DRM_PANFROST_PARAM_JS_FEATURES8,
DRM_PANFROST_PARAM_JS_FEATURES9,
DRM_PANFROST_PARAM_JS_FEATURES10,
DRM_PANFROST_PARAM_JS_FEATURES11,
DRM_PANFROST_PARAM_JS_FEATURES12,
DRM_PANFROST_PARAM_JS_FEATURES13,
DRM_PANFROST_PARAM_JS_FEATURES14,
DRM_PANFROST_PARAM_JS_FEATURES15,
DRM_PANFROST_PARAM_NR_CORE_GROUPS,
DRM_PANFROST_PARAM_THREAD_TLS_ALLOC,
};
struct drm_panfrost_get_param {
@ -159,6 +203,26 @@ struct drm_panfrost_perfcnt_dump {
__u64 buf_ptr;
};
/* madvise provides a way to tell the kernel in case a buffers contents
* can be discarded under memory pressure, which is useful for userspace
* bo cache where we want to optimistically hold on to buffer allocate
* and potential mmap, but allow the pages to be discarded under memory
* pressure.
*
* Typical usage would involve madvise(DONTNEED) when buffer enters BO
* cache, and madvise(WILLNEED) if trying to recycle buffer from BO cache.
* In the WILLNEED case, 'retained' indicates to userspace whether the
* backing pages still exist.
*/
#define PANFROST_MADV_WILLNEED 0 /* backing pages are needed, status returned in 'retained' */
#define PANFROST_MADV_DONTNEED 1 /* backing pages not needed */
struct drm_panfrost_madvise {
__u32 handle; /* in, GEM handle */
__u32 madv; /* in, PANFROST_MADV_x */
__u32 retained; /* out, whether backing store still exists */
};
#if defined(__cplusplus)
}
#endif

6
include/uapi/linux/dm-ioctl.h
View file

@ -243,6 +243,7 @@ enum {
DM_TARGET_MSG_CMD,
DM_DEV_SET_GEOMETRY_CMD,
DM_DEV_ARM_POLL_CMD,
DM_GET_TARGET_VERSION_CMD,
};
#define DM_IOCTL 0xfd
@ -265,14 +266,15 @@ enum {
#define DM_TABLE_STATUS _IOWR(DM_IOCTL, DM_TABLE_STATUS_CMD, struct dm_ioctl)
#define DM_LIST_VERSIONS _IOWR(DM_IOCTL, DM_LIST_VERSIONS_CMD, struct dm_ioctl)
#define DM_GET_TARGET_VERSION _IOWR(DM_IOCTL, DM_GET_TARGET_VERSION_CMD, struct dm_ioctl)
#define DM_TARGET_MSG _IOWR(DM_IOCTL, DM_TARGET_MSG_CMD, struct dm_ioctl)
#define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
#define DM_VERSION_MAJOR 4
#define DM_VERSION_MINOR 40
#define DM_VERSION_MINOR 41
#define DM_VERSION_PATCHLEVEL 0
#define DM_VERSION_EXTRA "-ioctl (2019-01-18)"
#define DM_VERSION_EXTRA "-ioctl (2019-09-16)"
/* Status bits */
#define DM_READONLY_FLAG (1 << 0) /* In/Out */

1
include/uapi/linux/fs.h
View file

@ -264,6 +264,7 @@ struct fsxattr {
#define FS_NOCOW_FL 0x00800000 /* Do not cow file */
#define FS_INLINE_DATA_FL 0x10000000 /* Reserved for ext4 */
#define FS_PROJINHERIT_FL 0x20000000 /* Create with parents projid */
#define FS_CASEFOLD_FL 0x40000000 /* Folder is case insensitive */
#define FS_RESERVED_FL 0x80000000 /* reserved for ext2 lib */
#define FS_FL_USER_VISIBLE 0x0003DFFF /* User visible flags */

3
include/uapi/linux/media-bus-format.h
View file

@ -34,7 +34,7 @@
#define MEDIA_BUS_FMT_FIXED 0x0001
/* RGB - next is 0x101c */
/* RGB - next is 0x101d */
#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
@ -55,6 +55,7 @@
#define MEDIA_BUS_FMT_RGB888_1X24 0x100a
#define MEDIA_BUS_FMT_RGB888_2X12_BE 0x100b
#define MEDIA_BUS_FMT_RGB888_2X12_LE 0x100c
#define MEDIA_BUS_FMT_RGB888_3X8 0x101c
#define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG 0x1011
#define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012
#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d

1
include/uapi/linux/serio.h
View file

@ -82,5 +82,6 @@
#define SERIO_EGALAX 0x3f
#define SERIO_PULSE8_CEC 0x40
#define SERIO_RAINSHADOW_CEC 0x41
#define SERIO_FSIA6B 0x42
#endif /* _UAPI_SERIO_H */

71
include/uapi/linux/vfio.h
View file

@ -295,15 +295,38 @@ struct vfio_region_info_cap_type {
__u32 subtype; /* type specific */
};
/*
* List of region types, global per bus driver.
* If you introduce a new type, please add it here.
*/
/* PCI region type containing a PCI vendor part */
#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
#define VFIO_REGION_TYPE_GFX (1)
#define VFIO_REGION_TYPE_CCW (2)
/* 8086 Vendor sub-types */
/* sub-types for VFIO_REGION_TYPE_PCI_* */
/* 8086 vendor PCI sub-types */
#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
#define VFIO_REGION_TYPE_GFX (1)
/* 10de vendor PCI sub-types */
/*
* NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
*/
#define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
/* 1014 vendor PCI sub-types */
/*
* IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
* to do TLB invalidation on a GPU.
*/
#define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1)
/* sub-types for VFIO_REGION_TYPE_GFX */
#define VFIO_REGION_SUBTYPE_GFX_EDID (1)
/**
@ -353,25 +376,9 @@ struct vfio_region_gfx_edid {
#define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2
};
#define VFIO_REGION_TYPE_CCW (2)
/* ccw sub-types */
/* sub-types for VFIO_REGION_TYPE_CCW */
#define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD (1)
/*
* 10de vendor sub-type
*
* NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
*/
#define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
/*
* 1014 vendor sub-type
*
* IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
* to do TLB invalidation on a GPU.
*/
#define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1)
/*
* The MSIX mappable capability informs that MSIX data of a BAR can be mmapped
* which allows direct access to non-MSIX registers which happened to be within
@ -714,7 +721,31 @@ struct vfio_iommu_type1_info {
__u32 argsz;
__u32 flags;
#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */
__u64 iova_pgsizes; /* Bitmap of supported page sizes */
#define VFIO_IOMMU_INFO_CAPS (1 << 1) /* Info supports caps */
__u64 iova_pgsizes; /* Bitmap of supported page sizes */
__u32 cap_offset; /* Offset within info struct of first cap */
};
/*
* The IOVA capability allows to report the valid IOVA range(s)
* excluding any non-relaxable reserved regions exposed by
* devices attached to the container. Any DMA map attempt
* outside the valid iova range will return error.
*
* The structures below define version 1 of this capability.
*/
#define VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE 1
struct vfio_iova_range {
__u64 start;
__u64 end;
};
struct vfio_iommu_type1_info_cap_iova_range {
struct vfio_info_cap_header header;
__u32 nr_iovas;
__u32 reserved;
struct vfio_iova_range iova_ranges[];
};
#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)

1
include/uapi/rdma/mlx5_user_ioctl_verbs.h
View file

@ -43,6 +43,7 @@ enum mlx5_ib_uapi_flow_table_type {
MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX = 0x0,
MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX = 0x1,
MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB = 0x2,
MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX = 0x3,
};
enum mlx5_ib_uapi_flow_action_packet_reformat_type {

54
include/uapi/scsi/scsi_bsg_fc.h
View file

@ -8,6 +8,8 @@
#ifndef SCSI_BSG_FC_H
#define SCSI_BSG_FC_H
#include <linux/types.h>
/*
* This file intended to be included by both kernel and user space
*/
@ -66,10 +68,10 @@
* with the transport upon completion of the login.
*/
struct fc_bsg_host_add_rport {
uint8_t reserved;
__u8 reserved;
/* FC Address Identier of the remote port to login to */
uint8_t port_id[3];
__u8 port_id[3];
};
/* Response:
@ -87,10 +89,10 @@ struct fc_bsg_host_add_rport {
* remain logged in with the remote port.
*/
struct fc_bsg_host_del_rport {
uint8_t reserved;
__u8 reserved;
/* FC Address Identier of the remote port to logout of */
uint8_t port_id[3];
__u8 port_id[3];
};
/* Response:
@ -111,10 +113,10 @@ struct fc_bsg_host_els {
* ELS Command Code being sent (must be the same as byte 0
* of the payload)
*/
uint8_t command_code;
__u8 command_code;
/* FC Address Identier of the remote port to send the ELS to */
uint8_t port_id[3];
__u8 port_id[3];
};
/* Response:
@ -151,14 +153,14 @@ struct fc_bsg_ctels_reply {
* Note: x_RJT/BSY status will indicae that the rjt_data field
* is valid and contains the reason/explanation values.
*/
uint32_t status; /* See FC_CTELS_STATUS_xxx */
__u32 status; /* See FC_CTELS_STATUS_xxx */
/* valid if status is not FC_CTELS_STATUS_OK */
struct {
uint8_t action; /* fragment_id for CT REJECT */
uint8_t reason_code;
uint8_t reason_explanation;
uint8_t vendor_unique;
__u8 action; /* fragment_id for CT REJECT */
__u8 reason_code;
__u8 reason_explanation;
__u8 vendor_unique;
} rjt_data;
};
@ -174,17 +176,17 @@ struct fc_bsg_ctels_reply {
* and whether to tear it down after the request.
*/
struct fc_bsg_host_ct {
uint8_t reserved;
__u8 reserved;
/* FC Address Identier of the remote port to send the ELS to */
uint8_t port_id[3];
__u8 port_id[3];
/*
* We need words 0-2 of the generic preamble for the LLD's
*/
uint32_t preamble_word0; /* revision & IN_ID */
uint32_t preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */
uint32_t preamble_word2; /* Cmd Code, Max Size */
__u32 preamble_word0; /* revision & IN_ID */
__u32 preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */
__u32 preamble_word2; /* Cmd Code, Max Size */
};
/* Response:
@ -204,17 +206,17 @@ struct fc_bsg_host_vendor {
* Identifies the vendor that the message is formatted for. This
* should be the recipient of the message.
*/
uint64_t vendor_id;
__u64 vendor_id;
/* start of vendor command area */
uint32_t vendor_cmd[0];
__u32 vendor_cmd[0];
};
/* Response:
*/
struct fc_bsg_host_vendor_reply {
/* start of vendor response area */
uint32_t vendor_rsp[0];
__u32 vendor_rsp[0];
};
@ -233,7 +235,7 @@ struct fc_bsg_rport_els {
* ELS Command Code being sent (must be the same as
* byte 0 of the payload)
*/
uint8_t els_code;
__u8 els_code;
};
/* Response:
@ -251,9 +253,9 @@ struct fc_bsg_rport_ct {
/*
* We need words 0-2 of the generic preamble for the LLD's
*/
uint32_t preamble_word0; /* revision & IN_ID */
uint32_t preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */
uint32_t preamble_word2; /* Cmd Code, Max Size */
__u32 preamble_word0; /* revision & IN_ID */
__u32 preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */
__u32 preamble_word2; /* Cmd Code, Max Size */
};
/* Response:
*
@ -265,7 +267,7 @@ struct fc_bsg_rport_ct {
/* request (CDB) structure of the sg_io_v4 */
struct fc_bsg_request {
uint32_t msgcode;
__u32 msgcode;
union {
struct fc_bsg_host_add_rport h_addrport;
struct fc_bsg_host_del_rport h_delrport;
@ -289,10 +291,10 @@ struct fc_bsg_reply {
* msg and status fields. The per-msgcode reply structure
* will contain valid data.
*/
uint32_t result;
__u32 result;
/* If there was reply_payload, how much was recevied ? */
uint32_t reply_payload_rcv_len;
__u32 reply_payload_rcv_len;
union {
struct fc_bsg_host_vendor_reply vendor_reply;

20
include/uapi/scsi/scsi_netlink.h
View file

@ -26,12 +26,12 @@
/* SCSI_TRANSPORT_MSG event message header */
struct scsi_nl_hdr {
uint8_t version;
uint8_t transport;
uint16_t magic;
uint16_t msgtype;
uint16_t msglen;
} __attribute__((aligned(sizeof(uint64_t))));
__u8 version;
__u8 transport;
__u16 magic;
__u16 msgtype;
__u16 msglen;
} __attribute__((aligned(sizeof(__u64))));
/* scsi_nl_hdr->version value */
#define SCSI_NL_VERSION 1
@ -75,10 +75,10 @@ struct scsi_nl_hdr {
*/
struct scsi_nl_host_vendor_msg {
struct scsi_nl_hdr snlh; /* must be 1st element ! */
uint64_t vendor_id;
uint16_t host_no;
uint16_t vmsg_datalen;
} __attribute__((aligned(sizeof(uint64_t))));
__u64 vendor_id;
__u16 host_no;
__u16 vmsg_datalen;
} __attribute__((aligned(sizeof(__u64))));
/*

17
include/uapi/scsi/scsi_netlink_fc.h
View file

@ -7,6 +7,7 @@
#ifndef SCSI_NETLINK_FC_H
#define SCSI_NETLINK_FC_H
#include <linux/types.h>
#include <scsi/scsi_netlink.h>
/*
@ -43,14 +44,14 @@
*/
struct fc_nl_event {
struct scsi_nl_hdr snlh; /* must be 1st element ! */
uint64_t seconds;
uint64_t vendor_id;
uint16_t host_no;
uint16_t event_datalen;
uint32_t event_num;
uint32_t event_code;
uint32_t event_data;
} __attribute__((aligned(sizeof(uint64_t))));
__u64 seconds;
__u64 vendor_id;
__u16 host_no;
__u16 event_datalen;
__u32 event_num;
__u32 event_code;
__u32 event_data;
} __attribute__((aligned(sizeof(__u64))));
#endif /* SCSI_NETLINK_FC_H */