From 3bd3ae4fc70d70c2c6ad3aecb199f87c03ba24ce Mon Sep 17 00:00:00 2001 From: Git User Date: Fri, 24 May 2019 11:20:10 -0700 Subject: [PATCH 001/190] Initial empty repository From e10e40625ac5bed6d1d5a51a10e9ff840a102172 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Fri, 14 Jun 2019 15:21:12 -0700 Subject: [PATCH 002/190] dt-bindings: Move camera devicetree bindins from video Move camera devicetree bindings from video to camera project. Change-Id: Iacfbd2a1a248ebae54ae3f42d785a454320a5f49 --- bindings/msm-cam-cci.txt | 817 ++++++++++++++++++++++++++++++++++ bindings/msm-cam-cdm.txt | 155 +++++++ bindings/msm-cam-cpas.txt | 398 +++++++++++++++++ bindings/msm-cam-csiphy.txt | 117 +++++ bindings/msm-cam-eeprom.txt | 503 +++++++++++++++++++++ bindings/msm-cam-fd.txt | 154 +++++++ bindings/msm-cam-icp.txt | 287 ++++++++++++ bindings/msm-cam-ife-csid.txt | 121 +++++ bindings/msm-cam-isp.txt | 36 ++ bindings/msm-cam-jpeg.txt | 186 ++++++++ bindings/msm-cam-lrme.txt | 148 ++++++ bindings/msm-cam-smmu.txt | 142 ++++++ bindings/msm-cam-vfe.txt | 146 ++++++ bindings/msm-camera-flash.txt | 132 ++++++ bindings/msm-camera.txt | 13 + 15 files changed, 3355 insertions(+) create mode 100644 bindings/msm-cam-cci.txt create mode 100644 bindings/msm-cam-cdm.txt create mode 100644 bindings/msm-cam-cpas.txt create mode 100644 bindings/msm-cam-csiphy.txt create mode 100644 bindings/msm-cam-eeprom.txt create mode 100644 bindings/msm-cam-fd.txt create mode 100644 bindings/msm-cam-icp.txt create mode 100644 bindings/msm-cam-ife-csid.txt create mode 100644 bindings/msm-cam-isp.txt create mode 100644 bindings/msm-cam-jpeg.txt create mode 100644 bindings/msm-cam-lrme.txt create mode 100644 bindings/msm-cam-smmu.txt create mode 100644 bindings/msm-cam-vfe.txt create mode 100644 bindings/msm-camera-flash.txt create mode 100644 bindings/msm-camera.txt diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt new file mode 100644 index 000000000000..59651a354157 --- /dev/null +++ b/bindings/msm-cam-cci.txt @@ -0,0 +1,817 @@ +* Qualcomm Technologies, Inc. MSM CCI + +CCI (Camera Control Interface) is module that is use for camera sensor module +I2C communication. + +======================= +Required Node Structure +======================= +The camera CCI node must be described in two levels of device nodes. The +first level describe the overall CCI node structure. Second level nodes +describe camera sensor submodule nodes which is using CCI for +i2c communication. + +====================================== +First Level Node - CCI device +====================================== + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cci". + +- cell-index: cci hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + +- reg + Usage: required + Value type: + Definition: offset and length of the register set + for the device for the cci operating in + compatible mode. + +- reg-names + Usage: required + Value type: + Definition: Should specify relevant names to each + reg property defined. + +- interrupts + Usage: required + Value type: + Definition: Interrupt associated with CCI HW. + +- interrupt-names + Usage: required + Value type: + Definition: Name of the interrupt. + +- gpios + Usage: required + Value type: + Definition: should specify the gpios to be used for the CCI. + +- gpio-req-tbl-num + Usage: required + Value type: + Definition: should specify the gpio table index. + +- gpio-req-tbl-flags + Usage: required + Value type: + Definition: should specify the gpio functions. + +- gpio-req-tbl-label + Usage: required + Value type: + Definition: should specify the gpio labels in + gpio-req-tbl-num property (in the same order) + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CCI HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clock rates in Hz for CCI HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- clocks + Usage: required + Value type: + Definition: all clock phandle and source clocks. + +- src-clock-name + Usage: required + Value type: + Definition: name for the source clock. + +- regulator-names + Usage: required + Value type: + Definition: name of the voltage regulators required for the device. + +- gdscr-supply + Usage: required + Value type: + Definition: should contain gdsr regulator used for cci clocks. + +- mmagic-supply + Usage: optional + Value type: + Definition: should contain mmagic regulator used for mmagic clocks. + +========================= +CCI clock settings +========================= +- I2c speed settings (*) + Usage: required + Definition: List of i2c rates for CCI HW. + - i2c_freq_100Khz + Definition: qcom,i2c_standard_mode - node should contain clock settings for + 100Khz + - i2c_freq_400Khz + Definition: qcom,i2c_fast_mode - node should contain clock settings for + 400Khz + - i2c_freq_custom + Definition: qcom,i2c_custom_mode - node can contain clock settings for + frequencies other than 100Khz and 400Khz which is specific to usecase. + Currently it has settings for 375Khz. + - i2c_freq_1Mhz + Definition: qcom,i2c_fast_plus_mode - node should contain clock + settings for 1Mhz +* if speed settings is not defined the low level driver can use "i2c_freq_custom" +like default + + - hw-thigh + Definition: should contain high period of the SCL clock in terms of CCI clock cycle + - hw-tlow + Definition: should contain high period of the SCL clock in terms of CCI clock cycle + - hw-tsu-sto + Definition: should contain setup time for STOP condition + - hw-tsu-sta + Definition: should contain setup time for Repeated START condition + - hw-thd-dat + Definition: should contain hold time for the data + - hw-thd-sta + Definition: should contain hold time for START condition + - hw-tbuf + Definition: should contain free time between a STOP and a START condition + - hw-scl-stretch-en + Definition: should contain enable or disable clock stretching + - hw-trdhld + Definition: should contain internal hold time for SDA + - hw-tsp + Definition: should contain filtering of glitches + +Example: + + qcom,cci@0xfda0c000 { + cell-index = <0>; + compatible = "qcom,cci"; + reg = <0xfda0c000 0x300>; + reg-names = "cci"; + interrupts = <0 50 0>; + interrupt-names = "cci"; + clock-names = "camnoc_axi_clk", "soc_ahb_clk", + "slow_ahb_src_clk", "cpas_ahb_clk", + "cci_clk", "cci_clk_src"; + clock-rates = <0 0 80000000 0 0 37500000>; + clock-cntl-level = "turbo"; + gpios = <&tlmm 17 0>, + <&tlmm 18 0>, + <&tlmm 19 0>, + <&tlmm 20 0>; + gpio-tbl-num = <0 1 2 3>; + gpio-tbl-flags = <1 1 1 1>; + gpio-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + i2c_freq_100Khz: qcom,i2c_standard_mode { + hw-thigh = <78>; + hw-tlow = <114>; + hw-tsu-sto = <28>; + hw-tsu-sta = <28>; + hw-thd-dat = <10>; + hw-thd-sta = <77>; + hw-tbuf = <118>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <1>; + status = "ok"; + }; + i2c_freq_400Khz: qcom,i2c_fast_mode { + hw-thigh = <20>; + hw-tlow = <28>; + hw-tsu-sto = <21>; + hw-tsu-sta = <21>; + hw-thd-dat = <13>; + hw-thd-sta = <18>; + hw-tbuf = <25>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + status = "ok"; + }; + i2c_freq_custom: qcom,i2c_custom_mode { + hw-thigh = <15>; + hw-tlow = <28>; + hw-tsu-sto = <21>; + hw-tsu-sta = <21>; + hw-thd-dat = <13>; + hw-thd-sta = <18>; + hw-tbuf = <25>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + status = "ok"; + }; + i2c_freq_1Mhz: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <19>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + +======================================= +Second Level Node - CAM SENSOR MODULES +======================================= + +======================================= +CAM SENSOR RESOURCE MANAGER +======================================= +Camera Sensor Resource manager node contains properties of shared camera +sensor resource. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-res-mgr". + +- shared-gpios + Usage: optional + Value type: + Definition: should contain the gpios which are used by two or more + cameras, and these cameras may be opened together. + +- pinctrl-names + Usage: optional + Value type: + Definition: List of names to assign the shared pin state defined in pinctrl device node + +- pinctrl-<0..n> + Usage: optional + Value type: + Definition: Lists phandles each pointing to the pin configuration node within a pin + controller. These pin configurations are installed in the pinctrl device node. + + +============================= +CAMERA IMAGE SENSOR MODULE +============================= +Image sensor node contains properties of camera image sensor + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-sensor". + +- cell-index: cci hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + +- reg + Usage: required + Value type: + Definition: offset and length of the register set + for the device for the cci operating in + compatible mode. + +- cci-device + Usage: required + Value type: + Definition: should contain i2c device id to be used for this camera + sensor + +- cci-master + Usage: required + Value type: + Definition: should contain i2c master id to be used for this camera + sensor + - 0 -> MASTER 0 + - 1 -> MASTER 1 + +- csiphy-sd-index + Usage: required + Value type: + Definition: should contain csiphy instance that will used to + receive sensor data (0, 1, 2, 3). + +- cam_vdig-supply + Usage: required + Value type: + Definition: should contain regulator from which digital voltage is + supplied + +- cam_vana-supply + Usage: required + Value type: + Definition: should contain regulator from which analog voltage is + supplied + +- cam_vio-supply + Usage: required + Value type: + Definition: should contain regulator from which IO voltage is supplied + +- cam_bob-supply + Usage: optional + Value type: + Definition: should contain regulator from which BoB voltage is supplied + +- regulator-names + Usage: required + Value type: + Definition: should contain names of all regulators needed by this + sensor + +- rgltr-cntrl-support + Usage: required + Value type: + Definition: This property is required if the sw control regulator parameters + e.g. rgltr-min-voltage + +- rgltr-min-voltage + Usage: required + Value type: + Definition: should contain minimum voltage level for regulators mentioned + in regulator-names property (in the same order) + +- rgltr-max-voltage + Usage: required + Value type: + Definition: should contain maximum voltage level for regulators mentioned + in regulator-names property (in the same order) + +- rgltr-load-current + Usage: required + Value type: + Definition: should contain optimum voltage level for regulators mentioned + in regulator-names property (in the same order) + +- sensor-position-roll + Usage: required + Value type: + Definition: should contain sensor rotational angle with respect to axis of + reference. i.e. 0, 90, 180, 360 + +- sensor-position-pitch + Usage: required + Value type: + Definition: should contain sensor rotational angle with respect to axis of + reference. i.e. 0, 90, 180, 360 + +- sensor-position-yaw + Usage: required + Value type: + Definition: should contain sensor rotational angle with respect to axis of + reference. i.e. 0, 90, 180, 360 + +- qcom,secure + Usage: optional + Value type: + Definition: should be enabled to operate the camera in secure mode + +- gpio-no-mux + Usage: optional + Value type: + Definition: should contain field to indicate whether gpio mux table is + available. i.e. 1 if gpio mux is not available, 0 otherwise + +- cam_vaf-supply + Usage: optional + Value type: + Definition: should contain regulator from which AF voltage is supplied + +- pwm-switch + Usage: optional + Value type: + Definition: This property is required for regulator to switch into PWM mode. + +- gpios + Usage: required + Value type: + Definition: should contain phandle to gpio controller node and array of + #gpio-cells specifying specific gpio (controller specific) + +- gpio-reset + Usage: required + Value type: + Definition: should contain index to gpio used by sensors reset_n + +- gpio-standby + Usage: optional + Value type: + Definition: should contain index to gpio used by sensors standby_n + +- gpio-vio + Usage: optional + Value type: + Definition: should contain index to gpio used by sensors io vreg enable + +- gpio-vana + Usage: optional + Value type: + Definition: should contain index to gpio used by sensors analog vreg enable + +- gpio-vdig + Usage: optional + Value type: + Definition: should contain index to gpio used by sensors digital vreg enable + +- gpio-vaf + Usage: optional + Value type: + Definition: should contain index to gpio used by sensors af vreg enable + +- gpio-af-pwdm + Usage: optional + Value type: + Definition: should contain index to gpio used by sensors af pwdm_n + +- gpio-req-tbl-num + Usage: optional + Value type: + Definition: should contain index to gpios specific to this sensor + +- gpio-req-tbl-flags + Usage: optional + Value type: + Definition: should contain direction of gpios present in + gpio-req-tbl-num property (in the same order) + +- gpio-req-tbl-label + Usage: optional + Value type: + Definition: should contain name of gpios present in + gpio-req-tbl-num property (in the same order) + +- gpio-set-tbl-num + Usage: optional + Value type: + Definition: should contain index of gpios that need to be + configured by msm + +- gpio-set-tbl-flags + Usage: optional + Value type: + Definition: should contain value to be configured for the gpios + present in gpio-set-tbl-num property (in the same order) + +- gpio-set-tbl-delay + Usage: optional + Value type: + Definition: should contain amount of delay after configuring + gpios as specified in gpio_set_tbl_flags property (in the same order) + +- actuator-src + Usage: optional + Value type: + Definition: if auto focus is supported by this sensor, this + property should contain phandle of respective actuator node + +- led-flash-src + Usage: optional + Value type: + Definition: if LED flash is supported by this sensor, this + property should contain phandle of respective LED flash node + +- qcom,vdd-cx-supply + Usage: optional + Value type: + Definition: should contain regulator from which cx voltage is supplied + +- qcom,vdd-cx-name + Usage: optional + Value type: + Definition: should contain names of cx regulator + +- eeprom-src + Usage: optional + Value type: + Definition: if eeprom memory is supported by this sensor, this + property should contain phandle of respective eeprom nodes + +- ois-src + Usage: optional + Value type: + Definition: if optical image stabilization is supported by this sensor, + this property should contain phandle of respective ois node + +- ir-led-src + Usage: optional + Value type: + Definition: if ir led is supported by this sensor, this property + should contain phandle of respective ir-led node + +- qcom,ir-cut-src + Usage: optional + Value type: + Definition: if ir cut is supported by this sensor, this property + should contain phandle of respective ir-cut node + +- qcom,special-support-sensors + Usage: required + Value type: + Definition: if only some special sensors are supported + on this board, add sensor name in this property. + +- use-shared-clk + Usage: optional + Value type: + Definition: It is booloean property. This property is required + if the clk is shared clk between different sensor and ois, if this + device need to be opened together. + +- clock-rates + Usage: required + Value type: + Definition: clock rate in Hz. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- clock-cntl-support + Usage: optional + Value type: + Definition: Says whether clock control support is present or not + +- clocks + Usage: required + Value type: + Definition: all clock phandle and source clocks. + +- clock-control + Usage: optional + Value type: + Definition: The valid fields are "NO_SET_RATE", "INIT_RATE" and + "SET_RATE". "NO_SET_RATE" the corresponding clock is enabled without setting + the rate assuming some other driver has already set it to appropriate rate. + "INIT_RATE" clock rate is not queried assuming some other driver has set + the clock rate and ispif will set the the clock to this rate. + "SET_RATE" clock is enabled and the rate is set to the value specified + in the property clock-rates. + +============================= +ACTUATOR MODULE +============================= + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,actuator". + +- cell-index: cci hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + +- reg + Usage: required + Value type: + Definition: offset and length of the register set + for the device for the cci operating in + compatible mode. + +- cci-device + Usage: required + Value type: + Definition: should contain i2c device id to be used for this camera + sensor + +- cci-master + Usage: required + Value type: + Definition: should contain i2c master id to be used for this camera + sensor + - 0 -> MASTER 0 + - 1 -> MASTER 1 + +- cam_vaf-supply + Usage: required + Value type: + Definition: should contain regulator from which AF voltage is supplied + +- regulator-names + Usage: required + Value type: + Definition: should contain names of all regulators needed by this + actuator. i.e. "cam_vaf" + +- rgltr-cntrl-support + Usage: optional + Value type: + Definition: It is booloean property. This property is required + if the code and regulator control parameters e.g. rgltr-min-voltage + +- rgltr-min-voltage + Usage: optional + Value type: + Definition: should contain minimum voltage level in mcrovolts + for regulators mentioned in regulator-names property (in the same order) + +- rgltr-max-voltage + Usage: optional + Value type: + Definition: should contain maximum voltage level in mcrovolts + for regulators mentioned in regulator-names property (in the same order) + +- rgltr-load-current + Usage: optional + Value type: + Definition: should contain the maximum current in microamps + required from the regulators mentioned in the regulator-names property + (in the same order). + +============================= +OIS MODULE +============================= + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,ois". + +- cell-index: cci hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + +- reg + Usage: required + Value type: + Definition: offset and length of the register set + for the device for the cci operating in + compatible mode. + +- cci-device + Usage: required + Value type: + Definition: should contain i2c device id to be used for this camera + sensor + +- cci-master + Usage: required + Value type: + Definition: should contain i2c master id to be used for this camera + sensor + - 0 -> MASTER 0 + - 1 -> MASTER 1 + +- cam_vaf-supply + Usage: required + Value type: + Definition: should contain regulator from which AF voltage is supplied + +- regulator-names + Usage: required + Value type: + Definition: should contain names of all regulators needed by this + actuator. i.e. "cam_vaf" + +- rgltr-cntrl-support + Usage: optional + Value type: + Definition: It is booloean property. This property is required + if the code and regulator control parameters e.g. rgltr-min-voltage + +- rgltr-min-voltage + Usage: optional + Value type: + Definition: should contain minimum voltage level in mcrovolts + for regulators mentioned in regulator-names property (in the same order) + +- rgltr-max-voltage + Usage: optional + Value type: + Definition: should contain maximum voltage level in mcrovolts + for regulators mentioned in regulator-names property (in the same order) + +- rgltr-load-current + Usage: optional + Value type: + Definition: should contain the maximum current in microamps + required from the regulators mentioned in the regulator-names property + (in the same order). + +- use-shared-clk + Usage: optional + Value type: + Definition: This property is required if the clk is shared clk between different + sensor and ois, if this device need to be opened together. + +Example: +&soc { + led_flash0: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi8994_flash0 &pmi8994_flash1>; + torch-source = <&pmi8998_torch0 &pmi8998_torch1>; + switch-source = <&pmi8998_switch>; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator0: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&pmi8998_bob>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + }; + + ois0: qcom,ois@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,ois"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&pmi8998_bob>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + shared-gpios = <18 19>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_shared_clk_active &cam_res_mgr_active>; + pinctrl-1 = <&cam_shared_clk_suspend &cam_res_mgr_suspend>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,camera"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + secure = <1>; + led-flash-src = <&led_flash0>; + actuator-src = <&actuator0>; + ois-src = <&ois0>; + eeprom-src = <&eeprom0>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009l_l1>; + cam_vana-supply = <&pm8009l_l5>; + cam_bob-supply = <&pm8150l_bob>; + cam_clk-supply = <&tital_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 2800000 1200000 0 4000000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear_suspend>; + gpios = <&tlmm 13 0>, + <&tlmm 80 0>, + <&tlmm 79 0>; + gpio-reset = <1>; + gpio-standby = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VANA"; + sensor-position = <0>; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + use-shared-clk; + clocks = <&clock_mmss clk_mclk0_clk_src>, + <&clock_mmss clk_camss_mclk0_clk>; + clock-names = "cam_src_clk", "cam_clk"; + clock-cntl-leveli = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/bindings/msm-cam-cdm.txt b/bindings/msm-cam-cdm.txt new file mode 100644 index 000000000000..b376cad4a049 --- /dev/null +++ b/bindings/msm-cam-cdm.txt @@ -0,0 +1,155 @@ +* Qualcomm Technologies, Inc. MSM Camera CDM + +CDM (Camera Data Mover) is module intended to provide means for fast programming +camera registers and lookup tables. + +======================= +Required Node Structure +======================= +CDM Interface node takes care of the handling has HW nodes and provide interface +for camera clients. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-cdm-intf". + +- label + Usage: required + Value type: + Definition: Should be "cam-cdm-intf". + +- num-hw-cdm + Usage: required + Value type: + Definition: Number of supported HW blocks. + +- cdm-client-names + Usage: required + Value type: + Definition: List of Clients supported by CDM interface. + +Example: + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpeg-dma", + "jpeg", + "fd"; + }; + +======================= +Required Node Structure +======================= +CDM HW node provides interface for camera clients through +to CDM interface node. + +- cell-index + Usage: required + Value type: + Definition: Node instance number. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam480-cpas-cdm0", "qcom,cam480-cpas-cdm1" + "qcom,cam170-cpas-cdm0" or "qcom,cam480-cpas-cdm2". + +- label + Usage: required + Value type: + Definition: Should be "cpas-cdm". + +- reg-names + Usage: required + Value type: + Definition: Name of the register resources. + +- reg + Usage: required + Value type: + Definition: Register values. + +- reg-cam-base + Usage: required + Value type: + Definition: Offset of the register space compared to + to Camera base register space. + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: optional + Value type: + Definition: Interrupt associated with CDM HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for CDM HW. + +- camss-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CDM HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for CDM HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- cdm-client-names + Usage: required + Value type: + Definition: List of Clients supported by CDM HW node. + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels. + Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. + +Example: + qcom,cpas-cdm0@ac48000 { + cell-index = <0>; + compatible = "qcom,cam480-cpas-cdm0"; + label = "cpas-cdm0"; + reg = <0xac48000 0x1000>; + reg-names = "cpas-cdm"; + interrupts = <0 461 0>; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "soc_ahb_clk", + "titan_top_ahb_clk", + "cam_axi_clk", + "camcc_slow_ahb_clk_src", + "cpas_top_ahb_clk", + "camnoc_axi_clk"; + clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; + qcom,clock-rates = <0 80000000 80000000 80000000 80000000 80000000>; + cdm-client-names = "ife"; + clock-cntl-level = "turbo"; + status = "ok"; + }; diff --git a/bindings/msm-cam-cpas.txt b/bindings/msm-cam-cpas.txt new file mode 100644 index 000000000000..34d251569dbb --- /dev/null +++ b/bindings/msm-cam-cpas.txt @@ -0,0 +1,398 @@ +* Qualcomm Technologies, Inc. MSM Camera CPAS + +The MSM camera CPAS device provides dependency definitions for +enabling Camera CPAS HW and provides the Client definitions +for all HW blocks that use CPAS driver for BW voting. These +definitions consist of various properties that define the list +of clients supported, AHB, AXI master-slave IDs used for BW +voting. + +======================= +Required Node Structure +======================= +The camera CPAS device must be described in five levels. The first level has +general description of cpas including compatibility, interrupts, power info +etc. +The second level deals with information related to CPAS clients and how +the BW should be calculated. For simplicity in BW vote consolidation, the +grouping of granular votes pertaining to CPAS clients is represented as nodes +at four CAMNOC levels. The nodes at a particular level have some common +properties such as traffic merge type which indicates whether the votes at a +node have to be summed up, sum divided by two or taken max of all. CAMNOC Level +zero node usually represents granular vote info for clients. CAMNOC Level one +represents nodes which are clubbed together by arbiter in CAMNOC diagram. CAMNOC +Level two represents consolidated read and write nodes for RT and NRT paths. +CAMNOC Level three provides axi port information and these have nodes where all +paths from clients eventually converge according to their properties. This +includes master-slave IDs, ab, ib values for mnoc, camnoc bus interface + +================================== +First Level Node - CAM CPAS device +================================== +- cell-index + Usage: required + Value type: + Definition: Node instance number. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-cpas". + +- label + Usage: required + Value type: + Definition: Should be "cpas". + +- arch-compat + Usage: required + Value type: + Definition: Should be "cpas_top" or "camss_top". + +- reg-names + Usage: required + Value type: + Definition: Name of the register resources. + +- reg + Usage: required + Value type: + Definition: Register values. + +- reg-cam-base + Usage: required + Value type: + Definition: Offset of the register space compared to + to Camera base register space. + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: optional + Value type: + Definition: Interrupt associated with CAMNOC HW. + +- qcom,cpas-hw-ver + Usage: required + Value type: + Definition: CAM HW Version information. + +- camnoc-axi-min-ib-bw + Usage: optional + Value type: + Definition: Min camnoc axi bw for the given target. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for CPAS HW. + +- camss-vdd-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CPAS HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for CPAS HW. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels. + Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. + +- control-camnoc-axi-clk + Usage: optional + Value type: + Definition: Bool property specifying whether to control camnoc axi + clock from cpas driver. + +- camnoc-bus-width + Usage: required if control-camnoc-axi-clk is enabled + Value type: + Definition: camnoc bus width. + +- camnoc-axi-clk-bw-margin-perc + Usage: optional + Value type: + Definition: Percentage value to be added to camnoc bw while calculating + camnoc axi clock frequency. + +- qcom,msm-bus,name +- qcom,msm-bus,num-cases +- qcom,msm-bus,num-paths +- qcom,msm-bus,vectors-KBps + Please refer Documentation/devicetree/bindings/arm/msm/msm_bus.txt + for the properties above. + +- vdd-corners + Usage: required + Value type: + Definition: List of vdd corners to map for ahb level. + +- vdd-corner-ahb-mapping + Usage: required + Value type: + Definition: List of ahb level strings corresponds to vdd-corners. + Supported strings: suspend, svs, nominal, turbo + +- client-id-based + Usage: required + Value type: + Definition: Bool property specifying whether CPAS clients are ID based. + +- client-names + Usage: required + Value type: + Definition: List of Clients supported by CPAS. + +- client-bus-camnoc-based + Usage: optional + Value type: + Definition: Bool property specifying whether Clients are connected + through CAMNOC for AXI access. + +=================================================================== +Third Level Node - CAMNOC Level nodes +=================================================================== +- level-index + Usage: required + Value type: + Definition: Number representing level index for ndoes at current CAMNOC level + +- camnoc-max-needed + Usage: optional + Value type: + Definition: Bool property for all votes at current level to be taken maximum + for CAMNOC BW calculation. + +=================================================================== +Fourth Level Node - Generic CAMNOC node properties +=================================================================== +- cell-index + Usage: required + Value type: + Definition: Unique index of node to be used by CPAS driver. + +- node-name + Usage: required + Value type: + Definition: Unique name representing this node. + +- path-data-type + Usage: required if a CAMNOC Level 0 Node + Value type: + Definition: Type of path data for a specific client. + Supported : CAM_CPAS_PATH_DATA_IFE_LINEAR, CAM_CPAS_PATH_DATA_ALL, etc. + Please refer dt-bindings/msm/msm-camera.h for all supported + definitions. + +- path-transaction-type + Usage: required if a CAMNOC Level 0 Node + Value type: + Definition: Type of path transaction for a specific client. + Supported : CAM_CPAS_TRANSACTION_READ, CAM_CPAS_TRANSACTION_WRITE + +- client-name + Usage: required if a CAMNOC Level 0 Node + Value type: + Definition: Name of the client with above properties. + Supported : From "client-names" property in CPAS node + +- constituent-paths + Usage: optional, applicable only to CAMNOC Level 0 Nodes + Value type: + Definition: List of constituents of path data type of current node. + Supported : CAM_CPAS_PATH_DATA_IFE_VID, CAM_CPAS_PATH_DATA_IFE_DISP, etc. + Please refer dt-bindings/msm/msm-camera.h for all supported + definitions. + +- traffic-merge-type + Usage: required if NOT a CAMNOC Level 0 Node + Value type: + Definition: Type of traffic merge for that node. + Supported : CAM_CPAS_TRAFFIC_MERGE_SUM, CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE. + +- parent-node + Usage: required for all except CAMNOC Level 3 Nodes + Value type: + Definition: Parent node of this node. Parent node must be at least + one level above the current level. + +- bus-width-factor + Usage: optional + Value type: + Definition: For bus width factor consideration in CAMNOC BW calculation + +- qcom,axi-port-name + Usage: required at CAMNOC Level 3 + Value type: + Definition: Name of the AXI Port. + +- ib-bw-voting-needed + Usage: optional + Value type: + Definition: Bool property indicating axi port requires instantaneous bandwidth + +=================================================================== +Fifth Level Node - CAM AXI Bus Properties +=================================================================== +- qcom,msm-bus,name +- qcom,msm-bus,num-cases +- qcom,msm-bus,num-paths +- qcom,msm-bus,vectors-KBps + Please refer Documentation/devicetree/bindings/arm/msm/msm_bus.txt + for the properties above. + +- qcom,msm-bus-vector-dyn-vote + Usage: optional + Value type: + Definition: Bool property specifying whether this bus client + is dynamic vote based. + +Example: + + qcom,cam-cpas@ac40000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0xac40000 0x1000>, + <0xac42000 0x5000>; + reg-cam-base = <0x40000 0x42000>; + interrupt-names = "cpas_camnoc"; + interrupts = <0 459 0>; + qcom,cpas-hw-ver = <0x170100>; /* Titan v170 v1.0.0 */ + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = "gcc_ahb_clk", + "gcc_axi_clk", + "soc_ahb_clk", + "cpas_ahb_clk", + "slow_ahb_clk_src", + "camnoc_axi_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "slow_ahb_clk_src"; + clock-rates = <0 0 0 0 80000000 0>; + clock-cntl-level = "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <10>; + qcom,msm-bus,name = "cam_ahb"; + qcom,msm-bus,num-cases = <4>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + , + , + ; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "csiphy5", "cci0", "cci1", + "csid0", "csid1", "csid2", "csid3", + "csid4", "csid5", "csid6", + "ife0", "ife1", "ife2", "ife3", "custom0", + "ipe0", "cam-cdm-intf0", "cpas-cdm0", "cpas-cdm1", + "cpas-cdm2", + "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", + "fd0"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_rd_wr_sum: level3-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_0"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + }; + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt0_wr: level2-rt0-wr { + cell-index = <3>; + node-name = "level2-rt0-wr"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + }; + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr0: level1-rt0-wr0 { + cell-index = <8>; + node-name = "level1-rt0-wr0"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + }; + level0-nodes { + level-index = <0>; + ife0_ubwc_stats_wr: ife0-ubwc-stats-wr { + cell-index = <16>; + node-name = "ife0-ubwc-stats-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + }; + }; + }; + diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt new file mode 100644 index 000000000000..f67f4ef7986a --- /dev/null +++ b/bindings/msm-cam-csiphy.txt @@ -0,0 +1,117 @@ +* Qualcomm Technologies, Inc. MSM CSI Phy + +======================= +Required Node Structure +======================= +The camera CSIPHY node must be described in First level of device nodes. The +first level describe the overall CSIPHY node structure. + +====================================== +First Level Node - CSIPHY device +====================================== + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,csiphy-v1.0", + "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", + "qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy". + +- cell-index: csiphy hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + +- reg + Usage: required + Value type: + Definition: offset and length of the register set + for the device for the csiphy operating in + compatible mode. + +- reg-names + Usage: required + Value type: + Definition: Should specify relevant names to each + reg property defined. + +- reg-cam-base + Usage: required + Value type: + Definition: offset of CSIPHY in camera hw block + +- interrupts + Usage: required + Value type: + Definition: Interrupt associated with CCI HW. + +- interrupt-names + Usage: required + Value type: + Definition: Name of the interrupt. + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CSIPHY HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clock rates in Hz for CSIPHY HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- clocks + Usage: required + Value type: + Definition: all clock phandle and source clocks. + +- regulator-names + Usage: required + Value type: + Definition: name of the voltage regulators required for the device. + +- gdscr-supply + Usage: required + Value type: + Definition: should contain gdsr regulator used for CSIPHY clocks. + +- mipi-csi-vdd-supply + Usage: required + Value type: + Definition: should contain phandle for mipi-csi-vdd regulator used for + CSIPHY device. + +- csi-vdd-voltage + Usage: required + Value type: + Definition: should contain required voltage for csi-vdd supply for CSIPHY. + +Example: + +qcom,csiphy@ac65000 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.0", "qcom,csiphy"; + reg = <0xac65000 0x200>; + reg-cam-base = <0x65000>; + reg-names = "csiphy"; + interrupts = <0 477 0>; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen"; + mipi-csi-vdd-supply = <&pm8998_l1>; + csi-vdd-voltage = <1200000>; + gdscr-supply = <&titan_top_gdsc>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", "csiphy0_clk", + "csi0phytimer_clk_src", "csi0phytimer_clk"; + clock-rates = <400000000 0 300000000 0>; + clock-cntl-level = "turbo"; + status = "ok"; +}; diff --git a/bindings/msm-cam-eeprom.txt b/bindings/msm-cam-eeprom.txt new file mode 100644 index 000000000000..d77f337a9e3c --- /dev/null +++ b/bindings/msm-cam-eeprom.txt @@ -0,0 +1,503 @@ +* Qualcomm Technologies, Inc. MSM EEPROM + +EEPROM is a one time programmed(OTP) device that stores the calibration data +use for camera sensor. It may either be integrated in the sensor module or in +the sensor itself. As a result, the power, clock and GPIOs may be the same as +the camera sensor. The following describes the page block map, power supply, +clock, GPIO and power on sequence properties of the EEPROM device. + +======================================================= +Required Node Structure if probe happens from userspace +======================================================= +The EEPROM device is described in one level of the device node. + +====================================== +First Level Node - CAM EEPROM device +====================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,eeprom". + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg + Usage: required + Value type: + Definition: Register values. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for EEPROM HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- rgltr-cntrl-support + Usage: required + Value type: + Definition: This property specifies if the regulator control is supported + e.g. rgltr-min-voltage. + +- rgltr-min-voltage + Usage: required + Value type: + Definition: should contain minimum voltage level for regulators + mentioned in regulator-names property. + +- rgltr-max-voltage + Usage: required + Value type: + Definition: should contain maximum voltage level for regulators + mentioned in regulator-names property. + +- rgltr-load-current + Usage: required + Value type: + Definition: should contain the maximum current in microamps required for + the regulators mentioned in regulator-names property. + +- gpio-no-mux + Usage: required + Value type: + Definition: should specify the gpio mux type. + +- gpios + Usage: required + Value type: + Definition: should specify the gpios to be used for the eeprom. + +- gpio-reset + Usage: required + Value type: + Definition: should specify the reset gpio index. + +- gpio-standby + Usage: required + Value type: + Definition: should specify the standby gpio index. + +- gpio-req-tbl-num + Usage: required + Value type: + Definition: should specify the gpio table index. + +- gpio-req-tbl-flags + Usage: required + Value type: + Definition: should specify the gpio functions. + +- gpio-req-tbl-label + Usage: required + Value type: + Definition: should specify the gpio labels. + +- sensor-position + Usage: required + Value type: + Definition: should contain the mount angle of the camera sensor. + +- cci-device + Usage: required + Value type: + Definition: should contain i2c device id to be used for this camera + sensor + +- cci-master + Usage: required + Value type: + Definition: should contain i2c master id to be used for this camera + sensor. + +- sensor-mode + Usage: required + Value type: + Definition: should contain sensor mode supported. + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for EEPROM HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for EEPROM HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: says what all different clock levels eeprom node has. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +Example: + + eeprom0: qcom,eeprom@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8998_l5>; + cam_vio-supply = <&pm8998_lvs1>; + regulator-names = "cam_vdig", "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1200000 0>; + rgltr-max-voltage = <1200000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + gpios = <&msmgpio 26 0>, + <&msmgpio 37 0>, + <&msmgpio 36 0>; + gpio-reset = <1>; + gpio-standby = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1", + "CAM_STANDBY"; + sensor-position = <0>; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + +======================================================= +Required Node Structure if probe happens from kernel +======================================================= +The EEPROM device is described in one level of the device node. + +====================================== +First Level Node - CAM EEPROM device +====================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,eeprom". + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg + Usage: required + Value type: + Definition: Register values. + +- qcom,eeprom-name + Usage: required + Value type: + Definition: Name of the EEPROM HW. + +- qcom,slave-addr + Usage: required + Value type: + Definition: Slave address of the EEPROM HW. + +- qcom,num-blocks + Usage: required + Value type: + Definition: Total block number that eeprom contains. + +- qcom,pageX + Usage: required + Value type: + Definition: List of values specifying page size, start address, + address type, data, data type, delay in ms. + size 0 stand for non-paged. + +- qcom,pollX + Usage: required + Value type: + Definition: List of values specifying poll size, poll reg address, + address type, data, data type, delay in ms. + size 0 stand for not used. + +- qcom,memX + Usage: required + Value type: + Definition: List of values specifying memory size, start address, + address type, data, data type, delay in ms. + size 0 stand for not used. + +- qcom,saddrX + Usage: required + Value type: + Definition: property should specify the slave address for block (%d). + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for EEPROM HW. + +- qcom,cmm-data-support + Usage: required + Value type: + Definition: Camera MultiModule data capability flag.. + +- qcom,cmm-data-compressed + Usage: required + Value type: + Definition: Camera MultiModule data compression flag. + +- qcom,cmm-data-offset + Usage: required + Value type: + Definition: Camera MultiModule data start offset. + +- qcom,cmm-data-size + Usage: required + Value type: + Definition: Camera MultiModule data size. + +- qcom,cam-power-seq-type + Usage: required + Value type: + Definition: should specify the power on sequence types. + +- qcom,cam-power-seq-val + Usage: required + Value type: + Definition: should specify the power on sequence values. + +- qcom,cam-power-seq-cfg-val + Usage: required + Value type: + Definition: should specify the power on sequence config values. + +- qcom,cam-power-seq-delay + Usage: required + Value type: + Definition: should specify the power on sequence delay time in ms. + +- spiop-read + Usage: required + Value type: + Definition: this array provides SPI read operation related data. + +- spiop-readseq + Usage: required + Value type: + Definition: this array provides SPI read sequence operation realted data. + +- spiop-queryid + Usage: required + Value type: + Definition: this array provides SPI query eeprom id operation related data. + +- spiop-pprog: + Usage: required + Value type: + Definition: this array provides SPI page program operation related data. + +- spiop-wenable + Usage: required + Value type: + Definition: this array provides SPI write enable operation related data. + +- spiop-readst + Usage: required + Value type: + Definition: this array provides SPI read destination operation related data. + +- spiop-erase + Usage: required + Value type: + Definition: this array provides SPI erase operation related data. + +- eeprom-idx + Usage: required + Value type: + Definition: this array provides eeprom id realted data. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- rgltr-cntrl-support + Usage: required + Value type: + Definition: This property specifies if the regulator control is supported + e.g. rgltr-min-voltage. + +- rgltr-min-voltage + Usage: required + Value type: + Definition: should contain minimum voltage level for regulators + mentioned in regulator-names property. + +- rgltr-max-voltage + Usage: required + Value type: + Definition: should contain maximum voltage level for regulators + mentioned in regulator-names property. + +- rgltr-load-current + Usage: required + Value type: + Definition: should contain the maximum current in microamps required for + the regulators mentioned in regulator-names property. + +- gpio-no-mux + Usage: required + Value type: + Definition: should specify the gpio mux type. + +- gpios + Usage: required + Value type: + Definition: should specify the gpios to be used for the eeprom. + +- gpio-reset + Usage: required + Value type: + Definition: should specify the reset gpio index. + +- gpio-standby + Usage: required + Value type: + Definition: should specify the standby gpio index. + +- gpio-req-tbl-num + Usage: required + Value type: + Definition: should specify the gpio table index. + +- gpio-req-tbl-flags + Usage: required + Value type: + Definition: should specify the gpio functions. + +- gpio-req-tbl-label + Usage: required + Value type: + Definition: should specify the gpio labels. + +- sensor-position + Usage: required + Value type: + Definition: should contain the mount angle of the camera sensor. + +- cci-device + Usage: required + Value type: + Definition: should contain i2c device id to be used for this camera + sensor + +- cci-master + Usage: required + Value type: + Definition: should contain i2c master id to be used for this camera + sensor. + +- sensor-mode + Usage: required + Value type: + Definition: should contain sensor mode supported. + +- clock-cntl-level + Usage: required + Value type: + Definition: says what all different clock levels eeprom node has. + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for EEPROM HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for EEPROM HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +Example: + + eeprom0: qcom,eeprom@0 { + cell-index = <0>; + reg = <0x0>; + qcom,eeprom-name = "msm_eeprom"; + eeprom-id0 = <0xF8 0x15>; + eeprom-id1 = <0xEF 0x15>; + eeprom-id2 = <0xC2 0x36>; + eeprom-id3 = <0xC8 0x15>; + compatible = "qcom,eeprom"; + qcom,slave-addr = <0x60>; + qcom,num-blocks = <2>; + qcom,page0 = <1 0x100 2 0x01 1 1>; + qcom,poll0 = <0 0x0 2 0 1 1>; + qcom,mem0 = <0 0x0 2 0 1 0>; + qcom,page1 = <1 0x0200 2 0x8 1 1>; + qcom,pageen1 = <1 0x0202 2 0x01 1 10>; + qcom,poll1 = <0 0x0 2 0 1 1>; + qcom,mem1 = <32 0x3000 2 0 1 0>; + qcom,saddr1 = <0x62>; + qcom,cmm-data-support; + qcom,cmm-data-compressed; + qcom,cmm-data-offset = <0>; + qcom,cmm-data-size = <0>; + spiop-read = <0x03 3 0 0 0>; + spiop-readseq = <0x03 3 0 0 0>; + spiop-queryid = <0x90 3 0 0 0>; + spiop-pprog = <0x02 3 0 3 100>; + spiop-wenable = <0x06 0 0 0 0>; + spiop-readst = <0x05 0 0 0 0>; + spiop-erase = <0x20 3 0 10 100>; + qcom,cam-power-seq-type = "sensor_vreg", + "sensor_vreg", "sensor_clk", + "sensor_gpio", "sensor_gpio"; + qcom,cam-power-seq-val = "cam_vdig", + "cam_vio", "sensor_cam_mclk", + "sensor_gpio_reset", + "sensor_gpio_standby"; + qcom,cam-power-seq-cfg-val = <1 1 24000000 1 1>; + qcom,cam-power-seq-delay = <1 1 5 5 10>; + cam_vdig-supply = <&pm8998_l5>; + cam_vio-supply = <&pm8998_lvs1>; + regulator-names = "cam_vdig", "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1200000 0>; + rgltr-max-voltage = <1200000 0>; + rgltr-load-current = <0 80000 105000 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 26 0>, + <&msmgpio 37 0>, + <&msmgpio 36 0>; + gpio-reset = <1>; + gpio-standby = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1", + "CAM_STANDBY"; + sensor-position = <0>; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-cntl-level = "turbo"; + clock-names = "cam_clk"; + clock-rates = <24000000>; + }; diff --git a/bindings/msm-cam-fd.txt b/bindings/msm-cam-fd.txt new file mode 100644 index 000000000000..51b0babaa709 --- /dev/null +++ b/bindings/msm-cam-fd.txt @@ -0,0 +1,154 @@ +* Qualcomm Technologies, Inc. MSM Camera FD + +The MSM camera Face Detection device provides dependency definitions +for enabling Camera FD HW. MSM camera FD is implemented in multiple +device nodes. The root FD device node has properties defined to hint +the driver about the FD HW nodes available during the probe sequence. +Each node has multiple properties defined for interrupts, clocks and +regulators. + +======================= +Required Node Structure +======================= +FD root interface node takes care of the handling Face Detection high level +driver handling and controls underlying FD hardware present. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-fd". + +- compat-hw-name + Usage: required + Value type: + Definition: Should be "qcom,fd". + +- num-fd + Usage: required + Value type: + Definition: Number of supported FD HW blocks. + +Example: + qcom,cam-fd { + compatible = "qcom,cam-fd"; + compat-hw-name = "qcom,fd"; + num-fd = <1>; + }; + +======================= +Required Node Structure +======================= +FD Node provides interface for Face Detection hardware driver +about the device register map, interrupt map, clocks, regulators. + +- cell-index + Usage: required + Value type: + Definition: Node instance number. + +- compatible + Usage: required + Value type: + Definition: Should be one of "qcom,fd41", "qcom,fd501", + "qcom,fd600". + +- reg-names + Usage: optional + Value type: + Definition: Name of the register resources. + +- reg + Usage: optional + Value type: + Definition: Register values. + +- reg-cam-base + Usage: optional + Value type: + Definition: Offset of the register space compared to + to Camera base register space. + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: optional + Value type: + Definition: Interrupt line associated with FD HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for FD HW. + +- camss-vdd-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for FD HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks required for FD HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels. + Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. + +Examples: + cam_fd: qcom,fd@ac5a000 { + cell-index = <0>; + compatible = "qcom,fd600"; + reg-names = "fd_core", "fd_wrapper"; + reg = <0xac5a000 0x1000>, + <0xac5b000 0x400>; + reg-cam-base = <0x5a000 0x5b000>; + interrupt-names = "fd"; + interrupts = <0 462 0>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = "gcc_ahb_clk", + "gcc_axi_clk", + "soc_ahb_clk", + "cpas_ahb_clk", + "camnoc_axi_clk", + "fd_core_clk_src", + "fd_core_clk", + "fd_core_uar_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_FD_CORE_CLK_SRC>, + <&clock_camcc CAM_CC_FD_CORE_CLK>, + <&clock_camcc CAM_CC_FD_CORE_UAR_CLK>; + src-clock-name = "fd_core_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 0 0 0 0 400000000 0 0>; + }; diff --git a/bindings/msm-cam-icp.txt b/bindings/msm-cam-icp.txt new file mode 100644 index 000000000000..e22e1f99f670 --- /dev/null +++ b/bindings/msm-cam-icp.txt @@ -0,0 +1,287 @@ +* Qualcomm Technologies, Inc. MSM Camera ICP + +The MSM camera ICP devices are implemented multiple device nodes. +The root icp device node has properties defined to hint the driver +about the number of A5,IPE and BPS nodes available during the +probe sequence. Each node has multiple properties defined +for interrupts, clocks and regulators. + +======================= +Required Node Structure +======================= +ICP root interface node takes care of the handling account for number +of A5, IPE and BPS devices present on the hardware. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-icp". + +- compat-hw-name + Usage: required + Value type: + Definition: Should be "qcom,a5" or "qcom,ipe0" or "qcom,ipe1" or "qcom,bps". + +- num-a5 + Usage: required + Value type: + Definition: Number of supported A5 processors. + +- num-ipe + Usage: required + Value type: + Definition: Number of supported IPE HW blocks. + +- num-bps + Usage: required + Value type: + Definition: Number of supported BPS HW blocks. + +Example: + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", "qcom,ipe0", "qcom,ipe1", "qcom,bps"; + num-a5 = <1>; + num-ipe = <2>; + num-bps = <1>; + status = "ok"; + }; + +======================= +Required Node Structure +======================= +A5/IPE/BPS Node's provides interface for Image Control Processor driver +about the A5 register map, interrupt map, clocks, regulators +and name of firmware image. + +- cell-index + Usage: required + Value type: + Definition: Node instance number. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-a5" or "qcom,cam-ipe" or "qcom,cam-bps". + +- reg-names + Usage: optional + Value type: + Definition: Name of the register resources. + +- reg + Usage: optional + Value type: + Definition: Register values. + +- reg-cam-base + Usage: optional + Value type: + Definition: Register values. + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: optional + Value type: + Definition: Interrupt associated with CDM HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for CDM HW. + +- camss-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CDM HW. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for CDM HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels. + Supported strings: lowsvs, svs, svs_l1, nominal, turbo. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- fw_name + Usage: optional + Value type: + Definition: Name of firmware image. + +- ubwc-ipe-fetch-cfg + Usage: required + Value type: + Definition: UBWC IPE fetch configuration based on DDR device type. + +- ubwc-ipe-write-cfg + Usage: required + Value type: + Definition: UBWC IPE write configuration based on DDR device type. + +- ubwc-bps-fetch-cfg + Usage: required + Value type: + Definition: UBWC BPS fetch configuration based on DDR device type. + +- ubwc-bps-write-cfg + Usage: required + Value type: + Definition: UBWC BPS write configuration based on DDR device type. + +- ubwc-cfg + Usage: optional + Value type: + Definition: UBWC configuration, this is mandatory if above + ipe/bps ubwc properties are not used. + +Examples: +a5: qcom,a5@ac00000 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + interrupts = <0 463 0>; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = "gcc_cam_ahb_clk", + "gcc_cam_axi_clk", + "soc_ahb_clk", + "cpas_ahb_clk", + "camnoc_axi_clk", + "icp_apb_clk", + "icp_atb_clk", + "icp_clk", + "icp_clk_src", + "icp_cti_clk", + "icp_ts_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_ICP_APB_CLK>, + <&clock_camcc CAM_CC_ICP_ATB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CTI_CLK>, + <&clock_camcc CAM_CC_ICP_TS_CLK>; + + clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>; + clock-cntl-level = "turbo"; + fw_name = "CAMERA_ICP.elf"; + /* "ubwc-cfg" is not used, even if defined the new property + tags will be priortized. If the new properties are not used + please specify "ubwc-cfg" in that case */ + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083> + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + +qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&ipe_0_gdsc>; + clock-names = "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk", + "ipe_0_clk_src"; + src-clock-name = "ipe_0_clk_src"; + clocks = <&clock_camcc CAM_CC_IPE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IPE_0_AXI_CLK>, + <&clock_camcc CAM_CC_IPE_0_CLK>, + <&clock_camcc CAM_CC_IPE_0_CLK_SRC>; + + clock-rates = <0 0 0 0 240000000>, + <0 0 0 0 404000000>, + <0 0 0 0 480000000>, + <0 0 0 0 538000000>, + <0 0 0 0 600000000>; + clock-cntl-level = "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; +}; + +qcom,ipe1 { + cell-index = <1>; + compatible = "qcom,cam-ipe"; + regulator-names = "ipe1-vdd"; + ipe1-vdd-supply = <&ipe_1_gdsc>; + clock-names = "ipe_1_ahb_clk", + "ipe_1_areg_clk", + "ipe_1_axi_clk", + "ipe_1_clk", + "ipe_1_clk_src"; + src-clock-name = "ipe_1_clk_src"; + clocks = <&clock_camcc CAM_CC_IPE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IPE_1_AXI_CLK>, + <&clock_camcc CAM_CC_IPE_1_CLK>, + <&clock_camcc CAM_CC_IPE_1_CLK_SRC>; + + clock-rates = <0 0 0 0 240000000>, + <0 0 0 0 404000000>, + <0 0 0 0 480000000>, + <0 0 0 0 538000000>, + <0 0 0 0 600000000>; + clock-cntl-level = "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; +}; + +bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&bps_gdsc>; + clock-names = "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk", + "bps_clk_src"; + src-clock-name = "bps_clk_src"; + clocks = <&clock_camcc CAM_CC_BPS_AHB_CLK>, + <&clock_camcc CAM_CC_BPS_AREG_CLK>, + <&clock_camcc CAM_CC_BPS_AXI_CLK>, + <&clock_camcc CAM_CC_BPS_CLK>, + <&clock_camcc CAM_CC_BPS_CLK_SRC>; + + clock-rates = <0 0 0 0 200000000>, + <0 0 0 0 404000000>, + <0 0 0 0 480000000>, + <0 0 0 0 600000000>, + <0 0 0 0 600000000>; + clock-cntl-level = "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; +}; diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt new file mode 100644 index 000000000000..9d1af9523e01 --- /dev/null +++ b/bindings/msm-cam-ife-csid.txt @@ -0,0 +1,121 @@ +* Qualcomm Technologies, Inc. MSM Camera IFE CSID + +Camera IFE CSID device provides the definitions for enabling +the IFE CSID hardware. It also provides the functions for the client +to control the IFE CSID hardware. + +======================= +Required Node Structure +======================= +The IFE CSID device is described in one level of the device node. + +====================================== +First Level Node - CAM IFE CSID device +====================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,csid170", "qcom,csid175", "qcom,csid175_200", + "qcom,csid480", "qcom,csid-lite170", "qcom,csid-lite175" + or "qcom,csid-lite480". + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg-names + Usage: required + Value type: + Definition: Should be "csid". + +- reg + Usage: required + Value type: + Definition: Register values. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with IFE CSID HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for IFE CSID HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for IFE CSID HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for IFE CSID HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +Example: + + qcom,csid0@acb3000 { + cell-index = <0>; + compatible = "qcom,csid480"; + reg = <0xacb3000 0x1000>; + reg-names = "csid"; + interrupts = <0 464 0>; + interrupt-names = "csid"; + vdd-names = "camss", "ife0"; + camss-supply = <&titan_top_gdsc>; + ife0-supply = <&ife_0_gdsc>; + clock-names = "soc_ahb_clk", + "cpas_ahb_clk", + "slow_ahb_clk_src", + "ife_clk", + "ife_clk_src", + "ife_csid_clk", + "ife_csid_clk_src", + "ife_cphy_rx_clk", + "cphy_rx_clk_src"; + clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>; + clock-rates = <0 0 80000000 0 320000000 0 384000000 0 384000000>; + src-clock-name = "ife_csid_clk_src"; + status = "ok"; + }; diff --git a/bindings/msm-cam-isp.txt b/bindings/msm-cam-isp.txt new file mode 100644 index 000000000000..896eb9f4d12b --- /dev/null +++ b/bindings/msm-cam-isp.txt @@ -0,0 +1,36 @@ +* Qualcomm Technologies, Inc. MSM Camera ISP + +The MSM camera ISP driver provides the definitions for enabling +the Camera ISP hadware. It provides the functions for the Client to +control the ISP hardware. + +======================= +Required Node Structure +======================= +The camera ISP device is described in one level of device node. + +================================== +First Level Node - CAM ISP device +================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-isp". + +- arch-compat + Usage: required + Value type: + Definition: Should be "vfe" or "ife". + +- ubwc-static-cfg + Usage: optional + Value type: + Definition: IFE UBWC static configuration based on DDR device type. + +Example: + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; diff --git a/bindings/msm-cam-jpeg.txt b/bindings/msm-cam-jpeg.txt new file mode 100644 index 000000000000..73e99b25cd8f --- /dev/null +++ b/bindings/msm-cam-jpeg.txt @@ -0,0 +1,186 @@ +* Qualcomm Technologies, Inc. MSM Camera JPEG + +The MSM camera JPEG devices are implemented multiple device nodes. +The root JPEG device node has properties defined to hint the driver +about the number of Encoder and DMA nodes available during the +probe sequence. Each node has multiple properties defined +for interrupts, clocks and regulators. + +======================= +Required Node Structure +======================= +JPEG root interface node takes care of the handling account for number +of Encoder and DMA devices present on the hardware. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-jpeg". + +- compat-hw-name + Usage: required + Value type: + Definition: Should be "qcom,jpegenc" or "qcom,jpegdma". + +- num-jpeg-enc + Usage: required + Value type: + Definition: Number of supported Encoder HW blocks. + +- num-jpeg-dma + Usage: required + Value type: + Definition: Number of supported DMA HW blocks. + +Example: + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + +======================= +Required Node Structure +======================= +Encoder/DMA Nodes provide interface for JPEG driver about +the device register map, interrupt map, clocks and regulators. + +- cell-index + Usage: required + Value type: + Definition: Node instance number. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam_jpeg_enc". + +- reg-names + Usage: optional + Value type: + Definition: Name of the register resources. + +- reg + Usage: optional + Value type: + Definition: Register values. + +- reg-cam-base + Usage: optional + Value type: + Definition: Offset of the register space compared to + to Camera base register space. + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: optional + Value type: + Definition: Interrupt associated with JPEG HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for JPEG HW. + +- camss-vdd-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for JPEG HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for JPEG HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels. + Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. + +Examples: + cam_jpeg_enc: qcom,jpegenc@ac4e000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac4e000 0x4000>; + reg-cam-base = <0x4e000>; + interrupt-names = "jpeg"; + interrupts = <0 474 0>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = "camera_ahb", + "camera_axi", + "soc_ahb_clk", + "cpas_ahb_clk", + "camnoc_axi_clk", + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + + clock-rates = <0 0 0 0 0 600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma@0xac52000{ + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac52000 0x4000>; + reg-cam-base = <0x52000>; + interrupt-names = "jpegdma"; + interrupts = <0 475 0>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = "camera_ahb", + "camera_axi", + "soc_ahb_clk", + "cpas_ahb_clk", + "camnoc_axi_clk", + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + + clock-rates = <0 0 0 0 0 600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; diff --git a/bindings/msm-cam-lrme.txt b/bindings/msm-cam-lrme.txt new file mode 100644 index 000000000000..409be3f08de4 --- /dev/null +++ b/bindings/msm-cam-lrme.txt @@ -0,0 +1,148 @@ +* Qualcomm Technologies, Inc. MSM Camera LRME + +The MSM camera Low Resolution Motion Estimation device provides dependency +definitions for enabling Camera LRME HW. MSM camera LRME is implemented in +multiple device nodes. The root LRME device node has properties defined to +hint the driver about the LRME HW nodes available during the probe sequence. +Each node has multiple properties defined for interrupts, clocks and +regulators. + +======================= +Required Node Structure +======================= +LRME root interface node takes care of the handling LRME high level +driver handling and controls underlying LRME hardware present. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-lrme" + +- compat-hw-name + Usage: required + Value type: + Definition: Should be "qcom,lrme" + +- num-lrme + Usage: required + Value type: + Definition: Number of supported LRME HW blocks + +Example: + qcom,cam-lrme { + compatible = "qcom,cam-lrme"; + compat-hw-name = "qcom,lrme"; + num-lrme = <1>; + }; + +======================= +Required Node Structure +======================= +LRME Node provides interface for Low Resolution Motion Estimation hardware +driver about the device register map, interrupt map, clocks, regulators. + +- cell-index + Usage: required + Value type: + Definition: Node instance number + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,lrme" + +- reg-names + Usage: optional + Value type: + Definition: Name of the register resources + +- reg + Usage: optional + Value type: + Definition: Register values + +- reg-cam-base + Usage: optional + Value type: + Definition: Offset of the register space compared to + to Camera base register space + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt + +- interrupts + Usage: optional + Value type: + Definition: Interrupt line associated with LRME HW + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for LRME HW + +- camss-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names" + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for LRME HW + +- clocks + Usage: required + Value type: + Definition: List of clocks required for LRME HW + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels + Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name + +Examples: + cam_lrme: qcom,lrme@ac6b000 { + cell-index = <0>; + compatible = "qcom,lrme"; + reg-names = "lrme"; + reg = <0xac6b000 0xa00>; + reg-cam-base = <0x6b000>; + interrupt-names = "lrme"; + interrupts = <0 476 0>; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "camera_ahb", + "camera_axi", + "soc_ahb_clk", + "cpas_ahb_clk", + "camnoc_axi_clk", + "lrme_clk_src", + "lrme_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_LRME_CLK_SRC>, + <&clock_camcc CAM_CC_LRME_CLK>; + clock-rates = <0 0 0 0 0 0 0>, + <0 0 0 0 0 19200000 19200000>, + <0 0 0 0 0 19200000 19200000>, + <0 0 0 0 0 19200000 19200000>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "lrme_core_clk_src"; + }; diff --git a/bindings/msm-cam-smmu.txt b/bindings/msm-cam-smmu.txt new file mode 100644 index 000000000000..eca2bd82ec79 --- /dev/null +++ b/bindings/msm-cam-smmu.txt @@ -0,0 +1,142 @@ +* Qualcomm Technologies, Inc. MSM Camera SMMU + +The MSM camera SMMU device provides SMMU context bank definitions +for all HW blocks that need to map IOVA to physical memory. These +definitions consist of various properties that define how the +IOVA address space is laid out for each HW block in the camera +subsystem. + +======================= +Required Node Structure +======================= +The camera SMMU device must be described in three levels of device nodes. The +first level describes the overall SMMU device. Within it, second level nodes +describe individual context banks that map different stream ids. There can +also be second level nodes describing firmware device nodes. Each HW block +such as IFE, ICP maps into these second level device nodes. All context bank +specific properties that define how the IOVA is laid out is contained within +third level device nodes within the second level device nodes. + +During the kernel initialization all the devices are probed recursively and +a device pointer is created for each context bank keeping track of the IOVA +mapping information. + +Duplicate regions of the same type are not allowed within the same +context bank. All context banks must contain an IO region at the very least. + +================================== +First Level Node - CAM SMMU device +================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,msm-cam-smmu". + +=================================================================== +Second Level Node - CAM SMMU context bank device or firmware device +=================================================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,msm-cam-smmu-cb" or "qcom,msm-cam-smmu-fw-dev". + +- memory-region + Usage: optional + Value type: + Definition: Should specify the phandle of the memory region for firmware. + allocation + +- iommus + Usage: required + Value type: + Definition: first cell is phandle of the iommu, second cell is stream id + and third cell is SMR mask. + +- label + Usage: required + Value type: + Definition: Should specify a string label to identify the context bank. + +- qcom,secure-cb + Usage: optional + Value type: boolean + Definition: Specifies if the context bank is a secure context bank. + +============================================= +Third Level Node - CAM SMMU memory map device +============================================= +- iova-region-name + Usage: required + Value type: + Definition: Should specify a string label to identify the IOVA region. + +- iova-region-start + Usage: required + Value type: + Definition: Should specify start IOVA for region. + +- iova-region-len + Usage: required + Value type: + Definition: Should specify length for IOVA region. + +- iova-region-id + Usage: required + Value type: + Definition: Should specify the numerical identifier for IOVA region. + Allowed values are: 0x00 to 0x03 + - Firmware region: 0x00 + - Shared region: 0x01 + - Scratch region: 0x02 + - IO region: 0x03 + +- iova-granularity + Usage: optional + Value type: + Definition: Should specify IOVA granularity for shared memory region. + +Example: + qcom,cam_smmu@0 { + compatible = "qcom,msm-cam-smmu"; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1078>, + <&apps_smmu 0x1020>, + <&apps_smmu 0x1028>, + <&apps_smmu 0x1040>, + <&apps_smmu 0x1048>, + <&apps_smmu 0x1030>, + <&apps_smmu 0x1050>; + label = "icp"; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 100MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x6400000>; + iova-region-id = <0x1>; + iova-granularity = <0x15>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.5 GB */ + iova-region-name = "io"; + iova-region-start = <0xd800000>; + iova-region-len = <0xd2800000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + }; diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt new file mode 100644 index 000000000000..576cce547505 --- /dev/null +++ b/bindings/msm-cam-vfe.txt @@ -0,0 +1,146 @@ +* Qualcomm Technologies, Inc. MSM Camera VFE + +Camera VFE device provides the definitions for enabling +the VFE hardware. It also provides the functions for the client +to control the VFE hardware. + +======================= +Required Node Structure +======================= +The VFE device is described in one level of the device node. + +====================================== +First Level Node - CAM VFE device +====================================== +Required properties: +- compatible + Usage: required + Value type: + Definition: Should specify the compatibility string for matching the + driver. e.g. "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", "qcom,vfe175_130", + "qcom,vfe-lite480", "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg-names + Usage: required + Value type: + Definition: Should specify the name of the register block. + +- reg + Usage: required + Value type: + Definition: Register values. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with VFE HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for VFE HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for VFE HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for VFE HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +Optional properties: +- clock-names-option + Usage: optional + Value type: + Definition: Optional clock names. + +- clocks-option + Usage: required if clock-names-option defined + Value type: + Definition: List of optinal clocks used for VFE HW. + +- clock-rates-option + Usage: required if clock-names-option defined + Value type: + Definition: List of clocks rates for optional clocks. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +- qcom,cam-cx-ipeak: + Usage: optional + Value type: + phandle - phandle of CX Ipeak device node + bit - Every bit corresponds to a client of CX Ipeak + Definition: CX Ipeak is a mitigation scheme which throttles camera frequency + if all the clients are running at their respective threshold + frequencies to limit CX peak current. + driver in the relevant register. + +Example: + qcom,vfe0@acaf000 { + cell-index = <0>; + compatible = "qcom,vfe480"; + reg-names = "ife"; + reg = <0xacaf000 0x4000>; + interrupts = <0 465 0>; + interrupt-names = "ife"; + vdd-names = "camss-vdd", "ife0-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + ife0-vdd-supply = <&ife_0_gdsc>; + clock-names = "soc_ahb_clk", + "cpas_ahb_clk", + "slow_ahb_clk_src", + "ife_clk", + "ife_clk_src", + "ife_csid_clk", + "ife_csid_clk_src", + "camnoc_axi_clk", + "ife_axi_clk", + clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, + clock-rates = <0 0 80000000 0 320000000 0 384000000 0 0 0>; + src-clock-name = "ife_clk_src"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <600000000>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>; + status = "ok"; + }; diff --git a/bindings/msm-camera-flash.txt b/bindings/msm-camera-flash.txt new file mode 100644 index 000000000000..ab81329df08e --- /dev/null +++ b/bindings/msm-camera-flash.txt @@ -0,0 +1,132 @@ +* Qualcomm Technologies, Inc. MSM FLASH + +The MSM camera Flash driver provides the definitions for +enabling and disabling LED Torch/Flash by requesting it to +PMIC/I2C/GPIO based hardware. It provides the functions for +the Client to control the Flash hardware. + +======================================================= +Required Node Structure +======================================================= +The Flash device is described in one level of the device node. + +====================================== +First Level Node - CAM FLASH device +====================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,camera-flash". + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg + Usage: required + Value type: + Definition: Register values. + +- flash-source + Usage: required + Value type: + Definition: Should contain array of phandles to Flash source nodes. + +- torch-source + Usage: required + Value type: + Definition: Should contain array of phandles to torch source nodes. + +- switch-source + Usage: Optional + Value type: + Definition: Should contain phandle to switch source nodes. + +- slave-id + Usage: optional + Value type: + Definition: should contain i2c slave address, device id address + and expected id read value. + +- cci-master + Usage: optional + Value type: + Definition: should contain i2c master id to be used for this camera + flash. + +- max-current + Usage: optional + Value type: + Definition: Max current in mA supported by flash + +- max-duration + Usage: optional + Value type: + Definition: Max duration in ms flash can glow. + +- wled-flash-support + Usage: optional + Value type: + Definition: To identity wled flash hardware support. + +- gpios + Usage: optional + Value type: + Definition: should specify the gpios to be used for the flash. + +- gpio-req-tbl-num + Usage: optional + Value type: + Definition: should specify the gpio table index. + +- gpio-req-tbl-flags + Usage: optional + Value type: + Definition: should specify the gpio functions. + +- gpio-req-tbl-label + Usage: optional + Value type: + Definition: should specify the gpio labels. + +- gpio-flash-reset + Usage: optional + Value type: + Definition: should contain index to gpio used by flash's "flash reset" pin. + +- gpio-flash-en + Usage: optional + Value type: + Definition: should contain index to gpio used by flash's "flash enable" pin. + +- gpio-flash-now + Usage: optional + Value type: + Definition: should contain index to gpio used by flash's "flash now" pin. + +Example: + +led_flash_rear: qcom,camera-flash@0 { + reg = <0x00 0x00>; + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi8998_flash0 &pmi8998_flash1>; + torch-source = <&pmi8998_torch0 &pmi8998_torch1>; + switch-source = <&pmi8998_switch0>; + wled-flash-support; + qcom,slave-id = <0x00 0x00 0x0011>; + qcom,cci-master = <0>; + gpios = <&msmgpio 23 0>, + <&msmgpio 24 0>; + <&msmgpio 25 0>; + qcom,gpio-flash-reset = <0>; + qcom,gpio-flash-en = <0>; + qcom,gpio-flash-now = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <0 0>; + qcom,gpio-req-tbl-label = "FLASH_EN", + "FLASH_NOW"; + qcom,max-current = <1500>; + qcom,max-duration = <1200>; + }; diff --git a/bindings/msm-camera.txt b/bindings/msm-camera.txt new file mode 100644 index 000000000000..04548caa330b --- /dev/null +++ b/bindings/msm-camera.txt @@ -0,0 +1,13 @@ +* Qualcomm Technologies, Inc. MSM Camera + +Required properties: +- compatible : + - "qcom,cam-req-mgr" +- qcom,sensor-manual-probe : specify if sensor probes at kernel boot time or user driven + +Example: + + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + qcom,sensor-manual-probe; + }; From 441ca4253138060e3334608a3ad54e31016ffc66 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Fri, 14 Jun 2019 15:14:39 -0700 Subject: [PATCH 003/190] ARM: dts: camera: Add support for camera hardware for Kona platforms Add support for camera for kona platforms as a part of new project. Change-Id: I3ceaa513b9bfb5cfac0f9baf1f905c8eed492e6b --- kona-camera-sensor-cdp.dtsi | 638 +++++++++++++ kona-camera-sensor-mtp.dtsi | 638 +++++++++++++ kona-camera-sensor-qrd.dtsi | 638 +++++++++++++ kona-camera.dtsi | 1698 +++++++++++++++++++++++++++++++++++ 4 files changed, 3612 insertions(+) create mode 100644 kona-camera-sensor-cdp.dtsi create mode 100644 kona-camera-sensor-mtp.dtsi create mode 100644 kona-camera-sensor-qrd.dtsi create mode 100644 kona-camera.dtsi diff --git a/kona-camera-sensor-cdp.dtsi b/kona-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..a81bb8fd206a --- /dev/null +++ b/kona-camera-sensor-cdp.dtsi @@ -0,0 +1,638 @@ +#include + +&soc { + led_flash_rear: qcom,camera-flash0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_wide: qcom,actuator4 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_tele: qcom,actuator5 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_uw: qcom,actuator6 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1104000 0 2856000>; + rgltr-max-voltage = <0 3000000 1104000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1200000 0 2856000>; + rgltr-max-voltage = <0 3000000 1200000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1104000 0 2856000>; + rgltr-max-voltage = <0 3000000 1104000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1200000 0 2856000>; + rgltr-max-voltage = <0 3000000 1200000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_uw: qcom,eeprom6 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1056000 0 2856000>; + rgltr-max-voltage = <0 3000000 1056000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1104000 0 3008000>; + rgltr-max-voltage = <0 3000000 1104000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 3000000 1200000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1104000 0 3008000>; + rgltr-max-voltage = <0 3000000 1104000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 3000000 1200000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor6 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1056000 0 3008000>; + rgltr-max-voltage = <0 3000000 1056000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1056000 0 2856000>; + rgltr-max-voltage = <0 3000000 1056000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1056000 0 3008000>; + rgltr-max-voltage = <0 3000000 1056000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/kona-camera-sensor-mtp.dtsi b/kona-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..96d1ad595b05 --- /dev/null +++ b/kona-camera-sensor-mtp.dtsi @@ -0,0 +1,638 @@ +&soc { + led_flash_rear: qcom,camera-flash0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_wide: qcom,actuator4 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_tele: qcom,actuator5 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1104000 0 2856000>; + rgltr-max-voltage = <0 3000000 1104000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1200000 0 2856000>; + rgltr-max-voltage = <0 3000000 1200000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1104000 0 2856000>; + rgltr-max-voltage = <0 3000000 1104000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1200000 0 2856000>; + rgltr-max-voltage = <0 3000000 1200000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1104000 0 3008000>; + rgltr-max-voltage = <0 3000000 1104000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + actuator-src = <&actuator_rear_aux>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 3000000 1200000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1104000 0 3008000>; + rgltr-max-voltage = <0 3000000 1104000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 3000000 1200000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator6 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1056000 0 2856000>; + rgltr-max-voltage = <0 3000000 1056000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_uw: qcom,eeprom6 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1056000 0 2856000>; + rgltr-max-voltage = <0 3000000 1056000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1056000 0 3008000>; + rgltr-max-voltage = <0 3000000 1056000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor6 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1056000 0 3008000>; + rgltr-max-voltage = <0 3000000 1056000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + diff --git a/kona-camera-sensor-qrd.dtsi b/kona-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..fb273661070b --- /dev/null +++ b/kona-camera-sensor-qrd.dtsi @@ -0,0 +1,638 @@ +&soc { + led_flash_rear: qcom,camera-flash0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_wide: qcom,actuator4 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_tele: qcom,actuator5 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_uw: qcom,actuator6 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1104000 0 2856000>; + rgltr-max-voltage = <0 3000000 1104000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1200000 0 2856000>; + rgltr-max-voltage = <0 3000000 1200000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1104000 0 2856000>; + rgltr-max-voltage = <0 3000000 1104000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1200000 0 2856000>; + rgltr-max-voltage = <0 3000000 1200000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_uw: qcom,eeprom6 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1056000 0 2856000>; + rgltr-max-voltage = <0 3000000 1056000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1104000 0 3008000>; + rgltr-max-voltage = <0 3000000 1104000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + actuator-src = <&actuator_rear_aux>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 3000000 1200000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1104000 0 3008000>; + rgltr-max-voltage = <0 3000000 1104000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1200000 0 3008000>; + rgltr-max-voltage = <0 3000000 1200000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor6 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1056000 0 3008000>; + rgltr-max-voltage = <0 3000000 1056000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 2800000 1056000 0 2856000>; + rgltr-max-voltage = <0 3000000 1056000 0 3104000>; + rgltr-load-current = <0 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <0 2800000 1056000 0 3008000>; + rgltr-max-voltage = <0 3000000 1056000 0 3960000>; + rgltr-load-current = <0 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + diff --git a/kona-camera.dtsi b/kona-camera.dtsi new file mode 100644 index 000000000000..fac52750370f --- /dev/null +++ b/kona-camera.dtsi @@ -0,0 +1,1698 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + cam_csiphy0: qcom,csiphy@ac6a000 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0x0ac6a000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6a000>; + interrupts = ; + interrupt-names = "csiphy"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8150_l9>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "turbo"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy@ac6c000 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xac6c000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6c000>; + interrupts = ; + interrupt-names = "csiphy"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8150_l9>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "turbo"; + clock-rates = + <400000000 0 300000000 0>; + + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy@ac6e000 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xac6e000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6e000>; + interrupts = ; + interrupt-names = "csiphy"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8150_l9>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "turbo"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy@ac70000 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xac70000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x70000>; + interrupts = ; + interrupt-names = "csiphy"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8150_l9>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "turbo"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy@ac72000 { + cell-index = <4>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xac72000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x72000>; + interrupts = ; + interrupt-names = "csiphy"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8150_l9>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY4_CLK>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy4_clk", + "csi4phytimer_clk_src", + "csi4phytimer_clk"; + src-clock-name = "csi4phytimer_clk_src"; + clock-cntl-level = "turbo"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy5: qcom,csiphy@ac74000 { + cell-index = <5>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xac74000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x74000>; + interrupts = ; + interrupt-names = "csiphy"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8150_l9>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY5_CLK>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy5_clk", + "csi5phytimer_clk_src", + "csi5phytimer_clk"; + src-clock-name = "csi5phytimer_clk_src"; + clock-cntl-level = "turbo"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci@ac4f000 { + cell-index = <0>; + compatible = "qcom,cci"; + reg = <0xac4f000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4f000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&clock_camcc CAM_CC_CCI_0_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_0_CLK>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 101 0>, + <&tlmm 102 0>, + <&tlmm 103 0>, + <&tlmm 104 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci@ac50000 { + cell-index = <1>; + compatible = "qcom,cci"; + reg = <0xac50000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x50000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&clock_camcc CAM_CC_CCI_1_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_1_CLK>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active &cci3_active>; + pinctrl-1 = <&cci2_suspend &cci3_suspend>; + gpios = <&tlmm 105 0>, + <&tlmm 106 0>, + <&tlmm 107 0>, + <&tlmm 108 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2", + "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu"; + status = "ok"; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x400>, + <&apps_smmu 0x801 0x400>, + <&apps_smmu 0x840 0x400>, + <&apps_smmu 0x841 0x400>, + <&apps_smmu 0xC00 0x400>, + <&apps_smmu 0xC01 0x400>, + <&apps_smmu 0xC40 0x400>, + <&apps_smmu 0xC41 0x400>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ife"; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2040 0x400>, + <&apps_smmu 0x2440 0x400>; + label = "jpeg"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20E2 0x400>, + <&apps_smmu 0x24E2 0x400>, + <&apps_smmu 0x2000 0x400>, + <&apps_smmu 0x2001 0x400>, + <&apps_smmu 0x2400 0x400>, + <&apps_smmu 0x2401 0x400>, + <&apps_smmu 0x2060 0x400>, + <&apps_smmu 0x2061 0x400>, + <&apps_smmu 0x2460 0x400>, + <&apps_smmu 0x2461 0x400>, + <&apps_smmu 0x2020 0x400>, + <&apps_smmu 0x2021 0x400>, + <&apps_smmu 0x2420 0x400>, + <&apps_smmu 0x2421 0x400>; + label = "icp"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0xda00000 0xace00000>; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 150MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x9600000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10a00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.3 GB */ + iova-region-name = "io"; + iova-region-start = <0x10c00000>; + iova-region-len = <0xcf300000>; + iova-region-id = <0x3>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10b00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20C0 0x400>, + <&apps_smmu 0x24C0 0x400>; + label = "cpas-cdm0"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + + msm_cam_smmu_fd { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2080 0x400>, + <&apps_smmu 0x2480 0x400>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "fd"; + fd_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + }; + + qcom,cam-cpas@ac40000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0xac40000 0x1000>, + <0xac42000 0x8000>; + reg-cam-base = <0x40000 0x42000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_hf_clk", + "gcc_axi_sf_clk", + "slow_ahb_clk_src", + "cpas_ahb_clk", + "cpas_core_ahb_clk", + "camnoc_axi_clk_src", + "camnoc_axi_clk"; + clocks = + <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_HF_AXI_CLK>, + <&clock_gcc GCC_CAMERA_SF_AXI_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CORE_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "camnoc_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0 0>, + <0 0 0 19200000 0 0 19200000 0>, + <0 0 0 80000000 0 0 300000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 480000000 0>; + clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + qcom,msm-bus,name = "cam_ahb"; + qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + , + , + , + , + , + ; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "minsvs", + "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "csiphy5", "cci0", "cci1", + "csid0", "csid1", "csid2", "csid3", + "csid4", "csid5", "csid6", "ife0", + "ife1", "ife2", "ife3", "custom0", + "ipe0", "cam-cdm-intf0", "cpas-cdm0", + "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", + "fd0"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_rd_wr_sum: level3-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_0"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_0"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_nrt1_rd_wr_sum: level3-nrt1-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_icp"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_icp_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + }; + + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt0_wr: level2-rt0-wr { + cell-index = <3>; + node-name = "level2-rt0-wr"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt0_rd: level2-rt0-rd { + cell-index = <4>; + node-name = "level2-rt0-rd"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_wr: level2-nrt0-wr { + cell-index = <5>; + node-name = "level2-nrt0-wr"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_rd: level2-nrt0-rd { + cell-index = <6>; + node-name = "level2-nrt0-rd"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_rd: level2-nrt1-rd { + cell-index = <7>; + node-name = "level2-nrt1-rd"; + parent-node = <&level3_nrt1_rd_wr_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr0: level1-rt0-wr0 { + cell-index = <8>; + node-name = "level1-rt0-wr0"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr1: level1-rt0-wr1 { + cell-index = <9>; + node-name = "level1-rt0-wr1"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_rd0: level1-rt0-rd0 { + cell-index = <10>; + node-name = "level1-rt0-rd0"; + parent-node = <&level2_rt0_rd>; + traffic-merge-type = + ; + }; + + level1_rt0_wr2: level1-rt0-wr2 { + cell-index = <11>; + node-name = "level1-rt0-wr2"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr0: level1-nrt0-wr0 { + cell-index = <12>; + node-name = "level1-nrt0-wr0"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd0: level1-nrt0-rd0 { + cell-index = <13>; + node-name = "level1-nrt0-rd0"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr1: level1-nrt0-wr1 { + cell-index = <14>; + node-name = "level1-nrt0-wr1"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd2: level1-nrt0-rd2 { + cell-index = <15>; + node-name = "level1-nrt0-rd2"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ife0_ubwc_stats_wr: ife0-ubwc-stats-wr { + cell-index = <16>; + node-name = "ife0-ubwc-stats-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife1_ubwc_stats_wr: ife1-ubwc-stats-wr { + cell-index = <17>; + node-name = "ife1-ubwc-stats-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife0_linear_pdaf_wr: ife0-linear-pdaf-wr { + cell-index = <18>; + node-name = "ife0-linear-pdaf-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife1_linear_pdaf_wr: ife1-linear-pdaf-wr { + cell-index = <19>; + node-name = "ife1-linear-pdaf-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife2_rdi_all_wr: ife2-rdi-all-wr { + cell-index = <20>; + node-name = "ife2-rdi-all-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife3_rdi_all_wr: ife3-rdi-all-wr { + cell-index = <21>; + node-name = "ife3-rdi-all-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife0_rdi_all_rd: ife0-rdi-all-rd { + cell-index = <22>; + node-name = "ife0-rdi-all-rd"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife1_rdi_all_rd: ife1-rdi-all-rd { + cell-index = <23>; + node-name = "ife1-rdi-all-rd"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + custom0_all_rd: custom0-all-rd { + cell-index = <24>; + node-name = "custom0-all-rd"; + client-name = "custom0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { + cell-index = <25>; + node-name = "ife0-rdi-pixel-raw-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { + cell-index = <26>; + node-name = "ife1-rdi-pixel-raw-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + custom0_all_wr: custom0-all-wr { + cell-index = <27>; + node-name = "custom0-all-wr"; + client-name = "custom0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ipe0_all_wr: ipe0-all-wr { + cell-index = <28>; + node-name = "ipe0-all-wr"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <29>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + ipe0_ref_rd: ipe0-ref-rd { + cell-index = <30>; + node-name = "ipe0-ref-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <31>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + ipe0_in_rd: ipe0-in-rd { + cell-index = <32>; + node-name = "ipe0-in-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + jpeg_enc0_all_wr: jpeg-enc0-all-wr { + cell-index = <33>; + node-name = "jpeg-enc0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr1>; + }; + + jpeg_dma0_all_wr: jpeg-dma0-all-wr { + cell-index = <34>; + node-name = "jpeg-dma0-all-wr"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr1>; + }; + + jpeg_enc0_all_rd: jpeg-enc0-all-rd { + cell-index = <35>; + node-name = "jpeg-enc0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd2>; + }; + + jpeg_dma0_all_rd: jpeg-dma0-all-rd { + cell-index = <36>; + node-name = "jpeg-dma0-all-rd"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd2>; + }; + + fd0_all_wr: fd0-all-wr { + cell-index = <37>; + node-name = "fd0-all-wr"; + client-name = "fd0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_wr>; + }; + + fd0_all_rd: fd0-all-rd { + cell-index = <38>; + node-name = "fd0-all-rd"; + client-name = "fd0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <39>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <40>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_rd>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <3>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc", + "fd"; + status = "ok"; + }; + + qcom,cpas-cdm0@ac4d000 { + cell-index = <0>; + compatible = "qcom,cam170-cpas-cdm0"; + label = "cpas-cdm"; + reg = <0xac4d000 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x4d000>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife"; + status = "ok"; + }; + + qcom,cpas-cdm1@acb4200 { + cell-index = <1>; + compatible = "qcom,cam480-cpas-cdm1"; + label = "cpas-cdm"; + reg = <0xacb4200 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0xb4200>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife0"; + status = "disabled"; + }; + + qcom,cpas-cdm2@acc3200 { + cell-index = <2>; + compatible = "qcom,cam480-cpas-cdm2"; + label = "cpas-cdm"; + reg = <0xacc3200 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0xc3200>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife1"; + status = "disabled"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_csid0: qcom,csid0@acb5200 { + cell-index = <0>; + compatible = "qcom,csid480"; + reg-names = "csid"; + reg = <0xacb5200 0x1000>; + reg-cam-base = <0xb5200>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&titan_top_gdsc>; + ife0-supply = <&ife_0_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_0_areg", + "ife_0_ahb", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <400000000 0 400000000 0 350000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 576000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,ife0@acb4000 { + cell-index = <0>; + compatible = "qcom,vfe480"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacb4000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xb4000 0x42000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&titan_top_gdsc>; + ife0-supply = <&ife_0_gdsc>; + clock-names = + "ife_0_ahb", + "ife_0_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <0 100000000 350000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 576000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid1: qcom,csid1@acc4200 { + cell-index = <1>; + compatible = "qcom,csid480"; + reg-names = "csid"; + reg = <0xacc4200 0x1000>; + reg-cam-base = <0xc4200>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&titan_top_gdsc>; + ife1-supply = <&ife_1_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_1_areg", + "ife_1_ahb", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <400000000 0 400000000 0 350000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 576000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,ife1@acc3000 { + cell-index = <1>; + compatible = "qcom,vfe480"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacc3000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xc3000 0x42000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&titan_top_gdsc>; + ife1-supply = <&ife_1_gdsc>; + clock-names = + "ife_1_ahb", + "ife_1_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <0 100000000 350000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 576000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0@acd9200 { + cell-index = <2>; + compatible = "qcom,csid-lite480"; + reg-names = "csid-lite"; + reg = <0xacd9200 0x1000>; + reg-cam-base = <0xd9200>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_lite_ahb", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <400000000 0 0 0 400000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,ife-lite0@acd9000 { + cell-index = <2>; + compatible = "qcom,vfe-lite480"; + reg-names = "ife-lite"; + reg = <0xacd9000 0x2200>; + reg-cam-base = <0xd9000>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = + "ife_lite_ahb", + "ife_lite_axi", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_csid_lite1: qcom,csid-lite1@acdb400 { + cell-index = <3>; + compatible = "qcom,csid-lite480"; + reg-names = "csid-lite"; + reg = <0xacdb400 0x1000>; + reg-cam-base = <0xdb400>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_lite_ahb", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <400000000 0 0 0 400000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite1: qcom,ife-lite1@acdb200 { + cell-index = <3>; + compatible = "qcom,vfe-lite480"; + reg-names = "ife-lite"; + reg = <0xacdb200 0x2200>; + reg-cam-base = <0xdb200>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = + "ife_lite_ahb", + "ife_lite_axi", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", + "qcom,ipe0", + "qcom,bps"; + num-a5 = <1>; + num-ipe = <1>; + num-bps = <1>; + status = "ok"; + }; + + cam_a5: qcom,a5@ac00000 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_AHB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; + + clock-rates = + <200000000 0 480000000 0>, + <400000000 0 600000000 0>; + clock-cntl-level = "svs", "turbo"; + fw_name = "CAMERA_ICP.elf"; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; + }; + + cam_ipe0: qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac9a000 0xc000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x9a000>; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&ipe_0_gdsc>; + clock-names = + "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk_src", + "ipe_0_clk"; + src-clock-name = "ipe_0_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_IPE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IPE_0_AXI_CLK>, + <&clock_camcc CAM_CC_IPE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_0_CLK>; + + clock-rates = + <0 0 0 300000000 0>, + <0 0 0 475000000 0>, + <0 0 0 525000000 0>, + <0 0 0 700000000 0>, + <0 0 0 700000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + cam_bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac7a000 0x8000>; + reg-names = "bps_top"; + reg-cam-base = <0x7a000>; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&bps_gdsc>; + clock-names = + "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk_src", + "bps_clk"; + src-clock-name = "bps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_BPS_AHB_CLK>, + <&clock_camcc CAM_CC_BPS_AREG_CLK>, + <&clock_camcc CAM_CC_BPS_AXI_CLK>, + <&clock_camcc CAM_CC_BPS_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_CLK>; + + clock-rates = + <0 0 0 200000000 0>, + <0 0 0 400000000 0>, + <0 0 0 480000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc@ac53000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac53000 0x4000>; + reg-cam-base = <0x53000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma@ac57000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac57000 0x4000>; + reg-cam-base = <0x57000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + qcom,cam-fd { + compatible = "qcom,cam-fd"; + compat-hw-name = "qcom,fd"; + num-fd = <1>; + status = "ok"; + }; + + cam_fd: qcom,fd@ac5f000 { + cell-index = <0>; + compatible = "qcom,fd600"; + reg-names = "fd_core", "fd_wrapper"; + reg = <0xac5f000 0x1000>, + <0xac60000 0x400>; + reg-cam-base = <0x5f000 0x60000>; + interrupt-names = "fd"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "fd_core_clk_src", + "fd_core_clk", + "fd_core_uar_clk"; + clocks = + <&clock_camcc CAM_CC_FD_CORE_CLK_SRC>, + <&clock_camcc CAM_CC_FD_CORE_CLK>, + <&clock_camcc CAM_CC_FD_CORE_UAR_CLK>; + src-clock-name = "fd_core_clk_src"; + clock-control-debugfs = "true"; + clock-cntl-level = "svs", "svs_l1", "turbo"; + clock-rates = + <400000000 0 0>, + <480000000 0 0>, + <600000000 0 0>; + status = "ok"; + }; +}; From 4f3fca5588321bb51bd89f6318ef23566addbd99 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Tue, 9 Jul 2019 17:14:51 -0700 Subject: [PATCH 004/190] ARM: dts: camera: Add support for camera hardware for Lito platforms Add support for camera for Lito platforms as a part of new project. Change-Id: Ica2dc26158977371a3dfc27ade1e337b54f7fc9c --- lito-camera-sensor-cdp.dtsi | 293 +++++++ lito-camera-sensor-mtp.dtsi | 293 +++++++ lito-camera-sensor-qrd.dtsi | 672 +++++++++++++++ lito-camera.dtsi | 1606 +++++++++++++++++++++++++++++++++++ 4 files changed, 2864 insertions(+) create mode 100644 lito-camera-sensor-cdp.dtsi create mode 100644 lito-camera-sensor-mtp.dtsi create mode 100644 lito-camera-sensor-qrd.dtsi create mode 100644 lito-camera.dtsi diff --git a/lito-camera-sensor-cdp.dtsi b/lito-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..c3467e225a08 --- /dev/null +++ b/lito-camera-sensor-cdp.dtsi @@ -0,0 +1,293 @@ +#include + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&S8C>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1350000 0>; + rgltr-max-voltage = <1800000 2800000 1350000 0>; + rgltr-load-current = <0 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 71 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VDIG1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + status="ok"; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1104000 0>; + rgltr-max-voltage = <1800000 2800000 1104000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&S8C>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1350000 0>; + rgltr-max-voltage = <1800000 2800000 1350000 0>; + rgltr-load-current = <0 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 71 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VDIG1"; + sensor-mode = <0>; + cci-master = <1>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + status = "ok"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/lito-camera-sensor-mtp.dtsi b/lito-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..c3467e225a08 --- /dev/null +++ b/lito-camera-sensor-mtp.dtsi @@ -0,0 +1,293 @@ +#include + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&S8C>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1350000 0>; + rgltr-max-voltage = <1800000 2800000 1350000 0>; + rgltr-load-current = <0 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 71 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VDIG1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + status="ok"; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1104000 0>; + rgltr-max-voltage = <1800000 2800000 1104000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&S8C>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1350000 0>; + rgltr-max-voltage = <1800000 2800000 1350000 0>; + rgltr-load-current = <0 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 71 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VDIG1"; + sensor-mode = <0>; + cci-master = <1>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + status = "ok"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/lito-camera-sensor-qrd.dtsi b/lito-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..35ea6c166430 --- /dev/null +++ b/lito-camera-sensor-qrd.dtsi @@ -0,0 +1,672 @@ +#include + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + reg = <0x04 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + reg = <0x05 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + reg = <0x06 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + }; + + vreg_tof: regulator-dbb1 { + compatible = "regulator-fixed"; + regulator-name = "vdd_tof"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + gpio = <&pm8150l_gpios 2 GPIO_ACTIVE_HIGH>; + startup-delay-us = <1000>; + enable-active-high; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_triple_rear: qcom,actuator@4 { + cell-index = <4>; + reg = <0x4>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_triple_rear_aux: qcom,actuator@5 { + cell-index = <5>; + reg = <0x5>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_triple_rear_aux2: qcom,actuator@6 { + cell-index = <6>; + reg = <0x6>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&S8C>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1350000 0>; + rgltr-max-voltage = <1800000 2800000 1350000 0>; + rgltr-load-current = <0 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 71 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VDIG1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + status="ok"; + }; + + eeprom_triple_rear: qcom,eeprom@4 { + cell-index = <4>; + reg = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1104000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_rear_aux: qcom,eeprom@5 { + cell-index = <5>; + reg = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 4000000 1056000 0 2800000>; + rgltr-load-current = <0 2000000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_triple_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_triple_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 70 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5", + "CAM_VANA5"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_rear_aux2: qcom,eeprom@6 { + cell-index = <6>; + reg = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rear_aux2>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rear_aux2>; + gpios = <&tlmm 25 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1104000 0>; + rgltr-max-voltage = <1800000 2800000 1104000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&S8C>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1350000 0>; + rgltr-max-voltage = <1800000 2800000 1350000 0>; + rgltr-load-current = <0 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 71 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VDIG1"; + sensor-mode = <0>; + cci-master = <1>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + status = "ok"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + reg = <0x4>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear>; + actuator-src = <&actuator_triple_rear>; + eeprom-src = <&eeprom_triple_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&L6P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1104000 0 1800000>; + rgltr-max-voltage = <1800000 2800000 1104000 0 1800000>; + rgltr-load-current = <0 80000 105000 0 80000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + reg = <0x5>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux>; + actuator-src = <&actuator_triple_rear_aux>; + eeprom-src = <&eeprom_triple_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 1056000 0>; + rgltr-max-voltage = <1800000 4000000 1056000 0>; + rgltr-load-current = <0 2000000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_triple_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_triple_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 70 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5", + "CAM_VANA5"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@6 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + reg = <0x06>; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux2>; + actuator-src = <&actuator_triple_rear_aux2>; + eeprom-src = <&eeprom_triple_rear_aux2>; + cam_vdig-supply = <&L1P>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rear_aux2>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rear_aux2>; + gpios = <&tlmm 25 0>, + <&tlmm 21 0>, + <&tlmm 51 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6", + "CAM_VANA6"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&L7P>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3600000 0>; + rgltr-max-voltage = <1800000 3600000 0>; + rgltr-load-current = <0 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 16 0>, + <&tlmm 23 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/lito-camera.dtsi b/lito-camera.dtsi new file mode 100644 index 000000000000..6dbd2130d9ef --- /dev/null +++ b/lito-camera.dtsi @@ -0,0 +1,1606 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.2", "qcom,csiphy"; + reg = <0x0ace0000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe0000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-voltage = <880000>; + mipi-csi-vdd-supply = <&L5A>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.2", "qcom,csiphy"; + reg = <0xace2000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe2000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-voltage = <880000>; + mipi-csi-vdd-supply = <&L5A>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.2", "qcom,csiphy"; + reg = <0xace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-voltage = <880000>; + mipi-csi-vdd-supply = <&L5A>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.2", "qcom,csiphy"; + reg = <0xace6000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe6000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen"; + gdscr-supply = <&titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-voltage = <880000>; + mipi-csi-vdd-supply = <&L5A>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xac4a000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4a000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&camcc CAM_CC_CCI_0_CLK>, + <&camcc CAM_CC_CCI_0_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 17 0>, + <&tlmm 18 0>, + <&tlmm 19 0>, + <&tlmm 20 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xac4b000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4b000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&camcc CAM_CC_CCI_1_CLK>, + <&camcc CAM_CC_CCI_1_CLK_SRC>; + clock-names = "cci_clk", + "cci_1_clk_src"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 28 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu"; + status = "ok"; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x900 0x5E0>, + <&apps_smmu 0x880 0x5E0>, + <&apps_smmu 0x820 0x5E0>, + <&apps_smmu 0x920 0x5E0>, + <&apps_smmu 0x8A0 0x5E0>, + <&apps_smmu 0x940 0x5E0>, + <&apps_smmu 0x8C0 0x5E0>, + <&apps_smmu 0xD00 0x5E0>, + <&apps_smmu 0xC80 0x5E0>, + <&apps_smmu 0xC20 0x5E0>, + <&apps_smmu 0xD20 0x5E0>, + <&apps_smmu 0xCA0 0x5E0>, + <&apps_smmu 0xD40 0x5E0>, + <&apps_smmu 0xCC0 0x5E0>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ife"; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1280 0x20>, + <&apps_smmu 0x12A0 0x20>; + label = "jpeg"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1042 0x0>, + <&apps_smmu 0x11A0 0x0>, + <&apps_smmu 0x1220 0x0>, + <&apps_smmu 0x1300 0x20>, + <&apps_smmu 0x1320 0x20>, + <&apps_smmu 0x1180 0x0>, + <&apps_smmu 0x1200 0x0>, + <&apps_smmu 0x11E0 0x0>, + <&apps_smmu 0x1260 0x0>; + label = "icp"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0xda00000 0xace00000>; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 150MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x9600000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10a00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.3 GB */ + iova-region-name = "io"; + iova-region-start = <0x10c00000>; + iova-region-len = <0xcf300000>; + iova-region-id = <0x3>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10b00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1000 0x0>; + label = "cpas-cdm0"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + + msm_cam_smmu_fd { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x12C0 0x20>, + <&apps_smmu 0x12E0 0x20>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "fd"; + fd_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_lrme { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x11C0 0x0>, + <&apps_smmu 0x1240 0x0>; + label = "lrme"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + lrme_iova_mem_map: iova-mem-map { + iova-mem-region-shared { + /* Shared region is 100MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x6400000>; + iova-region-id = <0x1>; + status = "ok"; + }; + /* IO region is approximately 3.3 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0xd800000>; + iova-region-len = <0xd2800000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc", + "fd", + "lrmecdm"; + status = "ok"; + }; + + qcom,cpas-cdm0 { + cell-index = <0>; + compatible = "qcom,cam170-cpas-cdm0"; + label = "cpas-cdm"; + reg = <0xac48000 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x48000>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife"; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_csid0: qcom,csid0 { + cell-index = <0>; + compatible = "qcom,csid175_200"; + reg-names = "csid"; + reg = <0xacb3000 0x1000>; + reg-cam-base = <0xb3000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&titan_top_gdsc>; + ife0-supply = <&ife_0_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <300000000 0 0 0 380000000 0 0>, + <384000000 0 0 0 510000000 0 0>, + <400000000 0 0 0 637000000 0 0>, + <400000000 0 0 0 760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,vfe0 { + cell-index = <0>; + compatible = "qcom,vfe175_130"; + reg-names = "ife"; + reg = <0xacaf000 0x5200>; + reg-cam-base = <0xaf000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&titan_top_gdsc>; + ife0-supply = <&ife_0_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <380000000 0 0>, + <510000000 0 0>, + <637000000 0 0>, + <760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <760000000>; + status = "ok"; + }; + + cam_csid1: qcom,csid1 { + cell-index = <1>; + compatible = "qcom,csid175_200"; + reg-names = "csid"; + reg = <0xacba000 0x1000>; + reg-cam-base = <0xba000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&titan_top_gdsc>; + ife1-supply = <&ife_1_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <300000000 0 0 0 380000000 0 0>, + <384000000 0 0 0 510000000 0 0>, + <400000000 0 0 0 637000000 0 0>, + <400000000 0 0 0 760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,vfe1 { + cell-index = <1>; + compatible = "qcom,vfe175_130"; + reg-names = "ife"; + reg = <0xacb6000 0x5200>; + reg-cam-base = <0xb6000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&titan_top_gdsc>; + ife1-supply = <&ife_1_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <380000000 0 0>, + <510000000 0 0>, + <637000000 0 0>, + <760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <760000000>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0 { + cell-index = <2>; + compatible = "qcom,csid-lite175"; + reg-names = "csid-lite"; + reg = <0xacc8000 0x1000>; + reg-cam-base = <0xc8000>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0>, + <384000000 0 0 0 400000000 0>, + <400000000 0 0 0 480000000 0>, + <400000000 0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,vfe-lite0 { + cell-index = <2>; + compatible = "qcom,vfe-lite175"; + reg-names = "ife-lite"; + reg = <0xacc4000 0x4000>; + reg-cam-base = <0xc4000>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <320000000 0>, + <400000000 0>, + <480000000 0>, + <600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", + "qcom,ipe0", + "qcom,ipe1", + "qcom,bps"; + num-a5 = <1>; + num-ipe = <2>; + num-bps = <1>; + icp_pc_en; + status = "ok"; + }; + + cam_a5: qcom,a5 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + clocks = + <&camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_ICP_CLK_SRC>, + <&camcc CAM_CC_ICP_CLK>; + + clock-rates = + <200000000 0 400000000 0>, + <300000000 0 600000000 0>; + clock-cntl-level = "svs", "svs_l1"; + fw_name = "CAMERA_ICP.elf"; + ubwc-cfg = <0x1073 0x101CF>; + qos-val = <0x00000505>; + status = "ok"; + }; + + cam_ipe0: qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac87000 0x3000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x87000>; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&ipe_0_gdsc>; + clock-names = + "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk_src", + "ipe_0_clk"; + src-clock-name = "ipe_0_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_IPE_0_AHB_CLK>, + <&camcc CAM_CC_IPE_0_AREG_CLK>, + <&camcc CAM_CC_IPE_0_AXI_CLK>, + <&camcc CAM_CC_IPE_0_CLK_SRC>, + <&camcc CAM_CC_IPE_0_CLK>; + + clock-rates = + <0 0 0 300000000 0>, + <0 0 0 430000000 0>, + <0 0 0 520000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + cam_ipe1: qcom,ipe1 { + cell-index = <1>; + compatible = "qcom,cam-ipe"; + reg = <0xac91000 0x3000>; + reg-names = "ipe1_top"; + reg-cam-base = <0x91000>; + regulator-names = "ipe1-vdd"; + ipe1-vdd-supply = <&ipe_1_gdsc>; + clock-names = + "ipe_1_ahb_clk", + "ipe_1_areg_clk", + "ipe_1_axi_clk", + "ipe_1_clk_src", + "ipe_1_clk"; + src-clock-name = "ipe_1_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_IPE_1_AHB_CLK>, + <&camcc CAM_CC_IPE_1_AREG_CLK>, + <&camcc CAM_CC_IPE_1_AXI_CLK>, + <&camcc CAM_CC_IPE_0_CLK_SRC>, + <&camcc CAM_CC_IPE_1_CLK>; + + clock-rates = + <0 0 0 300000000 0>, + <0 0 0 430000000 0>, + <0 0 0 520000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + cam_bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac6f000 0x3000>; + reg-names = "bps_top"; + reg-cam-base = <0x6f000>; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&bps_gdsc>; + clock-names = + "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk_src", + "bps_clk"; + src-clock-name = "bps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_BPS_AHB_CLK>, + <&camcc CAM_CC_BPS_AREG_CLK>, + <&camcc CAM_CC_BPS_AXI_CLK>, + <&camcc CAM_CC_BPS_CLK_SRC>, + <&camcc CAM_CC_BPS_CLK>; + + clock-rates = + <0 0 0 200000000 0>, + <0 0 0 400000000 0>, + <0 0 0 480000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac4e000 0x4000>; + reg-cam-base = <0x4e000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac52000 0x4000>; + reg-cam-base = <0x52000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + qcom,cam-fd { + compatible = "qcom,cam-fd"; + compat-hw-name = "qcom,fd"; + num-fd = <1>; + status = "ok"; + }; + + cam_fd: qcom,fd { + cell-index = <0>; + compatible = "qcom,fd501"; + reg-names = "fd_core", "fd_wrapper"; + reg = <0xac5a000 0x1000>, + <0xac5b000 0x400>; + reg-cam-base = <0x5a000 0x5b000>; + interrupt-names = "fd"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "fd_core_clk_src", + "fd_core_clk", + "fd_core_uar_clk"; + clocks = + <&camcc CAM_CC_FD_CORE_CLK_SRC>, + <&camcc CAM_CC_FD_CORE_CLK>, + <&camcc CAM_CC_FD_CORE_UAR_CLK>; + src-clock-name = "fd_core_clk_src"; + clock-control-debugfs = "true"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal"; + clock-rates = + <380000000 0 0>, + <384000000 0 0>, + <480000000 0 0>, + <600000000 0 0>; + status = "ok"; + }; + + qcom,cam-lrme { + compatible = "qcom,cam-lrme"; + arch-compat = "lrme"; + status = "ok"; + }; + + cam_lrme: qcom,lrme { + cell-index = <0>; + compatible = "qcom,lrme"; + reg-names = "lrme"; + reg = <0xac6b000 0xa00>; + reg-cam-base = <0x6b000>; + interrupt-names = "lrme"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&titan_top_gdsc>; + clock-names = "lrme_clk_src", + "lrme_clk"; + clocks = <&camcc CAM_CC_LRME_CLK_SRC>, + <&camcc CAM_CC_LRME_CLK>; + clock-rates = <240000000 240000000>, + <300000000 300000000>, + <320000000 320000000>, + <400000000 400000000>, + <400000000 400000000>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "lrme_clk_src"; + status = "ok"; + }; + + qcom,cam-cpas { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0xac40000 0x1000>, + <0xac42000 0x6000>; + reg-cam-base = <0x40000 0x42000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_hf_clk", + "gcc_axi_sf_clk", + "slow_ahb_clk_src", + "cpas_ahb_clk", + "camnoc_axi_clk_src", + "camnoc_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "camnoc_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0>, + <0 0 0 80000000 0 150000000 0>, + <0 0 0 80000000 0 240000000 0>, + <0 0 0 80000000 0 320000000 0>, + <0 0 0 80000000 0 400000000 0>, + <0 0 0 80000000 0 480000000 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + qcom,msm-bus,name = "cam_ahb"; + qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + , + , + , + , + , + ; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", + "minsvs", "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "cci0", "cci1", + "csid0", "csid1", "csid2", + "ife0", "ife1", "ife2", + "ipe0", "ipe1", "cam-cdm-intf0", "cpas-cdm0", + "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", + "fd0", "lrmecpas0"; + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_wr_sum: level3-rt0-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_3"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_3_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_rt1_rd_wr_sum: level3-rt1-rd-wr-sum { + cell-index = <1>; + node-name = "level3-rt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_1"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_1_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_0"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_nrt1_rd_sum: level3-nrt1-rd-sum { + cell-index = <3>; + node-name = "level3-nrt1-rd-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_icp"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_4_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + }; + + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt0_write0: level2-rt0-write0 { + cell-index = <4>; + node-name = "level2-rt0-write0"; + parent-node = <&level3_rt0_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt1_read0: level2-rt1-read0 { + cell-index = <5>; + node-name = "level2-rt1-read0"; + parent-node = <&level3_rt1_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt1_write0: level2-rt1-write0 { + cell-index = <6>; + node-name = "level2-rt1-write0"; + parent-node = <&level3_rt1_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_write0: level2-nrt0-write0 { + cell-index = <7>; + node-name = "level2-nrt0-write0"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_read0: level2-nrt0-read0 { + cell-index = <8>; + node-name = "level2-nrt0-read0"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_read0: level2-nrt1-read0 { + cell-index = <9>; + node-name = "level2-nrt1-read0"; + parent-node = <&level3_nrt1_rd_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_write0: level1-rt0-write0 { + cell-index = <10>; + node-name = "level1-rt0-write0"; + parent-node = <&level2_rt0_write0>; + traffic-merge-type = + ; + }; + + level1_rt1_write0: level1-rt1-write0 { + cell-index = <11>; + node-name = "level1-rt1-write0"; + parent-node = <&level2_rt1_write0>; + traffic-merge-type = + ; + }; + + level1_rt1_read0: level1-rt1-read0 { + cell-index = <12>; + node-name = "level1-rt1-read0"; + parent-node = <&level2_rt1_read0>; + traffic-merge-type = + ; + }; + + level1_rt1_write1: level1-rt1-write1 { + cell-index = <13>; + node-name = "level1-rt1-write1"; + parent-node = <&level2_rt1_write0>; + traffic-merge-type = + ; + }; + + level1_nrt0_write0: level1-nrt0-write0 { + cell-index = <14>; + node-name = "level1-nrt0-write0"; + parent-node = <&level2_nrt0_write0>; + traffic-merge-type = + ; + }; + + level1_nrt0_write1: level1-nrt0-write1 { + cell-index = <15>; + node-name = "level1-nrt0-write1"; + parent-node = <&level2_nrt0_write0>; + traffic-merge-type = + ; + }; + + level1_nrt0_read0: level1-nrt0-read0 { + cell-index = <16>; + node-name = "level1-nrt0-read0"; + parent-node = <&level2_nrt0_read0>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <17>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_read0>; + }; + + fd0_all_wr: fd0-all-wr { + cell-index = <18>; + node-name = "fd0-all-wr"; + client-name = "fd0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_write0>; + }; + + fd0_all_rd: fd0-all-rd { + cell-index = <19>; + node-name = "fd0-all-rd"; + client-name = "fd0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_read0>; + }; + + ife0_pixelall_wr: ife0-pixelall-wr { + cell-index = <20>; + node-name = "ife0-pixelall-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_write0>; + }; + + ife1_rdi_wr: ife1-rdi-wr { + cell-index = <21>; + node-name = "ife1-rdi-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife0_rdi_wr: ife0-rdi-wr { + cell-index = <22>; + node-name = "ife0-rdi-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife2_rdi_wr: ife2-rdi-wr { + cell-index = <23>; + node-name = "ife2-rdi-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife1_rdi_rd: ife1-rdi-rd { + cell-index = <24>; + node-name = "ife1-rdi-rd"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_read0>; + }; + + ife0_rdi_rd: ife0-rdi-rd { + cell-index = <25>; + node-name = "ife0-rdi-rd"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_read0>; + }; + + ife1_pixelall_wr: ife1-pixelall-wr { + cell-index = <26>; + node-name = "ife1-pixelall-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_write1>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <27>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_read0>; + }; + + ipe0_all_rd: ipe0-all-rd { + cell-index = <28>; + node-name = "ipe0-all-rd"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_read0>; + }; + + ipe1_all_rd: ipe1-all-rd { + cell-index = <29>; + node-name = "ipe1-all-rd"; + client-name = "ipe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_read0>; + }; + + lrme0_all_rd: lrme0-all-rd { + cell-index = <30>; + node-name = "lrme0-all-rd"; + client-name = "lrmecpas0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_read0>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <31>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + ipe0_ref_wr: ipe0-ref-wr { + cell-index = <32>; + node-name = "ipe0-ref-wr"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + ipe1_ref_wr: ipe1-ref-wr { + cell-index = <33>; + node-name = "ipe1-ref-wr"; + client-name = "ipe1"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + lrme0_all_wr: lrme0-all-wr { + cell-index = <34>; + node-name = "lrme0-all-wr"; + client-name = "lrmecpas0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + ipe1_viddisp_wr: ipe1-viddisp-wr { + cell-index = <35>; + node-name = "ipe1-viddisp-wr"; + client-name = "ipe1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_write1>; + }; + + ipe0_viddisp_wr: ipe0-viddisp-wr { + cell-index = <36>; + node-name = "ipe0-viddisp-wr"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_write1>; + }; + + jpeg0_all_wr: jpeg0-all-wr { + cell-index = <37>; + node-name = "jpeg0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_write0>; + }; + + jpeg0_all_rd: jpeg0-all-rd { + cell-index = <38>; + node-name = "jpeg0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_read0>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <39>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_read0>; + }; + }; + }; + }; +}; From 8b8b3fbaa825399c09504432fc6e6bce747dbbff Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Tue, 16 Jul 2019 11:18:22 -0700 Subject: [PATCH 005/190] ARM: dts: msm: Correct min/max voltage and load current for kona platforms Correct/Update min max voltages and load current for IO regulator. This helps to provide expected current for the camera sensor for kona platforms. Change-Id: I18ec8b7d35c5ff990e2cb34848078cce355e1634 --- kona-camera-sensor-cdp.dtsi | 70 +++++++++++++++++----------------- kona-camera-sensor-mtp.dtsi | 76 ++++++++++++++++++------------------- kona-camera-sensor-qrd.dtsi | 76 ++++++++++++++++++------------------- 3 files changed, 111 insertions(+), 111 deletions(-) diff --git a/kona-camera-sensor-cdp.dtsi b/kona-camera-sensor-cdp.dtsi index a81bb8fd206a..00e336109f7a 100644 --- a/kona-camera-sensor-cdp.dtsi +++ b/kona-camera-sensor-cdp.dtsi @@ -124,9 +124,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1104000 0 2856000>; - rgltr-max-voltage = <0 3000000 1104000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -161,9 +161,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1200000 0 2856000>; - rgltr-max-voltage = <0 3000000 1200000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -198,9 +198,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1104000 0 2856000>; - rgltr-max-voltage = <0 3000000 1104000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -235,9 +235,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1200000 0 2856000>; - rgltr-max-voltage = <0 3000000 1200000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -272,9 +272,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1056000 0 2856000>; - rgltr-max-voltage = <0 3000000 1056000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -317,9 +317,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1104000 0 3008000>; - rgltr-max-voltage = <0 3000000 1104000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -360,9 +360,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1200000 0 3008000>; - rgltr-max-voltage = <0 3000000 1200000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -404,9 +404,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1104000 0 3008000>; - rgltr-max-voltage = <0 3000000 1104000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -448,9 +448,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1200000 0 3008000>; - rgltr-max-voltage = <0 3000000 1200000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -492,9 +492,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1056000 0 3008000>; - rgltr-max-voltage = <0 3000000 1056000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -573,9 +573,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1056000 0 3008000>; - rgltr-max-voltage = <0 3000000 1056000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -611,8 +611,8 @@ regulator-names = "cam_vio", "cam_vdig", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0 3600000 0>; - rgltr-max-voltage = <0 3600000 0>; + rgltr-min-voltage = <1800000 3600000 0>; + rgltr-max-voltage = <1800000 3600000 0>; rgltr-load-current = <180000 120000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; diff --git a/kona-camera-sensor-mtp.dtsi b/kona-camera-sensor-mtp.dtsi index 96d1ad595b05..a9bdbd56fafc 100644 --- a/kona-camera-sensor-mtp.dtsi +++ b/kona-camera-sensor-mtp.dtsi @@ -110,9 +110,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1104000 0 2856000>; - rgltr-max-voltage = <0 3000000 1104000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -147,9 +147,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1200000 0 2856000>; - rgltr-max-voltage = <0 3000000 1200000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -184,9 +184,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1104000 0 2856000>; - rgltr-max-voltage = <0 3000000 1104000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -221,9 +221,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1200000 0 2856000>; - rgltr-max-voltage = <0 3000000 1200000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -266,9 +266,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1104000 0 3008000>; - rgltr-max-voltage = <0 3000000 1104000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -310,9 +310,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1200000 0 3008000>; - rgltr-max-voltage = <0 3000000 1200000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -354,9 +354,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1104000 0 3008000>; - rgltr-max-voltage = <0 3000000 1104000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -398,9 +398,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1200000 0 3008000>; - rgltr-max-voltage = <0 3000000 1200000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -448,9 +448,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1056000 0 2856000>; - rgltr-max-voltage = <0 3000000 1056000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -485,9 +485,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1056000 0 2856000>; - rgltr-max-voltage = <0 3000000 1056000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -528,9 +528,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1056000 0 3008000>; - rgltr-max-voltage = <0 3000000 1056000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -566,8 +566,8 @@ regulator-names = "cam_vio", "cam_vdig", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0 3600000 0>; - rgltr-max-voltage = <0 3600000 0>; + rgltr-min-voltage = <1800000 3600000 0>; + rgltr-max-voltage = <1800000 3600000 0>; rgltr-load-current = <180000 120000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -610,9 +610,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1056000 0 3008000>; - rgltr-max-voltage = <0 3000000 1056000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active diff --git a/kona-camera-sensor-qrd.dtsi b/kona-camera-sensor-qrd.dtsi index fb273661070b..30e7e44c1935 100644 --- a/kona-camera-sensor-qrd.dtsi +++ b/kona-camera-sensor-qrd.dtsi @@ -122,9 +122,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1104000 0 2856000>; - rgltr-max-voltage = <0 3000000 1104000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -159,9 +159,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1200000 0 2856000>; - rgltr-max-voltage = <0 3000000 1200000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -196,9 +196,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1104000 0 2856000>; - rgltr-max-voltage = <0 3000000 1104000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -233,9 +233,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1200000 0 2856000>; - rgltr-max-voltage = <0 3000000 1200000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -270,9 +270,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1056000 0 2856000>; - rgltr-max-voltage = <0 3000000 1056000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -315,9 +315,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1104000 0 3008000>; - rgltr-max-voltage = <0 3000000 1104000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -359,9 +359,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1200000 0 3008000>; - rgltr-max-voltage = <0 3000000 1200000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -403,9 +403,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1104000 0 3008000>; - rgltr-max-voltage = <0 3000000 1104000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -447,9 +447,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1200000 0 3008000>; - rgltr-max-voltage = <0 3000000 1200000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -491,9 +491,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1056000 0 3008000>; - rgltr-max-voltage = <0 3000000 1056000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -529,9 +529,9 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <0 2800000 1056000 0 2856000>; - rgltr-max-voltage = <0 3000000 1056000 0 3104000>; - rgltr-load-current = <0 80000 1200000 0 100000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -572,9 +572,9 @@ "cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <0 2800000 1056000 0 3008000>; - rgltr-max-voltage = <0 3000000 1056000 0 3960000>; - rgltr-load-current = <0 80000 1200000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>; + rgltr-load-current = <120000 80000 1200000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -610,8 +610,8 @@ regulator-names = "cam_vio", "cam_vdig", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0 3600000 0>; - rgltr-max-voltage = <0 3600000 0>; + rgltr-min-voltage = <1800000 3600000 0>; + rgltr-max-voltage = <1800000 3600000 0>; rgltr-load-current = <180000 120000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; From 31edee401e77f1220400d44bb847a1afaf162cf1 Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Mon, 24 Jun 2019 13:44:33 -0700 Subject: [PATCH 006/190] ARM: dts: msm: Enable PC for kona This change enables ICP power collapse and IPE/BPS power collapse for kona. Change-Id: I537fbf0ec072df11162df05beb15006a392ede85 --- kona-camera.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index fac52750370f..ffed62b85c14 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1500,6 +1500,8 @@ num-ipe = <1>; num-bps = <1>; status = "ok"; + icp_pc_en; + ipe_bps_pc_en; }; cam_a5: qcom,a5@ac00000 { From 8d0389f7984b53e4c0fe9b84f141d6c85f5a0171 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Tue, 16 Jul 2019 11:19:23 -0700 Subject: [PATCH 007/190] ARM: dts: msm: Add eeprom node for TOF sensor for Kona platforms EEPROM support is needed for TOF sensor across Kona platforms. This change adds EEPROM node for TOF sensor. Change-Id: Ia5a8a4101c7d91eff0d200ae85dbfbf192630e70 --- kona-camera-sensor-cdp.dtsi | 36 ++++++++++++++++++++++++++++++++++++ kona-camera-sensor-mtp.dtsi | 36 ++++++++++++++++++++++++++++++++++++ kona-camera-sensor-qrd.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 3 files changed, 108 insertions(+) diff --git a/kona-camera-sensor-cdp.dtsi b/kona-camera-sensor-cdp.dtsi index 00e336109f7a..dee387a5e04c 100644 --- a/kona-camera-sensor-cdp.dtsi +++ b/kona-camera-sensor-cdp.dtsi @@ -556,6 +556,41 @@ clock-rates = <24000000>; }; + eeprom_tof: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + qcom,cam-sensor2 { cell-index = <2>; compatible = "qcom,cam-sensor"; @@ -602,6 +637,7 @@ cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <0>; diff --git a/kona-camera-sensor-mtp.dtsi b/kona-camera-sensor-mtp.dtsi index a9bdbd56fafc..1e894a511bef 100644 --- a/kona-camera-sensor-mtp.dtsi +++ b/kona-camera-sensor-mtp.dtsi @@ -511,6 +511,41 @@ clock-rates = <24000000>; }; + eeprom_tof: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + qcom,cam-sensor2 { cell-index = <2>; compatible = "qcom,cam-sensor"; @@ -557,6 +592,7 @@ cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <0>; diff --git a/kona-camera-sensor-qrd.dtsi b/kona-camera-sensor-qrd.dtsi index 30e7e44c1935..9e69a98cf38d 100644 --- a/kona-camera-sensor-qrd.dtsi +++ b/kona-camera-sensor-qrd.dtsi @@ -555,6 +555,41 @@ clock-rates = <24000000>; }; + eeprom_tof: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + qcom,cam-sensor2 { cell-index = <2>; compatible = "qcom,cam-sensor"; @@ -601,6 +636,7 @@ cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <0>; From 6d3598d3c325f764a775e6e4275841efd2f066dc Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Wed, 10 Jul 2019 14:57:36 +0800 Subject: [PATCH 008/190] ARM: dts: qcom: modify cci master to cci2 for tele camera Tele camera use cci2 after EVT1.1, correct this cci assignment. Change-Id: I5f8cfab1c33e25138327e8ab0201e19e6175c470 --- lito-camera-sensor-qrd.dtsi | 208 ++++++++++++++++++------------------ 1 file changed, 104 insertions(+), 104 deletions(-) diff --git a/lito-camera-sensor-qrd.dtsi b/lito-camera-sensor-qrd.dtsi index 35ea6c166430..08cdafb240a1 100644 --- a/lito-camera-sensor-qrd.dtsi +++ b/lito-camera-sensor-qrd.dtsi @@ -92,21 +92,6 @@ status = "ok"; }; - actuator_triple_rear_aux: qcom,actuator@5 { - cell-index = <5>; - reg = <0x5>; - compatible = "qcom,actuator"; - cci-device = <0>; - cci-master = <0>; - cam_vaf-supply = <&L5P>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2800000>; - rgltr-max-voltage = <2800000>; - rgltr-load-current = <100000>; - status = "ok"; - }; - actuator_triple_rear_aux2: qcom,actuator@6 { cell-index = <6>; reg = <0x6>; @@ -238,47 +223,6 @@ clock-rates = <24000000>; }; - eeprom_triple_rear_aux: qcom,eeprom@5 { - cell-index = <5>; - reg = <5>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L7P>; - cam_vana-supply = <&BOB>; - cam_vdig-supply = <&L1P>; - cam_clk-supply = <&titan_top_gdsc>; - cam_vaf-supply = <&L5P>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 3008000 1056000 0 2800000>; - rgltr-max-voltage = <1800000 4000000 1056000 0 2800000>; - rgltr-load-current = <0 2000000 105000 0 100000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_triple_rear_aux>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_triple_rear_aux>; - gpios = <&tlmm 14 0>, - <&tlmm 29 0>, - <&tlmm 70 0>; - gpio-reset = <1>; - gpio-vana = <2>; - gpio-req-tbl-num = <0 1 2>; - gpio-req-tbl-flags = <1 0 0>; - gpio-req-tbl-label = "CAMIF_MCLK5", - "CAM_RESET5", - "CAM_VANA5"; - sensor-mode = <0>; - cci-device = <0>; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "turbo"; - clock-rates = <24000000>; - }; - eeprom_triple_rear_aux2: qcom,eeprom@6 { cell-index = <6>; reg = <6>; @@ -453,54 +397,6 @@ clock-rates = <24000000>; }; - qcom,cam-sensor@5 { - cell-index = <5>; - compatible = "qcom,cam-sensor"; - reg = <0x5>; - csiphy-sd-index = <1>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - led-flash-src = <&led_flash_triple_rear_aux>; - actuator-src = <&actuator_triple_rear_aux>; - eeprom-src = <&eeprom_triple_rear_aux>; - cam_vio-supply = <&L7P>; - cam_vana-supply = <&BOB>; - cam_vdig-supply = <&L1P>; - cam_clk-supply = <&titan_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk"; - rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 3008000 1056000 0>; - rgltr-max-voltage = <1800000 4000000 1056000 0>; - rgltr-load-current = <0 2000000 105000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_triple_rear_aux>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_triple_rear_aux>; - gpios = <&tlmm 14 0>, - <&tlmm 29 0>, - <&tlmm 70 0>; - gpio-reset = <1>; - gpio-vana = <2>; - gpio-req-tbl-num = <0 1 2>; - gpio-req-tbl-flags = <1 0 0>; - gpio-req-tbl-label = "CAMIF_MCLK5", - "CAM_RESET5", - "CAM_VANA5"; - sensor-mode = <0>; - cci-device = <0>; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "turbo"; - clock-rates = <24000000>; - }; - qcom,cam-sensor@6 { cell-index = <6>; compatible = "qcom,cam-sensor"; @@ -551,6 +447,21 @@ }; &cam_cci1 { + actuator_triple_rear_aux: qcom,actuator@5 { + cell-index = <5>; + reg = <0x5>; + compatible = "qcom,actuator"; + cci-device = <1>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + eeprom_front: qcom,eeprom@2 { cell-index = <2>; reg = <0x2>; @@ -589,6 +500,47 @@ clock-rates = <24000000>; }; + eeprom_triple_rear_aux: qcom,eeprom@5 { + cell-index = <5>; + reg = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 4000000 1056000 0 2800000>; + rgltr-load-current = <0 2000000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_triple_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_triple_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 70 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5", + "CAM_VANA5"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + qcom,cam-sensor@2 { cell-index = <2>; compatible = "qcom,cam-sensor"; @@ -669,4 +621,52 @@ clock-cntl-level = "turbo"; clock-rates = <24000000>; }; + + qcom,cam-sensor@5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + reg = <0x5>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux>; + actuator-src = <&actuator_triple_rear_aux>; + eeprom-src = <&eeprom_triple_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 1056000 0>; + rgltr-max-voltage = <1800000 4000000 1056000 0>; + rgltr-load-current = <0 2000000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_triple_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_triple_rear_aux>; + gpios = <&tlmm 14 0>, + <&tlmm 29 0>, + <&tlmm 70 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5", + "CAM_VANA5"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; }; From 681e8bcec6a18e9879970a876ed0db378b9bd691 Mon Sep 17 00:00:00 2001 From: Rishabh Bhatnagar Date: Fri, 9 Aug 2019 11:33:47 -0700 Subject: [PATCH 009/190] ARM: dts: qcom: add DT files to support new Kona MTP power grid Add device tree files to support new mtp platform subtype with a different power grid. In the new power grid, WLAN and Bluetooth chips are powered by regulator S6A instead of S2F. Change-Id: I66be34787f26f1c3eb773c08b8a98b2b22468918 --- kona-camera-sensor-mtp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kona-camera-sensor-mtp.dtsi b/kona-camera-sensor-mtp.dtsi index 1e894a511bef..a1dab4718adf 100644 --- a/kona-camera-sensor-mtp.dtsi +++ b/kona-camera-sensor-mtp.dtsi @@ -1,3 +1,5 @@ +#include + &soc { led_flash_rear: qcom,camera-flash0 { cell-index = <0>; From 489e25aa6230569e2522874628e0efb26264dbd0 Mon Sep 17 00:00:00 2001 From: Alok Pandey Date: Fri, 5 Jul 2019 11:27:46 +0530 Subject: [PATCH 010/190] ARM: dts: qcom: Setting QoS for A5 It sets recommended value of bus access priority for A5 core. Change-Id: I7010cd1ba52a7f03485f520d088b0c6d5b2831f7 --- lito-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 6dbd2130d9ef..7f37e6abd189 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -794,7 +794,7 @@ clock-cntl-level = "svs", "svs_l1"; fw_name = "CAMERA_ICP.elf"; ubwc-cfg = <0x1073 0x101CF>; - qos-val = <0x00000505>; + qos-val = <0x00000A0A>; status = "ok"; }; From 65b7f6c685c60d91a099f89ace175c7b6a66f541 Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Thu, 25 Jul 2019 18:19:54 +0530 Subject: [PATCH 011/190] ARM: dts: msm: Adds camera hw fuse info for lito Adds QCFA and secure camera fuse register information for lito target. Change-Id: I13a884d57a7218f4a948c91c1955df9c9869a72d --- lito-camera.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 7f37e6abd189..710b11491091 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -1033,6 +1033,8 @@ reg = <0xac40000 0x1000>, <0xac42000 0x6000>; reg-cam-base = <0x40000 0x42000>; + cam_hw_fuse = , + ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 60b70f7f7fa4fdcf7bf2f9d66b3795bd409e76b9 Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Fri, 26 Jul 2019 14:44:21 +0530 Subject: [PATCH 012/190] ARM: dts: qcom: Update IB for cpas Update IB for cpas node. Change-Id: I5bc102178441b50aea17e86b33529922d1d6adfb --- lito-camera.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 710b11491091..694899992db4 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -1076,17 +1076,17 @@ , , + MSM_BUS_SLAVE_CAMERA_CFG 0 65000>, , + MSM_BUS_SLAVE_CAMERA_CFG 0 125000>, , + MSM_BUS_SLAVE_CAMERA_CFG 0 125000>, , + MSM_BUS_SLAVE_CAMERA_CFG 0 250000>, , + MSM_BUS_SLAVE_CAMERA_CFG 0 250000>, ; + MSM_BUS_SLAVE_CAMERA_CFG 0 250000>; vdd-corners = Date: Tue, 9 Jul 2019 16:43:28 -0700 Subject: [PATCH 013/190] ARM: dts: msm: Add scalable clock for KONA Add scalable clock entry for a node whose rate is controlled by the node's src clock. Change-Id: I751e9d6705908bc94ddcedbb86104931c20f0673 --- kona-camera.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index ffed62b85c14..06bda13de9eb 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1266,6 +1266,7 @@ <0 400000000 720000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_0_areg"; clock-control-debugfs = "true"; clock-names-option = "ife_dsp_clk"; clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; @@ -1347,6 +1348,7 @@ <0 400000000 720000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_1_areg"; clock-control-debugfs = "true"; clock-names-option = "ife_dsp_clk"; clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; From a41d46e25fc763e9ab12ea38492f0810638d7d7e Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Fri, 12 Jul 2019 11:03:54 -0700 Subject: [PATCH 014/190] ARM: dts: msm: Add clk levels for icp in KONA & LITO Add all supporting clk levels for icp_clk_src for KONA and lito. Apart from src clock the rates for fast_ahb are updated aswell. The change also defines the src clock for a5 node. Change-Id: Ib49d91e6a00db75fa04c4ad3e135e7b12e76edae --- kona-camera.dtsi | 7 ++++++- lito-camera.dtsi | 11 ++++++++--- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index 06bda13de9eb..b4da1a36035e 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1523,6 +1523,7 @@ "icp_ahb_clk", "icp_clk_src", "icp_clk"; + src-clock-name = "icp_clk_src"; clocks = <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, <&clock_camcc CAM_CC_ICP_AHB_CLK>, @@ -1530,9 +1531,13 @@ <&clock_camcc CAM_CC_ICP_CLK>; clock-rates = + <100000000 0 400000000 0>, <200000000 0 480000000 0>, + <300000000 0 600000000 0>, + <400000000 0 600000000 0>, <400000000 0 600000000 0>; - clock-cntl-level = "svs", "turbo"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-ipe-fetch-cfg = <0x707b 0x7083>; ubwc-ipe-write-cfg = <0x161ef 0x1620f>; diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 694899992db4..44780093c2bf 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -782,6 +782,7 @@ "icp_ahb_clk", "icp_clk_src", "icp_clk"; + src-clock-name = "icp_clk_src"; clocks = <&camcc CAM_CC_FAST_AHB_CLK_SRC>, <&camcc CAM_CC_ICP_AHB_CLK>, @@ -789,9 +790,13 @@ <&camcc CAM_CC_ICP_CLK>; clock-rates = - <200000000 0 400000000 0>, - <300000000 0 600000000 0>; - clock-cntl-level = "svs", "svs_l1"; + <100000000 0 400000000 0>, + <200000000 0 480000000 0>, + <300000000 0 600000000 0>, + <400000000 0 600000000 0>, + <400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-cfg = <0x1073 0x101CF>; qos-val = <0x00000A0A>; From a6eb11c86895a36a22cb09ac1cdaeedeffddea2f Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Mon, 22 Jul 2019 15:38:42 +0530 Subject: [PATCH 015/190] dt-bindings: Add cam_hw_fuse documentation Adds cam_hw_fuse documentation for camera cpas. Change-Id: I4a5f4cf54ca07485d232400e8fc93c3934ac0e87 --- bindings/msm-cam-cpas.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/bindings/msm-cam-cpas.txt b/bindings/msm-cam-cpas.txt index 34d251569dbb..c18b74391c18 100644 --- a/bindings/msm-cam-cpas.txt +++ b/bindings/msm-cam-cpas.txt @@ -65,6 +65,12 @@ First Level Node - CAM CPAS device Definition: Offset of the register space compared to to Camera base register space. +- cam_hw_fuse + Usage: optional + Value type: + Definition: List of fuse based features and respective + fuse info. + - interrupt-names Usage: optional Value type: @@ -283,6 +289,8 @@ Example: reg = <0xac40000 0x1000>, <0xac42000 0x5000>; reg-cam-base = <0x40000 0x42000>; + cam_hw_fuse = , + ; interrupt-names = "cpas_camnoc"; interrupts = <0 459 0>; qcom,cpas-hw-ver = <0x170100>; /* Titan v170 v1.0.0 */ From 67db596cfb55ec8ea58812cd29d6933ee008f6a2 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Wed, 17 Jul 2019 15:13:38 -0700 Subject: [PATCH 016/190] dt-bindings: Adding capability for scalable clock Adding scalable clock support for vfe node. Change-Id: Iedcd21446a75d8b59221d6d9f572d3613855fccb --- bindings/msm-cam-vfe.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index 576cce547505..2866d67cf5e2 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -107,6 +107,12 @@ Optional properties: frequencies to limit CX peak current. driver in the relevant register. +- scl-clk-names: + Usage: optional + Value type: + Definition: Scalable clock names to identify which clocks needs to update + along with source clock. + Example: qcom,vfe0@acaf000 { cell-index = <0>; @@ -141,6 +147,8 @@ Example: clock-names-option = "ife_dsp_clk"; clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; clock-rates-option = <600000000>; + scl-clk-en; + scl-clk-names = "ife_axi_clk"; qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>; status = "ok"; }; From fd49a1b8b3909a1a12b6cd6adc49de260785e9b2 Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Wed, 31 Jul 2019 12:05:16 -0700 Subject: [PATCH 017/190] ARM: dts: msm: Remove non-fatal flag for all context banks Mark the memory regions in all camera context banks as fatal. Change-Id: I521f0776073e9e47e7f6367ce7e4a096aa5cd9f0 --- kona-camera.dtsi | 5 ----- 1 file changed, 5 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index b4da1a36035e..e9931d2ccaec 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -375,7 +375,6 @@ <&apps_smmu 0xC01 0x400>, <&apps_smmu 0xC40 0x400>, <&apps_smmu 0xC41 0x400>; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; label = "ife"; ife_iova_mem_map: iova-mem-map { @@ -395,7 +394,6 @@ iommus = <&apps_smmu 0x2040 0x400>, <&apps_smmu 0x2440 0x400>; label = "jpeg"; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ @@ -432,7 +430,6 @@ <&apps_smmu 0x2420 0x400>, <&apps_smmu 0x2421 0x400>; label = "icp"; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0xda00000 0xace00000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { @@ -488,7 +485,6 @@ iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; label = "cpas-cdm0"; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { @@ -512,7 +508,6 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x2080 0x400>, <&apps_smmu 0x2480 0x400>; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; label = "fd"; fd_iova_mem_map: iova-mem-map { From f1642f0a2bbdb1abafb1469dd61c5e413f799336 Mon Sep 17 00:00:00 2001 From: kartanan Date: Wed, 28 Aug 2019 12:49:44 -0700 Subject: [PATCH 018/190] dt-bindings: camera: Add custom HW/csid bindings for KONA The change adds device tree bindings for custom HW for KONA. CRs-Fixed: 2515662 Change-Id: I3ee315c238275e5e4775c5a46a57636877ec44d7 --- bindings/msm-cam-custom-hw.txt | 28 ++++++++++++++++++++++++++++ bindings/msm-cam-custom.txt | 31 +++++++++++++++++++++++++++++++ bindings/msm-cam-ife-csid.txt | 4 ++-- 3 files changed, 61 insertions(+), 2 deletions(-) create mode 100644 bindings/msm-cam-custom-hw.txt create mode 100644 bindings/msm-cam-custom.txt diff --git a/bindings/msm-cam-custom-hw.txt b/bindings/msm-cam-custom-hw.txt new file mode 100644 index 000000000000..61125d0c8087 --- /dev/null +++ b/bindings/msm-cam-custom-hw.txt @@ -0,0 +1,28 @@ +* Qualcomm Technologies, Inc. MSM Camera Custom HW + +Camera Custom device provides the definitions for enabling +the custom hardware. It also provides the functions for the client +to control the Custom hardware. + +======================= +Required Node Structure +======================= +The Custom device is described in one level of the device node. + +====================================== +First Level Node - CAM Custom device +====================================== +Required properties: +- compatible + Usage: required + Value type: + Definition: Should specify the compatibility string for matching the + driver. e.g. "qcom,cam_custom_hw_sub_mod". + +Example: + + qcom,cam-custom-hw { + compatible = "qcom,cam_custom_hw_sub_mod"; + arch-compat = "custom"; + status = "ok"; + }; diff --git a/bindings/msm-cam-custom.txt b/bindings/msm-cam-custom.txt new file mode 100644 index 000000000000..8c5cc6148c5b --- /dev/null +++ b/bindings/msm-cam-custom.txt @@ -0,0 +1,31 @@ +* Qualcomm Technologies, Inc. MSM Camera Custom + +The MSM camera Custom driver provides the definitions for enabling +the Camera custom hadware. It provides the functions for the Client to +control the custom hardware. + +======================= +Required Node Structure +======================= +The camera Custom device is described in one level of device node. + +================================== +First Level Node - CAM CUSTOM device +================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-custom". + +- arch-compat + Usage: required + Value type: + Definition: Should be "custom". + +Example: + + qcom,cam-custom { + compatible = "qcom,cam-custom"; + arch-compat = "custom"; + status = "ok"; + }; diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index 9d1af9523e01..ecff78ee1b27 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -16,8 +16,8 @@ First Level Node - CAM IFE CSID device Usage: required Value type: Definition: Should be "qcom,csid170", "qcom,csid175", "qcom,csid175_200", - "qcom,csid480", "qcom,csid-lite170", "qcom,csid-lite175" - or "qcom,csid-lite480". + "qcom,csid480", "qcom,csid-lite170", "qcom,csid-lite175", + "qcom,csid-lite480" or "qcom,csid-custom480". - cell-index Usage: required From 2540a3f2d6766e597dcae90d589e40786733f8fc Mon Sep 17 00:00:00 2001 From: kartanan Date: Wed, 21 Aug 2019 14:16:51 -0700 Subject: [PATCH 019/190] ARM: dts: msm: Add bus vector for NOM_L1 for kona & lito Add new bus vector for NOMINAL_L1 level in cpas node. CRs-Fixed: 2507919 Change-Id: I7e41cc6a72d066660a71176a47d6d4fc61eaf3b0 --- kona-camera.dtsi | 7 +++++-- lito-camera.dtsi | 7 +++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index e9931d2ccaec..0bab6bd0a164 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -564,14 +564,15 @@ <0 0 0 80000000 0 0 400000000 0>, <0 0 0 80000000 0 0 400000000 0>, <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>, <0 0 0 80000000 0 0 480000000 0>; clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + "svs_l1", "nominal", "nominal_l1", "turbo"; control-camnoc-axi-clk; camnoc-bus-width = <32>; camnoc-axi-clk-bw-margin-perc = <20>; qcom,msm-bus,name = "cam_ahb"; - qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = , , + ; vdd-corners = , <0 0 0 80000000 0 320000000 0>, <0 0 0 80000000 0 400000000 0>, + <0 0 0 80000000 0 400000000 0>, <0 0 0 80000000 0 480000000 0>; clock-cntl-level = "suspend", "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + "svs_l1", "nominal", "nominal_l1", "turbo"; control-camnoc-axi-clk; camnoc-bus-width = <32>; camnoc-axi-clk-bw-margin-perc = <20>; qcom,msm-bus,name = "cam_ahb"; - qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = , , + ; vdd-corners = Date: Mon, 23 Sep 2019 16:33:31 -0700 Subject: [PATCH 020/190] ARM: dts: msm: correct the dma addr pool for icp Correct the address mapping for dma addr pool for icp. CRs-Fixed: 2534244 Change-Id: Ic1ed778ff0ac27a155bffc50deea8682762a1c37 --- kona-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index 0bab6bd0a164..7058993dd731 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -430,7 +430,7 @@ <&apps_smmu 0x2420 0x400>, <&apps_smmu 0x2421 0x400>; label = "icp"; - qcom,iommu-dma-addr-pool = <0xda00000 0xace00000>; + qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ From 3f297941794dee0a88f149ee1f4a383519e59932 Mon Sep 17 00:00:00 2001 From: Suresh Vankadara Date: Wed, 21 Aug 2019 12:50:22 +0530 Subject: [PATCH 021/190] dt-bindings: camera: add OPE support Support is added for camera OPE hardware. CRs-Fixed: 2520602 Change-Id: I9717955751448531a6393415d37f824b4345d29b --- bindings/msm-cam-ope.txt | 168 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) create mode 100644 bindings/msm-cam-ope.txt diff --git a/bindings/msm-cam-ope.txt b/bindings/msm-cam-ope.txt new file mode 100644 index 000000000000..fdd6c5e980f1 --- /dev/null +++ b/bindings/msm-cam-ope.txt @@ -0,0 +1,168 @@ +* Qualcomm Technologies, Inc. MSM Camera OPE + +The ope device node has properties defined to hint the driver +about the number of OPE nodes available during the +probe sequence. Each node has multiple properties defined +for interrupts, clocks and regulators. + +======================= +Required Node Structure +======================= +OPE root interface node takes care of the handling account for number +of OPE devices present on the hardware. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,cam-ope". + +- compat-hw-name + Usage: required + Value type: + Definition: Should be "qcom,ope". + +- num-ope + Usage: required + Value type: + Definition: Number of supported OPE HW blocks. + +Example: + qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <2>; + status = "ok"; + }; + +======================= +Required Node Structure +======================= +OPE Node provides interface for Image Control Processor driver +about the OPE register map, interrupt map, clocks, regulators. + +- cell-index + Usage: required + Value type: + Definition: Node instance number. + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,ope". + +- reg-names + Usage: optional + Value type: + Definition: Name of the register resources. + +- reg + Usage: optional + Value type: + Definition: Register values. + +- reg-cam-base + Usage: optional + Value type: + Definition: Register values. + +- interrupt-names + Usage: optional + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: optional + Value type: + Definition: Interrupt associated with OPE HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for OPE HW. + +- camss-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed + in "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CDM HW. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for CDM HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: List of strings corresponds clock-rates levels. + Supported strings: lowsvs, svs, svs_l1, nominal, turbo. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +Examples: +qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <1>; + status = "ok"; +}; + +ope: qcom,ope@ac00000 { + cell-index = <0>; + compatible = "qcom,ope"; + reg = + <0x42000 0x400>, + <0x42400 0x200>, + <0x42600 0x200>, + <0x42800 0x4400>, + <0x46c00 0x190>, + <0x46d90 0x1270>; + reg-names = + "ope_cdm", + "ope_top", + "ope_qos", + "ope_pp", + "ope_bus_rd", + "ope_bus_wr"; + reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>; + interrupts = ; + interrupt-names = "ope"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk_src", + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + + clock-rates = + <200000000 0 480000000 0>, + <400000000 0 600000000 0>; + + clock-cntl-level = "svs", "turbo"; + src-clock-name = "ope_clk_src"; + status = "ok"; +}; From 7df7f5a8b0fa83b45bad776b40ee80816b738162 Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Wed, 9 Oct 2019 11:57:16 +0530 Subject: [PATCH 022/190] ARM: dts: msm: correct the dma addr pool for icp Correct the address mapping for dma addr pool for icp. CRs-Fixed: 2541894 Change-Id: Iba1738bc479318da13d2c82406d8260f975c6eaa --- lito-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 10751f4be6ad..01dea577bcf0 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -387,7 +387,7 @@ <&apps_smmu 0x1260 0x0>; label = "icp"; qcom,iommu-faults = "non-fatal"; - qcom,iommu-dma-addr-pool = <0xda00000 0xace00000>; + qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ From 02b92f556575dafc2bd91c9e1a0a61753b06c714 Mon Sep 17 00:00:00 2001 From: Shankar Ravi Date: Thu, 17 Oct 2019 19:40:50 +0530 Subject: [PATCH 023/190] ARM: dts: msm: Remove CSIPHY0 clock vote for CSIPHY3 Remove CSI0PHY clock vote for CSIPHY3 as the depedency is fixed in lito CSIPHY hw. CRs-Fixed: 2548025 Change-Id: I08363bc934bd217268d32892e31635e8b5bb28d5 --- lito-camera.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 01dea577bcf0..90c3e37427b0 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -111,7 +111,6 @@ csi-vdd-voltage = <880000>; mipi-csi-vdd-supply = <&L5A>; clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&camcc CAM_CC_CSIPHY0_CLK>, <&camcc CAM_CC_CSIPHY3_CLK>, <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI3PHYTIMER_CLK>; From 458e662f61bc5cbce07589be3a962b7026d88634 Mon Sep 17 00:00:00 2001 From: Ravikishore Pampana Date: Thu, 24 Oct 2019 15:03:30 +0530 Subject: [PATCH 024/190] dt-bindings: camera: Add TFE support Camera TFE is new hardware. This change adds support for the same. CRs-Fixed: 2545590 Change-Id: I89ce381a83682681a299ef496d5695b303a481b7 --- bindings/msm-cam-isp.txt | 2 +- bindings/msm-cam-tfe-csid.txt | 123 +++++++++++++++++++++++++++++ bindings/msm-cam-tfe.txt | 142 ++++++++++++++++++++++++++++++++++ bindings/msm-cam-tpg.txt | 113 +++++++++++++++++++++++++++ 4 files changed, 379 insertions(+), 1 deletion(-) create mode 100644 bindings/msm-cam-tfe-csid.txt create mode 100644 bindings/msm-cam-tfe.txt create mode 100644 bindings/msm-cam-tpg.txt diff --git a/bindings/msm-cam-isp.txt b/bindings/msm-cam-isp.txt index 896eb9f4d12b..801c3feae3d7 100644 --- a/bindings/msm-cam-isp.txt +++ b/bindings/msm-cam-isp.txt @@ -20,7 +20,7 @@ First Level Node - CAM ISP device - arch-compat Usage: required Value type: - Definition: Should be "vfe" or "ife". + Definition: Should be "vfe", "ife" or "tfe". - ubwc-static-cfg Usage: optional diff --git a/bindings/msm-cam-tfe-csid.txt b/bindings/msm-cam-tfe-csid.txt new file mode 100644 index 000000000000..73a4b7bc069b --- /dev/null +++ b/bindings/msm-cam-tfe-csid.txt @@ -0,0 +1,123 @@ +* Qualcomm Technologies, Inc. MSM Camera TFE CSID + +Camera TFE CSID device provides the definitions for enabling +the TFE CSID hardware. It also provides the functions for the client +to control the TFE CSID hardware. + +======================= +Required Node Structure +======================= +The TFE CSID device is described in one level of the device node. + +====================================== +First Level Node - CAM TFE CSID device +====================================== +- compatible + Usage: required + Value type: + Definition: Should be "qcom,csid530" + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg-names + Usage: required + Value type: + Definition: Should be "csid". + +- reg + Usage: required + Value type: + Definition: Register values. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with TFE CSID HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for TFE CSID HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for TFE CSID HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for TFE CSID HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +Example: + + qcom,tfe_csid0@5c6e000 { + cell-index = <0>; + compatible = "qcom,csid530"; + reg-names = reg-names = "csid", "top", "camnoc"; + reg = <0x5c6e000 0x5000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <240000000 0 0 0 256000000 0 0>, + <384000000 0 0 0 460800000 0 0>, + <426400000 0 0 0 576000000 0 0>, + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; diff --git a/bindings/msm-cam-tfe.txt b/bindings/msm-cam-tfe.txt new file mode 100644 index 000000000000..8f7c21b97765 --- /dev/null +++ b/bindings/msm-cam-tfe.txt @@ -0,0 +1,142 @@ +* Qualcomm Technologies, Inc. MSM Camera TFE + +Camera TFE device provides the definitions for enabling +the TFE hardware. It also provides the functions for the client +to control the TFE hardware. + +======================= +Required Node Structure +======================= +The TFE device is described in one level of the device node. + +====================================== +First Level Node - CAM TFE device +====================================== +Required properties: +- compatible + Usage: required + Value type: + Definition: Should specify the compatibility string for matching the + driver. e.g. "qcom,tfe530" + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg-names + Usage: required + Value type: + Definition: Should specify the name of the register block. + +- reg + Usage: required + Value type: + Definition: Register values. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with TFE HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for TFE HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for TFE HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for TFE HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +Optional properties: +- clock-names-option + Usage: optional + Value type: + Definition: Optional clock names. + +- clocks-option + Usage: required if clock-names-option defined + Value type: + Definition: List of optinal clocks used for TFE HW. + +- clock-rates-option + Usage: required if clock-names-option defined + Value type: + Definition: List of clocks rates for optional clocks. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +- qcom,cam-cx-ipeak: + Usage: optional + Value type: + phandle - phandle of CX Ipeak device node + bit - Every bit corresponds to a client of CX Ipeak + Definition: CX Ipeak is a mitigation scheme which throttles camera frequency + if all the clients are running at their respective threshold + frequencies to limit CX peak current. + driver in the relevant register. + +- scl-clk-names: + Usage: optional + Value type: + Definition: Scalable clock names to identify which clocks needs to update + along with source clock. + +Example: + cam_tfe0: qcom,tfe0@5c6e000{ + cell-index = <0>; + compatible = "qcom,tfe530"; + reg-names = "tfe0"; + reg = <0x5c6e000 0x5000>; + reg-cam-base = <0x6e000>; + interrupt-names = "tfe0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <256000000 0 150000000>, + <460800000 0 200000000>, + <576000000 0 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; \ No newline at end of file diff --git a/bindings/msm-cam-tpg.txt b/bindings/msm-cam-tpg.txt new file mode 100644 index 000000000000..0e34d93ad576 --- /dev/null +++ b/bindings/msm-cam-tpg.txt @@ -0,0 +1,113 @@ +* Qualcomm Technologies, Inc. MSM Camera TPG + +Camera TPG device provides the definitions for enabling +the TPG hardware. It also provides the functions for the client +to control the TPG hardware. + +======================= +Required Node Structure +======================= +The TPG device is described in one level of the device node. + +====================================== +First Level Node - CAM TPG device +====================================== +Required properties: +- compatible + Usage: required + Value type: + Definition: Should specify the compatibility string for matching the + driver. e.g. "qcom,tpgv1" + +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- reg-names + Usage: required + Value type: + Definition: Should specify the name of the register block. + +- reg + Usage: required + Value type: + Definition: Register values. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with TFE HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for TFE HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for TFE HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for TFE HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +- scl-clk-names: + Usage: optional + Value type: + Definition: Scalable clock names to identify which clocks needs to update + along with source clock. + +Example: + cam_tfe_tpg0: qcom,tpg0@5c66000 { + cell-index = <0>; + compatible = "qcom,tpgv1"; + reg-names = "tpg0", "top"; + reg = <0x5c66000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x66000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_0_cphy_rx_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>; + clock-rates = + <240000000 240000000>, + <341333333 341333333>, + <384000000 384000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; \ No newline at end of file From 6e435e73884ae7113a9cd833082f5e698623e61d Mon Sep 17 00:00:00 2001 From: Abhilash Kumar Date: Tue, 29 Oct 2019 15:50:28 +0530 Subject: [PATCH 025/190] dt-bindings: camera: Add CDM support This change adds support for CDMs with different version. CRs-Fixed: 2535587 Change-Id: I445400138ee4ccb6ec5fcc95e01f190b9c8825bc --- bindings/msm-cam-cdm.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/bindings/msm-cam-cdm.txt b/bindings/msm-cam-cdm.txt index b376cad4a049..a407bd656a0b 100644 --- a/bindings/msm-cam-cdm.txt +++ b/bindings/msm-cam-cdm.txt @@ -54,8 +54,10 @@ to CDM interface node. - compatible Usage: required Value type: - Definition: Should be "qcom,cam480-cpas-cdm0", "qcom,cam480-cpas-cdm1" - "qcom,cam170-cpas-cdm0" or "qcom,cam480-cpas-cdm2". + Definition: Should be "qcom,cam170-cpas-cdm0", "qcom,cam480-cpas-cdm0", + "qcom,cam480-cpas-cdm1", "qcom,cam480-cpas-cdm2", "qcom,cam-cpas-cdm1_0", + "qcom,cam-cpas-cdm1_1", "qcom,cam-cpas-cdm1_2", "qcom,cam-ife-cdm1_2", + "qcom,cam-cpas-cdm2_0" or "qcom,cam-ope-cdm2_0" - label Usage: required @@ -128,7 +130,7 @@ to CDM interface node. Example: qcom,cpas-cdm0@ac48000 { cell-index = <0>; - compatible = "qcom,cam480-cpas-cdm0"; + compatible = "qcom,cam170-cpas-cdm0"; label = "cpas-cdm0"; reg = <0xac48000 0x1000>; reg-names = "cpas-cdm"; From 65164bf66a84e762501f756c6b4c28e5749f1d9a Mon Sep 17 00:00:00 2001 From: Tony Lijo Jose Date: Mon, 11 Nov 2019 13:59:24 +0530 Subject: [PATCH 026/190] ARM: dts: msm: Add support for camera hardware for bengal platform Add support for camera for bengal platforms as a part of new project. CRs-Fixed: 2566316 Change-Id: Ib629d8ef9afc4c79318505ec3b12cb4de7b445da --- bengal-camera-sensor-idp.dtsi | 393 ++++++++++++++++++++++++++++++++++ 1 file changed, 393 insertions(+) create mode 100644 bengal-camera-sensor-idp.dtsi diff --git a/bengal-camera-sensor-idp.dtsi b/bengal-camera-sensor-idp.dtsi new file mode 100644 index 000000000000..65ac19946f1e --- /dev/null +++ b/bengal-camera-sensor-idp.dtsi @@ -0,0 +1,393 @@ +#include +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi632_flash0 &pmi632_flash1>; + torch-source = <&pmi632_torch0 &pmi632_torch1>; + switch-source = <&pmi632_switch0 &pmi632_switch0>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi632_flash0 &pmi632_flash1>; + torch-source = <&pmi632_torch0 &pmi632_torch1>; + switch-source = <&pmi632_switch0 &pmi632_switch0>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi632_flash0 &pmi632_flash1>; + torch-source = <&pmi632_torch0 &pmi632_torch1>; + switch-source = <&pmi632_switch0 &pmi632_switch0>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 20 0>, + <&tlmm 18 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 19 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 28 0>, + <&tlmm 65 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 20 0>, + <&tlmm 18 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 19 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_front0_reset_active + &cam_sensor_csi_mux_oe_active + &cam_sensor_csi_mux_sel_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_front0_reset_suspend + &cam_sensor_csi_mux_oe_suspend + &cam_sensor_csi_mux_sel_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 24 0>, + <&tlmm 66 0>, + <&tlmm 67 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_rear2_reset_active + &cam_sensor_csi_mux_oe_active + &cam_sensor_csi_mux_sel_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_rear2_reset_suspend + &cam_sensor_csi_mux_oe_suspend + &cam_sensor_csi_mux_sel_suspend>; + gpios = <&tlmm 28 0>, + <&tlmm 65 0>, + <&tlmm 66 0>, + <&tlmm 67 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From c693f3a11da85c05e9e6659499f2ed0ed94cde43 Mon Sep 17 00:00:00 2001 From: Abhilash Kumar Date: Fri, 1 Nov 2019 14:08:11 +0530 Subject: [PATCH 027/190] ARM: dts: msm: Add support for target SM4250 Add device nodes for target SM4250. This change will add the device nodes, software nodes and other changes for all hardware modules, SMMU and CRM for SM4250. CRs-Fixed: 2555077 Change-Id: I92195ae7a1a1a2bfe3d331fb1001a75312f21fbc --- bengal-camera.dtsi | 686 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 686 insertions(+) create mode 100644 bengal-camera.dtsi diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi new file mode 100644 index 000000000000..e6620dc2da4f --- /dev/null +++ b/bengal-camera.dtsi @@ -0,0 +1,686 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu"; + status = "ok"; + + msm_cam_smmu_tfe { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x400 0x000>, + <&apps_smmu 0x401 0x000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "tfe"; + tfe_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_ope { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x820 0x000>, + <&apps_smmu 0x821 0x020>, + <&apps_smmu 0x840 0x000>, + <&apps_smmu 0x841 0x000>; + qcom,iommu-faults = "non-fatal"; + multiple-client-devices; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ope", "ope-cdm0"; + ope_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x000>, + <&apps_smmu 0x801 0x020>; + label = "cpas-cdm0"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + + }; + + qcom,cam-cpas@5c11000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x11000 0x13000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; /*Need to be verified*/ + regulator-names = "camss-vdd"; + camss-vdd-supply = <&gcc_camss_top_gdsc>; + clock-names = + "gcc_camss_ahb_clk", + "gcc_camss_top_ahb_clk", + "gcc_camss_top_ahb_clk_src", + "gcc_camss_axi_clk", + "gcc_camss_axi_clk_src"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_AXI_CLK_SRC>; + src-clock-name = "gcc_camss_axi_clk_src"; + clock-rates = + <0 0 0 0 0>, + <0 80000000 80000000 19200000 19200000>, + <0 80000000 80000000 150000000 150000000>, + <0 80000000 80000000 200000000 200000000>, + <0 80000000 80000000 300000000 300000000>, + <0 80000000 80000000 300000000 300000000>, + <0 80000000 80000000 300000000 300000000>; + clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + qcom,msm-bus,name = "cam_ahb"; /*Need to verify*/ + qcom,msm-bus,num-cases = <7>; /*Need to verify*/ + qcom,msm-bus,num-paths = <1>; /*Need to verify*/ + qcom,msm-bus,vectors-KBps = /*Need to verify*/ + , + , + , + , + , + , + ; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "minsvs", + "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "csiphy5", "cci0", "cci1", + "csid0", "csid1", "csid2", "tfe0", + "tfe1", "tfe2", "ope0", "cam-cdm-intf0", + "cpas-cdm0", "ope-cdm0", "tpg0", "tpg1"; + + camera-bus-nodes { + level2-nodes { + level-index = <2>; + level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level2-rt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_0"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level2-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_0"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr: level1-rt0-wr { + cell-index = <2>; + node-name = "level1-rt0-wr"; + parent-node = <&level2_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd_wr: level1-nrt0-rd-wr { + cell-index = <3>; + node-name = "level1-nrt0-rd-wr"; + parent-node = <&level2_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ope0_all_wr: ope0-all-wr { + cell-index = <4>; + node-name = "ope0-all-wr"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope0_all_rd: ope0-all-rd { + cell-index = <5>; + node-name = "ope0-all-rd"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + tfe0_all_wr: tfe0-all-wr { + cell-index = <6>; + node-name = "tfe0-all-wr"; + client-name = "tfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe1_all_wr: tfe1-all-wr { + cell-index = <7>; + node-name = "tfe1-all-wr"; + client-name = "tfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe2_all_wr: tfe2-all-wr { + cell-index = <8>; + node-name = "tfe2-all-wr"; + client-name = "tfe2"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <9>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope_cdm0_all_rd: ope-cdm0-all-rd { + cell-index = <10>; + node-name = "ope-cdm0-all-rd"; + client-name = "ope-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <2>; + cdm-client-names = "vfe"; + status = "ok"; + }; + + cam_cpas_cdm: qcom,cpas-cdm0@5c23000 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm2_0"; + label = "cpas-cdm"; + reg = <0x5c23000 0x400>; + reg-names = "cpas-cdm0"; + reg-cam-base = <0x23000>; + interrupts = ; + interrupt-names = "cpas-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = "cam_cc_cpas_top_ahb_clk"; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>; + clock-rates = <0>; + clock-cntl-level = "svs"; + cdm-client-names = "tfe0", "tfe1", "tfe2"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + cam_ope_cdm: qcom,ope-cdm0@5c42000 { + cell-index = <0>; + compatible = "qcom,cam-ope-cdm2_0"; + label = "ope-cdm"; + reg = <0x5c42000 0x400>; + reg-names = "ope-cdm0"; + reg-cam-base = <0x42000>; + interrupts = ; + interrupt-names = "ope-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = <0 0 0>, + <0 0 0>, + <0 0 0>, + <0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ope"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "tfe"; + status = "ok"; + }; + + cam_tfe_csid0: qcom,tfe_csid0@5c6e000 { + cell-index = <0>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c6e000 0x5000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x6e000 0x11000 0x13000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <240000000 240000000 0 240000000 256000000 256000000 150000000>, + <384000000 384000000 0 341333333 460800000 460800000 200000000>, + <426400000 426400000 0 384000000 576000000 576000000 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe0: qcom,tfe0@5c6e000 { + cell-index = <0>; + compatible = "qcom,tfe530"; + reg-names = "tfe0"; + reg = <0x5c6e000 0x5000>; + reg-cam-base = <0x6e000>; + interrupt-names = "tfe0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <256000000 256000000 150000000>, + <460800000 460800000 200000000>, + <576000000 576000000 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_csid1: qcom,tfe_csid1@5c75000 { + cell-index = <1>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c75000 0x5000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x75000 0x11000 0x13000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <240000000 240000000 0 240000000 256000000 256000000 150000000>, + <384000000 384000000 0 341333333 460800000 460800000 200000000>, + <426400000 426400000 0 384000000 576000000 576000000 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe1: qcom,tfe1@5c75000 { + cell-index = <1>; + compatible = "qcom,tfe530"; + reg-names = "tfe1"; + reg = <0x5c75000 0x5000>; + reg-cam-base = <0x75000>; + interrupt-names = "tfe1"; + interrupts = <0 213 0>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <256000000 256000000 150000000>, + <460800000 460800000 200000000>, + <576000000 576000000 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_csid2: qcom,tfe_csid2@5c7c000 { + cell-index = <2>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c7c000 0x5000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x7c000 0x11000 0x13000>; + interrupt-names = "csid2"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <240000000 240000000 0 240000000 256000000 256000000 150000000>, + <384000000 384000000 0 341333333 460800000 460800000 200000000>, + <426400000 426400000 0 384000000 576000000 576000000 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe2: qcom,tfe2@5c7c000 { + cell-index = <2>; + compatible = "qcom,tfe530"; + reg-names = "tfe2"; + reg = <0x5c7c000 0x5000>; + reg-cam-base = <0x7c000>; + interrupt-names = "tfe2"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk", + "tfe_axi_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>; + clock-rates = + <256000000 256000000 150000000>, + <460800000 460800000 200000000>, + <576000000 576000000 300000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_tpg0: qcom,tpg0@5c66000 { + cell-index = <0>; + compatible = "qcom,tpgv1"; + reg-names = "tpg0", "top"; + reg = <0x5c66000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x66000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_0_cphy_rx_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>; + clock-rates = + <240000000 240000000>, + <341333333 341333333>, + <384000000 384000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + cam_tfe_tpg1: qcom,tpg0@5c68000 { + cell-index = <1>; + compatible = "qcom,tpgv1"; + reg-names = "tpg0", "top"; + reg = <0x5c68000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x68000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_1_cphy_rx_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>; + clock-rates = + <240000000 240000000>, + <341333333 341333333>, + <384000000 384000000>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <1>; + status = "ok"; + }; + + ope: qcom,ope@0x5c42000 { + cell-index = <0>; + compatible = "qcom,ope"; + reg = + <0x5c42000 0x400>, + <0x5c42400 0x200>, + <0x5c42600 0x200>, + <0x5c42800 0x4400>, + <0x5c46c00 0x190>, + <0x5c46d90 0x1270>; + reg-names = + "ope_cdm", + "ope_top", + "ope_qos", + "ope_pp", + "ope_bus_rd", + "ope_bus_wr"; + reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>; + interrupts = ; + interrupt-names = "ope"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = + <171428571 200000000 200000000>, + <171428571 266600000 266600000>, + <240000000 465000000 465000000>, + <240000000 580000000 580000000>; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + src-clock-name = "ope_clk_src"; + status = "ok"; + }; +}; From 8047f459e076daf9bb409842bea60290be34d4e1 Mon Sep 17 00:00:00 2001 From: Tony Lijo Jose Date: Mon, 11 Nov 2019 11:45:42 +0530 Subject: [PATCH 028/190] ARM: dts: msm: Add dtsi nodes for csiphy and cci Add the device tree nodes for cci and csiphy. CRs-Fixed: 2566316 Change-Id: I7db2187686f0223d5bbdf3692a0e7d71329def3f --- bengal-camera.dtsi | 188 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 186 insertions(+), 2 deletions(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index e6620dc2da4f..23c6041547f9 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -6,6 +6,191 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + reg = <0x05C52000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x52000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr"; + gdscr-supply = <&gcc_camss_top_gdsc>; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&L18A>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <341330000 0 200000000 0>, + <341330000 0 200000000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + reg = <0x05C53000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x53000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr"; + gdscr-supply = <&gcc_camss_top_gdsc>; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&L18A>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <341330000 0 200000000 0>, + <341330000 0 200000000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + reg = <0x05C54000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x54000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr"; + gdscr-supply = <&gcc_camss_top_gdsc>; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&L18A>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_2_CLK>, + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <341330000 0 200000000 0>, + <341330000 0 200000000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x05C1B000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1B000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_0_CLK>, + <&gcc GCC_CAMSS_CCI_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 22 0>, + <&tlmm 23 0>, + <&tlmm 29 0>, + <&tlmm 30 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam_smmu { compatible = "qcom,msm-cam-smmu"; status = "ok"; @@ -153,8 +338,7 @@ "turbo", "turbo"; client-id-based; client-names = - "csiphy0", "csiphy1", "csiphy2", "csiphy3", - "csiphy4", "csiphy5", "cci0", "cci1", + "csiphy0", "csiphy1", "csiphy2", "cci0", "csid0", "csid1", "csid2", "tfe0", "tfe1", "tfe2", "ope0", "cam-cdm-intf0", "cpas-cdm0", "ope-cdm0", "tpg0", "tpg1"; From e25cf96ef1267ae6da4d925bc03ebc7c227e1937 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Tue, 29 Oct 2019 12:13:44 -0700 Subject: [PATCH 029/190] dt-bindings: camera: Update documentation for camera modules Add description for different blocks in camera with new camera version compatibility strings. CRs-Fixed: 2528908 Change-Id: I0a1760ac44a82c30a7b2bd993db864d356838f06 --- bindings/msm-cam-cci.txt | 6 +++--- bindings/msm-cam-csiphy.txt | 3 ++- bindings/msm-cam-eeprom.txt | 2 +- bindings/msm-cam-ife-csid.txt | 7 ++++--- bindings/msm-cam-smmu.txt | 2 +- bindings/msm-cam-vfe.txt | 7 ++++--- bindings/msm-camera-flash.txt | 2 +- 7 files changed, 16 insertions(+), 13 deletions(-) diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index 59651a354157..be7cc712818a 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -724,7 +724,7 @@ Example: }; &cam_cci0 { - actuator0: qcom,actuator@0 { + actuator0: qcom,actuator0 { cell-index = <0>; reg = <0x0>; compatible = "qcom,actuator"; @@ -738,7 +738,7 @@ Example: rgltr-load-current = <100000>; }; - ois0: qcom,ois@0 { + ois0: qcom,ois0 { cell-index = <0>; reg = <0x0>; compatible = "qcom,ois"; @@ -761,7 +761,7 @@ Example: pinctrl-1 = <&cam_shared_clk_suspend &cam_res_mgr_suspend>; }; - qcom,cam-sensor@0 { + qcom,cam-sensor0 { cell-index = <0>; compatible = "qcom,camera"; reg = <0x0>; diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index f67f4ef7986a..4048d66dea02 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -15,7 +15,8 @@ First Level Node - CSIPHY device Value type: Definition: Should be "qcom,csiphy-v1.0", "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", - "qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy". + "qcom,csiphy-v1.2.2", "qcom,csiphy-v1.2.3", + "qcom,csiphy-v2.0", "qcom,csiphy". - cell-index: csiphy hardware core index Usage: required diff --git a/bindings/msm-cam-eeprom.txt b/bindings/msm-cam-eeprom.txt index d77f337a9e3c..d692385b4ffc 100644 --- a/bindings/msm-cam-eeprom.txt +++ b/bindings/msm-cam-eeprom.txt @@ -434,7 +434,7 @@ First Level Node - CAM EEPROM device Example: - eeprom0: qcom,eeprom@0 { + eeprom0: qcom,eeprom0 { cell-index = <0>; reg = <0x0>; qcom,eeprom-name = "msm_eeprom"; diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index ecff78ee1b27..5b31262b3bf5 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -16,8 +16,9 @@ First Level Node - CAM IFE CSID device Usage: required Value type: Definition: Should be "qcom,csid170", "qcom,csid175", "qcom,csid175_200", - "qcom,csid480", "qcom,csid-lite170", "qcom,csid-lite175", - "qcom,csid-lite480" or "qcom,csid-custom480". + "qcom,csid480", "qcom,csid580", "qcom,csid-lite170", "qcom,csid-lite175", + "qcom,csid-lite480" or "qcom,csid-custom480", + "qcom,csid-lite580" or "qcom,csid-custom580". - cell-index Usage: required @@ -89,7 +90,7 @@ Example: qcom,csid0@acb3000 { cell-index = <0>; - compatible = "qcom,csid480"; + compatible = "qcom,csid580"; reg = <0xacb3000 0x1000>; reg-names = "csid"; interrupts = <0 464 0>; diff --git a/bindings/msm-cam-smmu.txt b/bindings/msm-cam-smmu.txt index eca2bd82ec79..326325c225af 100644 --- a/bindings/msm-cam-smmu.txt +++ b/bindings/msm-cam-smmu.txt @@ -96,7 +96,7 @@ Third Level Node - CAM SMMU memory map device Definition: Should specify IOVA granularity for shared memory region. Example: - qcom,cam_smmu@0 { + qcom,cam_smmu { compatible = "qcom,msm-cam-smmu"; msm_cam_smmu_icp { diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index 2866d67cf5e2..b6f030c85880 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -17,8 +17,9 @@ Required properties: Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", "qcom,vfe175_130", - "qcom,vfe-lite480", "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". + driver. e.g. "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", + "qcom,vfe175_130", "qcom,vfe-lite580", "qcom,vfe-lite480", + "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". - cell-index Usage: required @@ -116,7 +117,7 @@ Optional properties: Example: qcom,vfe0@acaf000 { cell-index = <0>; - compatible = "qcom,vfe480"; + compatible = "qcom,vfe580"; reg-names = "ife"; reg = <0xacaf000 0x4000>; interrupts = <0 465 0>; diff --git a/bindings/msm-camera-flash.txt b/bindings/msm-camera-flash.txt index ab81329df08e..a44753c5e522 100644 --- a/bindings/msm-camera-flash.txt +++ b/bindings/msm-camera-flash.txt @@ -107,7 +107,7 @@ First Level Node - CAM FLASH device Example: -led_flash_rear: qcom,camera-flash@0 { +led_flash_rear: qcom,camera-flash0 { reg = <0x00 0x00>; cell-index = <0>; compatible = "qcom,camera-flash"; From 7fc312b726e22344de5c69870b28d4ac4bacbe0d Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Wed, 18 Sep 2019 18:26:34 -0700 Subject: [PATCH 030/190] ARM: dts: msm: Add camera device tree support for Lahaina Add device tree nodes for various camera modules with memory, clock, interrupt, pinctrl, power and version information. Add interconnect bus IDs and separate ahb static bw vote config from bus vectors. Change minsvs vdd corner to be mapped to lowsvs level. Also, add DT nodes for sensors and its accompanying hw for Lahaina platform. CRs-Fixed: 2528908, 2525881 Change-Id: If676a7738e7945c14e8e7e39adc973b2e7de21cb --- lahaina-camera-sensor-cdp.dtsi | 491 +++++++++ lahaina-camera-sensor-mtp.dtsi | 491 +++++++++ lahaina-camera.dtsi | 1744 ++++++++++++++++++++++++++++++++ 3 files changed, 2726 insertions(+) create mode 100644 lahaina-camera-sensor-cdp.dtsi create mode 100644 lahaina-camera-sensor-mtp.dtsi create mode 100644 lahaina-camera.dtsi diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..bacedeac9cff --- /dev/null +++ b/lahaina-camera-sensor-cdp.dtsi @@ -0,0 +1,491 @@ +#include + +&cam_cci0 { + actuator_triple_tele: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_wide: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_tele: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof1: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..bacedeac9cff --- /dev/null +++ b/lahaina-camera-sensor-mtp.dtsi @@ -0,0 +1,491 @@ +#include + +&cam_cci0 { + actuator_triple_tele: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_wide: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_tele: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof1: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi new file mode 100644 index 000000000000..411eca36b0dd --- /dev/null +++ b/lahaina-camera.dtsi @@ -0,0 +1,1744 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0x0ac6a000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6a000>; + interrupts = ; + interrupt-names = "csiphy0"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac6c000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6c000>; + interrupts = ; + interrupt-names = "csiphy1"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <400000000 0 300000000 0>; + + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac6e000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6e000>; + interrupts = ; + interrupt-names = "csiphy2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac70000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x70000>; + interrupts = ; + interrupt-names = "csiphy3"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy4 { + cell-index = <4>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac72000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x72000>; + interrupts = ; + interrupt-names = "csiphy4"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY4_CLK>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy4_clk", + "csi4phytimer_clk_src", + "csi4phytimer_clk"; + src-clock-name = "csi4phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy5: qcom,csiphy5 { + cell-index = <5>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac74000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x74000>; + interrupts = ; + interrupt-names = "csiphy5"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY5_CLK>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy5_clk", + "csi5phytimer_clk_src", + "csi5phytimer_clk"; + src-clock-name = "csi5phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci"; + reg = <0xac4f000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4f000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&clock_camcc CAM_CC_CCI_0_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_0_CLK>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 107 0>, + <&tlmm 108 0>, + <&tlmm 109 0>, + <&tlmm 110 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci"; + reg = <0xac50000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x50000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&clock_camcc CAM_CC_CCI_1_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_1_CLK>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active &cci3_active>; + pinctrl-1 = <&cci2_suspend &cci3_suspend>; + gpios = <&tlmm 111 0>, + <&tlmm 112 0>, + <&tlmm 113 0>, + <&tlmm 114 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2", + "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu"; + status = "ok"; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x440>, + <&apps_smmu 0x801 0x440>, + <&apps_smmu 0x840 0x440>, + <&apps_smmu 0x841 0x440>, + <&apps_smmu 0xC00 0x440>, + <&apps_smmu 0xC01 0x440>, + <&apps_smmu 0xC40 0x440>, + <&apps_smmu 0xC41 0x440>; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ife"; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2040 0x400>, + <&apps_smmu 0x2440 0x400>; + label = "jpeg"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20E2 0x400>, + <&apps_smmu 0x24E2 0x400>, + <&apps_smmu 0x2000 0x400>, + <&apps_smmu 0x2001 0xc60>, + <&apps_smmu 0x2400 0x400>, + <&apps_smmu 0x2401 0xc60>, + <&apps_smmu 0x2060 0x400>, + <&apps_smmu 0x2061 0xc60>, + <&apps_smmu 0x2460 0x400>, + <&apps_smmu 0x2461 0xc60>, + <&apps_smmu 0x2020 0x400>, + <&apps_smmu 0x2021 0xc60>, + <&apps_smmu 0x2420 0x400>, + <&apps_smmu 0x2421 0xc60>; + label = "icp"; + qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 150MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x9600000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10a00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.3 GB */ + iova-region-name = "io"; + iova-region-start = <0x10c00000>; + iova-region-len = <0xcf300000>; + iova-region-id = <0x3>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10b00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20C0 0x400>, + <&apps_smmu 0x24C0 0x400>; + label = "cpas-cdm0"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + }; + + qcom,cam-cpas { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0xac40000 0x1000>, + <0xac42000 0x8000>; + reg-cam-base = <0x40000 0x42000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_hf_clk", + "gcc_axi_sf_clk", + "slow_ahb_clk_src", + "cpas_ahb_clk", + "cpas_core_ahb_clk", + "camnoc_axi_clk_src", + "camnoc_axi_clk"; + clocks = + <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_HF_AXI_CLK>, + <&clock_gcc GCC_CAMERA_SF_AXI_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CORE_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "camnoc_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0 0>, + <0 0 0 80000000 0 0 300000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 480000000 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", + "nominal", "nominal_l1", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_CAMERA_CFG>; + cam-ahb-num-cases = <8>; + cam-ahb-bw-KBps = + <0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", + "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "csiphy5", "cci0", "cci1", + "csid0", "csid1", "csid2", "csid3", + "csid4", "ife0", "ife1", "ife2", "ife3", "ife4", + "custom0", "custom1", "ipe0", "cam-cdm-intf0", + "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_rd_wr_sum: level3-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_HF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_SF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt1_rd_wr_sum: level3-nrt1-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = + "cam_sf_icp"; + interconnects = + <&mmss_noc MASTER_CAMNOC_ICP + &mc_virt SLAVE_EBI1>; + }; + }; + }; + + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt0_wr: level2-rt0-wr { + cell-index = <3>; + node-name = "level2-rt0-wr"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt0_rd: level2-rt0-rd { + cell-index = <4>; + node-name = "level2-rt0-rd"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_wr: level2-nrt0-wr { + cell-index = <5>; + node-name = "level2-nrt0-wr"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_rd: level2-nrt0-rd { + cell-index = <6>; + node-name = "level2-nrt0-rd"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_rd: level2-nrt1-rd { + cell-index = <7>; + node-name = "level2-nrt1-rd"; + parent-node = <&level3_nrt1_rd_wr_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr0: level1-rt0-wr0 { + cell-index = <8>; + node-name = "level1-rt0-wr0"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr1: level1-rt0-wr1 { + cell-index = <9>; + node-name = "level1-rt0-wr1"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_rd0: level1-rt0-rd0 { + cell-index = <10>; + node-name = "level1-rt0-rd0"; + parent-node = <&level2_rt0_rd>; + traffic-merge-type = + ; + }; + + level1_rt0_wr2: level1-rt0-wr2 { + cell-index = <11>; + node-name = "level1-rt0-wr2"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr3: level1-rt0-wr3 { + cell-index = <12>; + node-name = "level1-rt0-wr3"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr0: level1-nrt0-wr0 { + cell-index = <13>; + node-name = "level1-nrt0-wr0"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd0: level1-nrt0-rd0 { + cell-index = <14>; + node-name = "level1-nrt0-rd0"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr1: level1-nrt0-wr1 { + cell-index = <15>; + node-name = "level1-nrt0-wr1"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd1: level1-nrt0-rd1 { + cell-index = <16>; + node-name = "level1-nrt0-rd2"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ife2_ubwc_stats_wr: ife2-ubwc-stats-wr { + cell-index = <17>; + node-name = "ife0-ubwc-stats-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level2_rt0_wr>; + }; + + ife0_ubwc_stats_wr: ife0-ubwc-stats-wr { + cell-index = <18>; + node-name = "ife0-ubwc-stats-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife1_ubwc_stats_wr: ife1-ubwc-stats-wr { + cell-index = <19>; + node-name = "ife1-ubwc-stats-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife0_linear_pdaf_wr: ife0-linear-pdaf-wr { + cell-index = <20>; + node-name = "ife0-linear-pdaf-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife1_linear_pdaf_wr: ife1-linear-pdaf-wr { + cell-index = <21>; + node-name = "ife1-linear-pdaf-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; // TODO + parent-node = <&level1_rt0_wr1>; + }; + + ife2_linear_pdaf_wr: ife2-linear-pdaf-wr { + cell-index = <22>; + node-name = "ife2-linear-pdaf-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; // TODO + parent-node = <&level1_rt0_wr1>; + }; + + ife3_rdi_all_wr: ife3-rdi-all-wr { + cell-index = <23>; + node-name = "ife3-rdi-all-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife0_rdi_all_rd: ife0-rdi-all-rd { + cell-index = <24>; + node-name = "ife0-rdi-all-rd"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife1_rdi_all_rd: ife1-rdi-all-rd { + cell-index = <25>; + node-name = "ife1-rdi-all-rd"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife2_rdi_all_rd: ife2-rdi-all-rd { + cell-index = <26>; + node-name = "ife2-rdi-all-rd"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + custom0_rd: custom0-rd { + cell-index = <27>; + node-name = "custom0-rd"; + client-name = "custom0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd0>; + }; + + custom1_rd: custom1-rd { + cell-index = <28>; + node-name = "custom1-rd"; + client-name = "custom1"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife2_rdi_pixel_raw_wr: ife2-rdi-pixel-raw-wr { + cell-index = <29>; + node-name = "ife2-rdi-pixel-raw-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife4_rdi_all_wr: ife4-rdi-all-wr { + cell-index = <30>; + node-name = "ife4-rdi-all-wr"; + client-name = "ife4"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + custom1_wr: custom1-wr { + cell-index = <31>; + node-name = "custom1-wr"; + client-name = "custom1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { + cell-index = <32>; + node-name = "ife0-rdi-pixel-raw-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr3>; + }; + + ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { + cell-index = <33>; + node-name = "ife1-rdi-pixel-raw-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr3>; + }; + + custom0_wr: custom0-wr { + cell-index = <34>; + node-name = "custom0-wr"; + client-name = "custom0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr3>; + }; + + ipe0_all_wr: ipe0-all-wr { + cell-index = <35>; + node-name = "ipe0-all-wr"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <36>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + ipe0_ref_rd: ipe0-ref-rd { + cell-index = <37>; + node-name = "ipe0-ref-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <38>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + ipe0_in_rd: ipe0-in-rd { + cell-index = <39>; + node-name = "ipe0-in-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + jpeg_enc0_all_wr: jpeg-enc0-all-wr { + cell-index = <40>; + node-name = "jpeg-enc0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr1>; + }; + + jpeg_dma0_all_wr: jpeg-dma0-all-wr { + cell-index = <41>; + node-name = "jpeg-dma0-all-wr"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr1>; + }; + + jpeg_enc0_all_rd: jpeg-enc0-all-rd { + cell-index = <42>; + node-name = "jpeg-enc0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + jpeg_dma0_all_rd: jpeg-dma0-all-rd { + cell-index = <43>; + node-name = "jpeg-dma0-all-rd"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <44>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <45>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_rd>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc"; + status = "ok"; + }; + + qcom,cpas-cdm0 { + cell-index = <0>; + compatible = "qcom,cam170-cpas-cdm0"; + label = "cpas-cdm"; + reg = <0xac4d000 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x4d000>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife"; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_csid0: qcom,csid0 { + cell-index = <0>; + compatible = "qcom,csid580"; + reg-names = "csid"; + reg = <0xacb5200 0x1000>; + reg-cam-base = <0xb5200>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_0_areg", + "ife_0_ahb", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <400000000 0 400000000 0 338000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 600000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,ife0 { + cell-index = <0>; + compatible = "qcom,vfe580"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacb4000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xb4000 0x42000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_0_ahb", + "ife_0_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <0 100000000 338000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 600000000 0 0>, + <0 400000000 720000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_0_areg"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid1: qcom,csid1 { + cell-index = <1>; + compatible = "qcom,csid580"; + reg-names = "csid"; + reg = <0xacc4200 0x1000>; + reg-cam-base = <0xc4200>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_1_areg", + "ife_1_ahb", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <400000000 0 400000000 0 338000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 600000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,ife1 { + cell-index = <1>; + compatible = "qcom,vfe580"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacc3000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xc3000 0x42000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_1_ahb", + "ife_1_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <0 100000000 338000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 600000000 0 0>, + <0 400000000 720000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_1_areg"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid2: qcom,csid2 { + cell-index = <2>; + compatible = "qcom,csid580"; + reg-names = "csid"; + reg = <0xacf0200 0x1000>; + reg-cam-base = <0xf0200>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_2_areg", + "ife_2_ahb", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_2_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_2_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_2_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_2_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_2_CLK>, + <&clock_camcc CAM_CC_IFE_2_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_2_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <400000000 0 400000000 0 338000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 600000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe2: qcom,ife2 { + cell-index = <2>; + compatible = "qcom,vfe580"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacef000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xef000 0x42000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_2_ahb", + "ife_2_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_2_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_2_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_2_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_2_CLK>, + <&clock_camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <0 100000000 338000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 600000000 0 0>, + <0 400000000 720000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_1_areg"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0 { + cell-index = <3>; + compatible = "qcom,csid-lite580"; + reg-names = "csid-lite"; + reg = <0xacd9200 0x1000>; + reg-cam-base = <0xd9200>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_lite_ahb", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <400000000 0 0 0 400000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,ife-lite0 { + cell-index = <3>; + compatible = "qcom,vfe-lite580"; + reg-names = "ife-lite"; + reg = <0xacd9000 0x2200>; + reg-cam-base = <0xd9000>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_lite_ahb", + "ife_lite_axi", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_csid_lite1: qcom,csid-lite1 { + cell-index = <4>; + compatible = "qcom,csid-lite580"; + reg-names = "csid-lite"; + reg = <0xacdb400 0x1000>; + reg-cam-base = <0xdb400>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_lite_ahb", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <400000000 0 0 0 400000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite1: qcom,ife-lite1 { + cell-index = <4>; + compatible = "qcom,vfe-lite580"; + reg-names = "ife-lite"; + reg = <0xacdb200 0x2200>; + reg-cam-base = <0xdb200>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_lite_ahb", + "ife_lite_axi", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", + "qcom,ipe0", + "qcom,bps"; + num-a5 = <1>; + num-ipe = <1>; + num-bps = <1>; + status = "ok"; + icp_pc_en; + ipe_bps_pc_en; + }; + + cam_a5: qcom,a5 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_AHB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; + + clock-rates = + <100000000 0 400000000 0>, + <200000000 0 480000000 0>, + <300000000 0 600000000 0>, + <400000000 0 600000000 0>, + <400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + fw_name = "CAMERA_ICP.elf"; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; + }; + + cam_ipe0: qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac9a000 0xc000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x9a000>; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk_src", + "ipe_0_clk"; + src-clock-name = "ipe_0_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_IPE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IPE_0_AXI_CLK>, + <&clock_camcc CAM_CC_IPE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_0_CLK>; + + clock-rates = + <0 0 0 300000000 0>, + <0 0 0 475000000 0>, + <0 0 0 525000000 0>, + <0 0 0 700000000 0>, + <0 0 0 700000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; + }; + + cam_bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac7a000 0x8000>; + reg-names = "bps_top"; + reg-cam-base = <0x7a000>; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = + "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk_src", + "bps_clk"; + src-clock-name = "bps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_BPS_AHB_CLK>, + <&clock_camcc CAM_CC_BPS_AREG_CLK>, + <&clock_camcc CAM_CC_BPS_AXI_CLK>, + <&clock_camcc CAM_CC_BPS_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_CLK>; + + clock-rates = + <0 0 0 200000000 0>, + <0 0 0 400000000 0>, + <0 0 0 480000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac53000 0x4000>; + reg-cam-base = <0x53000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac57000 0x4000>; + reg-cam-base = <0x57000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; +}; From bb5a3bd3abac402a999f60fd67d5d629e2baace0 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Tue, 10 Dec 2019 13:50:50 -0800 Subject: [PATCH 031/190] ARM: dts: msm: Fix order of clock naming in csid lite node for lahaina The order of clock names should be same as the order of its clock values. Fix order of name for ahb clock in csid lite device tree node in camera. CRs-Fixed: 2583813 Change-Id: I265af8f302ac4d857f479d3ddd556bae13f872db --- lahaina-camera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 411eca36b0dd..cc3446ac1727 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -819,7 +819,7 @@ ; constituent-paths = ; // TODO + CAM_CPAS_PATH_DATA_IFE_PDAF>; parent-node = <&level1_rt0_wr1>; }; @@ -833,7 +833,7 @@ ; constituent-paths = ; // TODO + CAM_CPAS_PATH_DATA_IFE_PDAF>; parent-node = <&level1_rt0_wr1>; }; @@ -1506,11 +1506,11 @@ camss-supply = <&cam_cc_titan_top_gdsc>; clock-names = "ife_csid_clk_src", - "ife_lite_ahb", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", + "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, From 887d51afeeeef16c3195de33a94e0bca4bfd1f3f Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Thu, 19 Dec 2019 18:19:05 -0800 Subject: [PATCH 032/190] dt-bindings: camera: Add bindings for camera sync driver Add description for camera sync with new compatibility string. CRs-Fixed: 2590413 Change-Id: I746b8c629cb487ced930ff63b3f807c968c60f3f --- bindings/msm-camera.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/bindings/msm-camera.txt b/bindings/msm-camera.txt index 04548caa330b..cbbb136b2318 100644 --- a/bindings/msm-camera.txt +++ b/bindings/msm-camera.txt @@ -2,7 +2,7 @@ Required properties: - compatible : - - "qcom,cam-req-mgr" + - "qcom,cam-req-mgr", "qcom,cam-sync" - qcom,sensor-manual-probe : specify if sensor probes at kernel boot time or user driven Example: @@ -11,3 +11,8 @@ Example: compatible = "qcom,cam-req-mgr"; qcom,sensor-manual-probe; }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; From ab1fbff88538effcf357188c54173af9ae1f69d5 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Thu, 19 Dec 2019 15:58:44 -0800 Subject: [PATCH 033/190] ARM: dts: msm: Add camera sync driver for Lahaina target Enable dtsi based compilation for camera sync driver for lahaina targets. CRs-Fixed: 2590413 Change-Id: I12b8eb7b5979cc63125255887ca58aa55850a5e3 --- lahaina-camera.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index cc3446ac1727..bbc625fda52f 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -6,6 +6,11 @@ status = "ok"; }; + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + cam_csiphy0: qcom,csiphy0 { cell-index = <0>; compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; From 0c3551b1a330a0fa52ee11e7e400cb2d4bf4094a Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Sun, 5 Jan 2020 17:35:42 -0800 Subject: [PATCH 034/190] ARM: dts: msm: Fix supply and areg clock name in ife2 dt node for Lahaina Fix supply and clock name in ife2 dt node. Also, remove DSP clock as IFE2 does not support HVX for Lahaina target. CRs-Fixed: 2584631 Change-Id: Ia0f58142e9562446d4e7c517cd717d5cc78c200c --- lahaina-camera.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index cc3446ac1727..6d93cc87f8a2 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1346,7 +1346,7 @@ interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; - ife1-supply = <&cam_cc_ife_2_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", @@ -1391,7 +1391,7 @@ interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; - ife1-supply = <&cam_cc_ife_2_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; clock-names = "ife_2_ahb", "ife_2_areg", @@ -1413,11 +1413,8 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_clk_src"; - scl-clk-names = "ife_1_areg"; + scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; - clock-names-option = "ife_dsp_clk"; - clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; - clock-rates-option = <720000000>; ubwc-static-cfg = <0x1026 0x1036>; status = "ok"; }; From d7724d02c952af9e516fb086ae058ee67147c884 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Tue, 14 Jan 2020 13:14:46 -0800 Subject: [PATCH 035/190] ARM: dts: msm: Add camera sync driver for Kona target Enable dtsi based compilation for camera sync driver for kona target. CRs-Fixed: 2590413 Change-Id: I2d9d4267f0c6192c4b5c7d91a736b9c9821aaec6 --- kona-camera.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index 7058993dd731..f34d650b8073 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -6,6 +6,11 @@ status = "ok"; }; + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + cam_csiphy0: qcom,csiphy@ac6a000 { cell-index = <0>; compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; From df76a7fb3ab6fe97c1a3e36e85d4f16cdfaabf52 Mon Sep 17 00:00:00 2001 From: Sureshnaidu Laveti Date: Fri, 17 Jan 2020 15:51:28 -0800 Subject: [PATCH 036/190] ARM: dts: msm: Update power source of rear sensor for lahaina Use cam_v_custom1 as the power source name for additional VANA power source for rear (imx586) sensor on lahaina. CRs-Fixed: 2599484 Change-Id: I68e441eacbaea38cd5291e78c8d2fec501dc0d9a --- lahaina-camera-sensor-cdp.dtsi | 4 ++-- lahaina-camera-sensor-mtp.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index bacedeac9cff..b97ddeb63b34 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -184,11 +184,11 @@ eeprom-src = <&eeprom_triple_wide>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l3>; - cam_vana1-supply = <&pm8008i_l5>; + cam_v_custom1-supply = <&pm8008i_l5>; cam_vdig-supply = <&pm8008i_l1>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vana1", + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index bacedeac9cff..b97ddeb63b34 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -184,11 +184,11 @@ eeprom-src = <&eeprom_triple_wide>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l3>; - cam_vana1-supply = <&pm8008i_l5>; + cam_v_custom1-supply = <&pm8008i_l5>; cam_vdig-supply = <&pm8008i_l1>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vana1", + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; pwm-switch; From 2e9325979d57960968e81504135c3a84715c4bbb Mon Sep 17 00:00:00 2001 From: Karthik Jayakumar Date: Mon, 20 Jan 2020 14:52:58 -0800 Subject: [PATCH 037/190] ARM: dts: msm: Update IPE0 register size for Lahaina Update IPE0 register size to match Lahaina register size. CRs-Fixed: 2584631 Change-Id: Id1ef89f45ee3021866f93bffb89145b25f144b83 --- lahaina-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 41963af224b8..e3406da7924d 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1624,7 +1624,7 @@ cam_ipe0: qcom,ipe0 { cell-index = <0>; compatible = "qcom,cam-ipe"; - reg = <0xac9a000 0xc000>; + reg = <0xac9a000 0x12000>; reg-names = "ipe0_top"; reg-cam-base = <0x9a000>; regulator-names = "ipe0-vdd"; From d2167685692779055c883aa50103f1bfafafdf06 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Mon, 27 Jan 2020 11:11:48 -0800 Subject: [PATCH 038/190] ARM: dts: msm: Add simple-bus compat string in camera for all archs For kernel init to recognize child nodes of camera smmu and cci nodes as platform devices, the parent needs to have "simple-bus" compatibility string. Add required string so that component master framework is able to match device with driver for Kona, Lahaina, Lito and Bengal. CRs-Fixed: 2584631 Change-Id: Ia968a6617f9bb3bdb05fd999a7f87d4eaf580734 --- bengal-camera.dtsi | 4 ++-- kona-camera.dtsi | 6 +++--- lahaina-camera.dtsi | 6 +++--- lito-camera.dtsi | 6 +++--- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index 23c6041547f9..7b2a6d944a47 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -98,7 +98,7 @@ cam_cci0: qcom,cci0 { cell-index = <0>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg = <0x05C1B000 0x1000>; @@ -192,7 +192,7 @@ }; qcom,cam_smmu { - compatible = "qcom,msm-cam-smmu"; + compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; msm_cam_smmu_tfe { diff --git a/kona-camera.dtsi b/kona-camera.dtsi index f34d650b8073..497f08055be0 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -182,7 +182,7 @@ cam_cci0: qcom,cci@ac4f000 { cell-index = <0>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; reg = <0xac4f000 0x1000>; reg-names = "cci"; reg-cam-base = <0x4f000>; @@ -275,7 +275,7 @@ cam_cci1: qcom,cci@ac50000 { cell-index = <1>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; reg = <0xac50000 0x1000>; reg-names = "cci"; reg-cam-base = <0x50000>; @@ -367,7 +367,7 @@ }; qcom,cam_smmu { - compatible = "qcom,msm-cam-smmu"; + compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; msm_cam_smmu_ife { diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index e3406da7924d..189a16d8bad5 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -182,7 +182,7 @@ cam_cci0: qcom,cci0 { cell-index = <0>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; reg = <0xac4f000 0x1000>; reg-names = "cci"; reg-cam-base = <0x4f000>; @@ -275,7 +275,7 @@ cam_cci1: qcom,cci1 { cell-index = <1>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; reg = <0xac50000 0x1000>; reg-names = "cci"; reg-cam-base = <0x50000>; @@ -367,7 +367,7 @@ }; qcom,cam_smmu { - compatible = "qcom,msm-cam-smmu"; + compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; msm_cam_smmu_ife { diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 90c3e37427b0..9cf6320be3d1 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -129,7 +129,7 @@ cam_cci0: qcom,cci0 { cell-index = <0>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg = <0xac4a000 0x1000>; @@ -224,7 +224,7 @@ cam_cci1: qcom,cci1 { cell-index = <1>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg = <0xac4b000 0x1000>; @@ -314,7 +314,7 @@ }; qcom,cam_smmu { - compatible = "qcom,msm-cam-smmu"; + compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; msm_cam_smmu_ife { From fa100ef0cf4410cd44d8d577d4a701edef594fc5 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Tue, 10 Dec 2019 13:31:42 -0800 Subject: [PATCH 039/190] ARM: dts: msm: Fix order of clock naming in csid lite node for kona The order of clock names should be same as the order of its clock values. Fix order of name for ahb clock in csid lite device tree node in camera. CRs-Fixed: 2583813 Change-Id: Ie7ebf744f0ebe9d189055bb412f56902233da9bf --- kona-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index f34d650b8073..d0e5a50b7017 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1440,11 +1440,11 @@ camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", - "ife_lite_ahb", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", + "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, From 0bac11efcdda1d6fe81d6de481b125183dafa07f Mon Sep 17 00:00:00 2001 From: Yulei Yao Date: Mon, 18 Nov 2019 16:03:51 +0800 Subject: [PATCH 040/190] ARM: dts: msm: Add camera dts nodes for Bengal QRD Add 3 rear cameras and 1 front camera nodes for Bengal QRD. CRs-Fixed: 2579384 Change-Id: I8a46d1da591ea09e004813e4c10997342f260c15 --- bengal-camera-sensor-qrd.dtsi | 403 ++++++++++++++++++++++++++++++++++ 1 file changed, 403 insertions(+) create mode 100644 bengal-camera-sensor-qrd.dtsi diff --git a/bengal-camera-sensor-qrd.dtsi b/bengal-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..a4c93476024f --- /dev/null +++ b/bengal-camera-sensor-qrd.dtsi @@ -0,0 +1,403 @@ +#include +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi632_flash0 &pmi632_flash1>; + torch-source = <&pmi632_torch0 &pmi632_torch1>; + switch-source = <&pmi632_switch0 &pmi632_switch0>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi632_flash0 &pmi632_flash1>; + torch-source = <&pmi632_torch0 &pmi632_torch1>; + switch-source = <&pmi632_switch0 &pmi632_switch0>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pmi632_flash0 &pmi632_flash1>; + torch-source = <&pmi632_torch0 &pmi632_torch1>; + switch-source = <&pmi632_switch0 &pmi632_switch0>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 20 0>, + <&tlmm 18 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 21 0>, + <&tlmm 19 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 28 0>, + <&tlmm 65 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 20 0>, + <&tlmm 18 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 21 0>, + <&tlmm 19 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_front0_reset_active + &cam_sensor_csi_mux_oe_active + &cam_sensor_csi_mux_sel_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_front0_reset_suspend + &cam_sensor_csi_mux_oe_suspend + &cam_sensor_csi_mux_sel_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 24 0>, + <&tlmm 66 0>, + <&tlmm 67 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-custom2 = <3>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_CSIMUX_OE0", + "CAM_CSIMUX_SEL0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_rear2_reset_active + &cam_sensor_csi_mux_oe_active + &cam_sensor_csi_mux_sel_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_rear2_reset_suspend + &cam_sensor_csi_mux_oe_suspend + &cam_sensor_csi_mux_sel_suspend>; + gpios = <&tlmm 28 0>, + <&tlmm 65 0>, + <&tlmm 66 0>, + <&tlmm 67 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-custom2 = <3>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_CSIMUX_OE1", + "CAM_CSIMUX_SEL1"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From aed8a404e74a4bd8b5ffec7286002642bf116906 Mon Sep 17 00:00:00 2001 From: Karthik Jayakumar Date: Fri, 24 Jan 2020 14:25:18 -0800 Subject: [PATCH 041/190] ARM: dts: msm: Update IFE2 & CSID2 IRQ numbers for lahaina Update IFE2 IRQ number to 641 and CSID2 IRQ to 640 for lahaina. CRs-Fixed: 2584631 Change-Id: I738a4a1ed55c67bb07fa21b21afdd5f9fe675523 --- lahaina-camera.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index e3406da7924d..72347f658252 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1348,7 +1348,7 @@ reg = <0xacf0200 0x1000>; reg-cam-base = <0xf0200>; interrupt-names = "csid"; - interrupts = ; + interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; ife2-supply = <&cam_cc_ife_2_gdsc>; @@ -1393,7 +1393,7 @@ <0xac42000 0x8000>; reg-cam-base = <0xef000 0x42000>; interrupt-names = "ife"; - interrupts = ; + interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; ife2-supply = <&cam_cc_ife_2_gdsc>; From a63276ffbcff874bc7fac33595c419ffbe2b89f9 Mon Sep 17 00:00:00 2001 From: Gaurav Jindal Date: Wed, 11 Dec 2019 09:45:17 +0530 Subject: [PATCH 042/190] dt-bindings: camera: Add CSID and IFE support for lagoon This commit adds compatible string for CSID and IFE for lagoon target. Change-Id: Id0ecd8ae9f051a50cd21692811f9360d84dda0df CRs-Fixed: 2571273 --- bindings/msm-cam-ife-csid.txt | 3 ++- bindings/msm-cam-vfe.txt | 7 ++++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index 5b31262b3bf5..7835bbfee272 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -15,7 +15,8 @@ First Level Node - CAM IFE CSID device - compatible Usage: required Value type: - Definition: Should be "qcom,csid170", "qcom,csid175", "qcom,csid175_200", + + Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", "qcom,csid175_200", "qcom,csid480", "qcom,csid580", "qcom,csid-lite170", "qcom,csid-lite175", "qcom,csid-lite480" or "qcom,csid-custom480", "qcom,csid-lite580" or "qcom,csid-custom580". diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index b6f030c85880..89866769ce09 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -17,9 +17,10 @@ Required properties: Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", - "qcom,vfe175_130", "qcom,vfe-lite580", "qcom,vfe-lite480", - "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". + + driver. e.g. "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", + "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe-lite580", "qcom,vfe-lite480", + "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". - cell-index Usage: required From 1952f61c8e8d81c18887828f3be9f03ef60aadce Mon Sep 17 00:00:00 2001 From: Karthik Jayakumar Date: Fri, 31 Jan 2020 23:11:27 -0800 Subject: [PATCH 043/190] ARM: dts: msm: Add bringup fixes for Lahaina Fix RDI write path on ife2. Fix EEPROM setting for Lahaina sensor. Update sensor cell id's to match user space. CRs-Fixed: 2584631 Change-Id: I7693a4cef98383cc5539c25f18799bf70f5f0970 --- lahaina-camera-sensor-cdp.dtsi | 18 +++++++++--------- lahaina-camera-sensor-mtp.dtsi | 18 +++++++++--------- lahaina-camera.dtsi | 2 +- 3 files changed, 19 insertions(+), 19 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index b97ddeb63b34..9f9d62f576ce 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -132,7 +132,7 @@ }; qcom,cam-sensor0 { - cell-index = <0>; + cell-index = <5>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <0>; sensor-position-roll = <90>; @@ -174,7 +174,7 @@ }; qcom,cam-sensor1 { - cell-index = <1>; + cell-index = <4>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <1>; sensor-position-roll = <90>; @@ -201,8 +201,8 @@ &cam_sensor_active_rst1>; pinctrl-1 = <&cam_sensor_mclk1_suspend &cam_sensor_suspend_rst1>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -217,7 +217,7 @@ }; qcom,cam-sensor3 { - cell-index = <3>; + cell-index = <0>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; eeprom-src = <&eeprom_tof2>; @@ -270,7 +270,7 @@ rgltr-load-current = <103000>; }; - eeprom_triple_uw: qcom,eeprom3 { + eeprom_triple_uw: qcom,eeprom2 { cell-index = <2>; compatible = "qcom,eeprom"; cam_vio-supply = <&pm8008j_l3>; @@ -371,7 +371,7 @@ }; qcom,cam-sensor2 { - cell-index = <2>; + cell-index = <6>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; sensor-position-roll = <90>; @@ -413,7 +413,7 @@ }; qcom,cam-sensor4 { - cell-index = <4>; + cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <4>; eeprom-src = <&eeprom_tof1>; @@ -449,7 +449,7 @@ }; qcom,cam-sensor5 { - cell-index = <5>; + cell-index = <2>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <5>; sensor-position-roll = <270>; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index b97ddeb63b34..9f9d62f576ce 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -132,7 +132,7 @@ }; qcom,cam-sensor0 { - cell-index = <0>; + cell-index = <5>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <0>; sensor-position-roll = <90>; @@ -174,7 +174,7 @@ }; qcom,cam-sensor1 { - cell-index = <1>; + cell-index = <4>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <1>; sensor-position-roll = <90>; @@ -201,8 +201,8 @@ &cam_sensor_active_rst1>; pinctrl-1 = <&cam_sensor_mclk1_suspend &cam_sensor_suspend_rst1>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -217,7 +217,7 @@ }; qcom,cam-sensor3 { - cell-index = <3>; + cell-index = <0>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; eeprom-src = <&eeprom_tof2>; @@ -270,7 +270,7 @@ rgltr-load-current = <103000>; }; - eeprom_triple_uw: qcom,eeprom3 { + eeprom_triple_uw: qcom,eeprom2 { cell-index = <2>; compatible = "qcom,eeprom"; cam_vio-supply = <&pm8008j_l3>; @@ -371,7 +371,7 @@ }; qcom,cam-sensor2 { - cell-index = <2>; + cell-index = <6>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; sensor-position-roll = <90>; @@ -413,7 +413,7 @@ }; qcom,cam-sensor4 { - cell-index = <4>; + cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <4>; eeprom-src = <&eeprom_tof1>; @@ -449,7 +449,7 @@ }; qcom,cam-sensor5 { - cell-index = <5>; + cell-index = <2>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <5>; sensor-position-roll = <270>; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 72347f658252..685f4331d7a2 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -935,7 +935,7 @@ traffic-data = ; traffic-transaction-type = - ; + ; constituent-paths = Date: Mon, 3 Feb 2020 14:14:08 -0800 Subject: [PATCH 044/190] dt-bindings: camera: Add support for new TPG version This change adds example for version 102 Camera PHY-TPG hardware. CRs-Fixed: 2608550 Change-Id: Ia61332d5a9b1a52a716722fcf32ba8fa88804f6a --- bindings/msm-cam-tpg.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bindings/msm-cam-tpg.txt b/bindings/msm-cam-tpg.txt index 0e34d93ad576..869352373c5e 100644 --- a/bindings/msm-cam-tpg.txt +++ b/bindings/msm-cam-tpg.txt @@ -17,7 +17,7 @@ Required properties: Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,tpgv1" + driver. e.g. "qcom,tpg101", "qcom,tpg102" - cell-index Usage: required @@ -89,7 +89,7 @@ Required properties: Example: cam_tfe_tpg0: qcom,tpg0@5c66000 { cell-index = <0>; - compatible = "qcom,tpgv1"; + compatible = "qcom,tpg101"; reg-names = "tpg0", "top"; reg = <0x5c66000 0x400>, <0x5c11000 0x1000>; From 8d51f3ee7d5a146b46f0b4d311592fd25ae4b478 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Mon, 11 Nov 2019 20:29:16 +0530 Subject: [PATCH 045/190] ARM: dts: msm: Add lagoon camera dtsi Add ICP, IPE, BPS, CDM, SMMU, JPEG, IFE,, CSID nodes for lagoon camera. CRs-Fixed: 2571273 Change-Id: Ice517a40a6c01e8a52a96a41fc22e9c4e655b05a --- lagoon-camera.dtsi | 670 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 670 insertions(+) create mode 100644 lagoon-camera.dtsi diff --git a/lagoon-camera.dtsi b/lagoon-camera.dtsi new file mode 100644 index 000000000000..9c2a5e8824b6 --- /dev/null +++ b/lagoon-camera.dtsi @@ -0,0 +1,670 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu"; + status = "ok"; + non-fatal-fault-disabled; + + msm_cam_smmu_lrme { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xD40 0x20>, + <&apps_smmu 0xD60 0x20>; + label = "lrme"; + lrme_iova_mem_map: iova-mem-map { + iova-mem-region-shared { + /* Shared region is 100MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x6400000>; + iova-region-id = <0x1>; + status = "ok"; + }; + /* IO region is approximately 3.3 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0xd800000>; + iova-region-len = <0xd2800000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x820 0xc0>, + <&apps_smmu 0x840 0x0>, + <&apps_smmu 0x860 0xc0>, + <&apps_smmu 0x880 0x0>; + label = "ife"; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xD00 0x20>, + <&apps_smmu 0xD20 0x20>; + label = "jpeg"; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xCA2 0x0>, + <&apps_smmu 0xCC0 0x20>, + <&apps_smmu 0xCE0 0x20>; + label = "icp"; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 150MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x9600000>; + iova-region-id = <0x1>; + iova-granularity = <0x15>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10A00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3 GB */ + iova-region-name = "io"; + iova-region-start = <0x10C00000>; + iova-region-len = <0xCF300000>; + iova-region-id = <0x3>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* qdss region is approximately 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10B00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xC80 0x0>; + label = "cpas-cdm0"; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc", + "lrmecdm"; + status = "ok"; + }; + + qcom,cpas-cdm0@ac48000 { + cell-index = <0>; + compatible = "qcom,cam170-cpas-cdm0"; + label = "cpas-cdm"; + reg = <0xac48000 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x48000>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_soc_ahb_clk", + "cam_cc_cpas_ahb_clk", + "cam_cc_camnoc_axi_clk"; + clocks = + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>; + clock-rates = <0 0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife"; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_csid0: qcom,csid0@acb3000 { + cell-index = <0>; + compatible = "qcom,csid170_200"; + reg-names = "csid"; + reg = <0xacb3000 0x1000>; + reg-cam-base = <0xb3000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0 0>, + <384000000 0 0 0 404000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + status = "ok"; + }; + + cam_vfe0: qcom,vfe0@acaf000 { + cell-index = <0>; + compatible = "qcom,vfe170_150"; + reg-names = "ife"; + reg = <0xacaf000 0x4000>; + reg-cam-base = <0xaf000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <320000000 0 0>, + <404000000 0 0>, + <480000000 0 0>, + <600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <600000000>; + status = "ok"; + }; + + cam_csid1: qcom,csid1@acba000 { + cell-index = <1>; + compatible = "qcom,csid170_200"; + reg-names = "csid"; + reg = <0xacba000 0x1000>; + reg-cam-base = <0xba000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0 0>, + <384000000 0 0 0 404000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + status = "ok"; + }; + + cam_vfe1: qcom,vfe1@acb6000 { + cell-index = <1>; + compatible = "qcom,vfe170_150"; + reg-names = "ife"; + reg = <0xacb6000 0x4000>; + reg-cam-base = <0xb6000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <320000000 0 0>, + <404000000 0 0>, + <480000000 0 0>, + <600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <600000000>; + status = "ok"; + }; + + cam_csid2: qcom,csid2@acc1000 { + cell-index = <2>; + compatible = "qcom,csid170_200"; + reg-names = "csid"; + reg = <0xacc1000 0x1000>; + reg-cam-base = <0xc1000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_2_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_2_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0 0>, + <384000000 0 0 0 404000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + status = "ok"; + }; + + cam_vfe2: qcom,vfe2@acbd000 { + cell-index = <2>; + compatible = "qcom,vfe170_150"; + reg-names = "ife"; + reg = <0xacbd000 0x4000>; + reg-cam-base = <0xbd000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_2_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <320000000 0 0>, + <404000000 0 0>, + <480000000 0 0>, + <600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_2_DSP_CLK>; + clock-rates-option = <600000000>; + status = "ok"; + }; + + cam_csid_lite: qcom,csid-lite@acc8000 { + cell-index = <3>; + compatible = "qcom,csid-lite170"; + reg-names = "csid-lite"; + reg = <0xacc8000 0x1000>; + reg-cam-base = <0xc8000>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0>, + <384000000 0 0 0 400000000 0>, + <400000000 0 0 0 480000000 0>, + <400000000 0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + status = "ok"; + }; + + cam_vfe_lite: qcom,vfe-lite@acc4000 { + cell-index = <3>; + compatible = "qcom,vfe-lite170"; + reg-names = "ife-lite"; + reg = <0xacc4000 0x4000>; + reg-cam-base = <0xc4000>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <320000000 0>, + <400000000 0>, + <480000000 0>, + <600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", + "qcom,ipe0", + "qcom,bps"; + num-a5 = <1>; + num-ipe = <1>; + num-bps = <1>; + status = "ok"; + }; + + cam_a5: qcom,a5@ac00000 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "soc_ahb_clk", + "icp_clk", + "icp_clk_src"; + clocks = + <&camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_ICP_CLK>, + <&camcc CAM_CC_ICP_CLK_SRC>; + + clock-rates = + <100000000 0 0 384000000>, + <200000000 0 0 404000000>, + <300000000 0 0 600000000>, + <404000000 0 0 600000000>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + fw_name = "CAMERA_ICP.elf"; + ubwc-cfg = <0x73 0x1CF>; + status = "ok"; + }; + + cam_ipe0: qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac87000 0xa000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x87000>; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk", + "ipe_0_clk_src"; + src-clock-name = "ipe_0_clk_src"; + clocks = <&camcc CAM_CC_IPE_0_AHB_CLK>, + <&camcc CAM_CC_IPE_0_AREG_CLK>, + <&camcc CAM_CC_IPE_0_AXI_CLK>, + <&camcc CAM_CC_IPE_0_CLK>, + <&camcc CAM_CC_IPE_0_CLK_SRC>; + + clock-rates = + <0 0 0 0 240000000>, + <0 0 0 0 320000000>, + <0 0 0 0 404000000>, + <0 0 0 0 538000000>, + <0 0 0 0 600000000>; + clock-cntl-level = "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + status = "ok"; + }; + + cam_bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac6f000 0x8000>; + reg-names = "bps_top"; + reg-cam-base = <0x6f000>; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk", + "bps_clk_src"; + src-clock-name = "bps_clk_src"; + clocks = + <&camcc CAM_CC_BPS_AHB_CLK>, + <&camcc CAM_CC_BPS_AREG_CLK>, + <&camcc CAM_CC_BPS_AXI_CLK>, + <&camcc CAM_CC_BPS_CLK>, + <&camcc CAM_CC_BPS_CLK_SRC>; + + clock-rates = + <0 0 0 0 200000000>, + <0 0 0 0 404000000>, + <0 0 0 0 480000000>, + <0 0 0 0 600000000>, + <0 0 0 0 600000000>; + clock-cntl-level = "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc@ac4e000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac4e000 0x4000>; + reg-cam-base = <0x4e000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = + <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma@0xac52000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac52000 0x4000>; + reg-cam-base = <0x52000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = + <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + qcom,cam-lrme { + compatible = "qcom,cam-lrme"; + arch-compat = "lrme"; + status = "ok"; + }; + + cam_lrme: qcom,lrme@ac6b000 { + cell-index = <0>; + compatible = "qcom,lrme"; + reg-names = "lrme"; + reg = <0xac6b000 0xa00>; + reg-cam-base = <0x6b000>; + interrupt-names = "lrme"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "lrme_clk_src", + "lrme_clk"; + clocks = + <&camcc CAM_CC_LRME_CLK_SRC>, + <&camcc CAM_CC_LRME_CLK>; + clock-rates = + <200000000 0>, + <269333333 0>, + <323200000 0>, + <404000000 0>, + <404000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "lrme_clk_src"; + status = "ok"; + }; +}; From d6fc2fefaea87c845d5b8298710e5d086f42f8f3 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Fri, 20 Dec 2019 12:33:52 +0530 Subject: [PATCH 046/190] ARM: dts: msm: Override csiphy version for lito v2 Add camera dtsi to override CSIPHY version as v1.2.2.2 for lito v2. The purpose of this change is to bifurcate the CSIPHY settings for lito v2. CRs-Fixed: 2591712 Change-Id: I32f4acf790cd61811dc08f4e225faade2382594d --- bindings/msm-cam-csiphy.txt | 2 +- lito-v2-camera.dtsi | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 lito-v2-camera.dtsi diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index 4048d66dea02..fba46eed3b10 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -16,7 +16,7 @@ First Level Node - CSIPHY device Definition: Should be "qcom,csiphy-v1.0", "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", "qcom,csiphy-v1.2.2", "qcom,csiphy-v1.2.3", - "qcom,csiphy-v2.0", "qcom,csiphy". + "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2", "qcom,csiphy". - cell-index: csiphy hardware core index Usage: required diff --git a/lito-v2-camera.dtsi b/lito-v2-camera.dtsi new file mode 100644 index 000000000000..9b292b1bc692 --- /dev/null +++ b/lito-v2-camera.dtsi @@ -0,0 +1,16 @@ +/* Override CSIPHY version */ +&cam_csiphy0 { + compatible = "qcom,csiphy-v1.2.2.2", "qcom,csiphy"; +}; + +&cam_csiphy1 { + compatible = "qcom,csiphy-v1.2.2.2", "qcom,csiphy"; +}; + +&cam_csiphy2 { + compatible = "qcom,csiphy-v1.2.2.2", "qcom,csiphy"; +}; + +&cam_csiphy3 { + compatible = "qcom,csiphy-v1.2.2.2", "qcom,csiphy"; +}; From 9ef5a489ce77cc65d7e78fcdd8583f1998017abd Mon Sep 17 00:00:00 2001 From: Venkat Chinta Date: Mon, 3 Feb 2020 15:03:39 -0800 Subject: [PATCH 047/190] ARM: dts: msm: Add support for PHY-TPG in Lahaina and Bengal This change adds support for Camera CSI-PHY TPG hardware version 102. CRs-Fixed: 2608550 Change-Id: I220c2b0a7631568cff649a15c3e0511cc95ad4c7 --- bengal-camera.dtsi | 6 ++--- lahaina-camera.dtsi | 55 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 57 insertions(+), 4 deletions(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index 7b2a6d944a47..f771d37433fb 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -773,7 +773,7 @@ cam_tfe_tpg0: qcom,tpg0@5c66000 { cell-index = <0>; - compatible = "qcom,tpgv1"; + compatible = "qcom,tpg101"; reg-names = "tpg0", "top"; reg = <0x5c66000 0x400>, <0x5c11000 0x1000>; @@ -796,9 +796,9 @@ status = "ok"; }; - cam_tfe_tpg1: qcom,tpg0@5c68000 { + cam_tfe_tpg1: qcom,tpg1@5c68000 { cell-index = <1>; - compatible = "qcom,tpgv1"; + compatible = "qcom,tpg101"; reg-names = "tpg0", "top"; reg = <0x5c68000 0x400>, <0x5c11000 0x1000>; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 53ef9e3f112c..0c24a25aa896 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -585,7 +585,8 @@ "csid0", "csid1", "csid2", "csid3", "csid4", "ife0", "ife1", "ife2", "ife3", "ife4", "custom0", "custom1", "ipe0", "cam-cdm-intf0", - "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0"; + "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", + "tpg0", "tpg1"; camera-bus-nodes { level3-nodes { @@ -1568,6 +1569,58 @@ status = "ok"; }; + cam_csiphy_tpg0: qcom,tpg0@ac97000 { + cell-index = <0>; + compatible = "qcom,tpg102"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xac97000 0x100>, + <0xac40000 0x1000>; + reg-cam-base = <0x97000 0x40000>; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-rates = + <400000000 0 300000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "csi0phytimer_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg1: qcom,tpg1@ac98000 { + cell-index = <1>; + compatible = "qcom,tpg102"; + reg-names = "tpg1", "cam_cpas_top"; + reg = <0xac98000 0x100>, + <0xac40000 0x1000>; + reg-cam-base = <0x98000 0x40000>; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-rates = + <400000000 0 300000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "csi1phytimer_clk_src"; + status = "ok"; + }; + qcom,cam-icp { compatible = "qcom,cam-icp"; compat-hw-name = "qcom,a5", From 516e4e717889e2443b44bdb79a63bfd84aac74df Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Fri, 7 Feb 2020 18:07:49 -0800 Subject: [PATCH 048/190] ARM: dts: msm: Add support for led flash in camera for Lahaina Adding flash and torch info in camera device tree. CRs-Fixed: 2584631 Change-Id: I118883be46b8073ca31e3525dad7d56d2a504054 --- lahaina-camera-sensor-cdp.dtsi | 37 ++++++++++++++++++++++++++++++++++ lahaina-camera-sensor-mtp.dtsi | 37 ++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index 9f9d62f576ce..5d9645693639 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -1,5 +1,39 @@ #include +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + &cam_cci0 { actuator_triple_tele: qcom,actuator0 { cell-index = <0>; @@ -140,6 +174,7 @@ sensor-position-yaw = <180>; eeprom-src = <&eeprom_triple_tele>; actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; cam_vdig-supply = <&pm8008i_l2>; @@ -182,6 +217,7 @@ sensor-position-yaw = <180>; actuator-src = <&actuator_triple_wide>; eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l3>; cam_v_custom1-supply = <&pm8008i_l5>; @@ -379,6 +415,7 @@ sensor-position-yaw = <180>; eeprom-src = <&eeprom_triple_uw>; actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l6>; cam_vdig-supply = <&pm8008i_l2>; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index 9f9d62f576ce..5d9645693639 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -1,5 +1,39 @@ #include +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + &cam_cci0 { actuator_triple_tele: qcom,actuator0 { cell-index = <0>; @@ -140,6 +174,7 @@ sensor-position-yaw = <180>; eeprom-src = <&eeprom_triple_tele>; actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; cam_vdig-supply = <&pm8008i_l2>; @@ -182,6 +217,7 @@ sensor-position-yaw = <180>; actuator-src = <&actuator_triple_wide>; eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l3>; cam_v_custom1-supply = <&pm8008i_l5>; @@ -379,6 +415,7 @@ sensor-position-yaw = <180>; eeprom-src = <&eeprom_triple_uw>; actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l6>; cam_vdig-supply = <&pm8008i_l2>; From 54eb427c1164ca439bda0fc4d7b75ab93138d806 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Mon, 17 Feb 2020 20:17:16 -0800 Subject: [PATCH 049/190] ARM: dts: msm: Add custom vcsel source for rear tof sensor in Lahaina Increase peak current for IO regulator and add custom vcsel source. CRs-Fixed: 2584631 Change-Id: Ia98b8036a5cabab0751d845e307dd0764ef86968 --- lahaina-camera-sensor-cdp.dtsi | 12 ++++++------ lahaina-camera-sensor-mtp.dtsi | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index 9f9d62f576ce..7e83169f5180 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -103,13 +103,13 @@ cam_vdig-supply = <&pm8350_s12>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; + cam_v_custom1-supply = <&pm8008j_l7>; regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; + "cam_clk", "cam_vana", "cam_v_custom1"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; + rgltr-load-current = <200000 680000 0 50000 29000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -228,13 +228,13 @@ cam_vdig-supply = <&pm8350_s12>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; + cam_v_custom1-supply = <&pm8008j_l7>; regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; + "cam_clk", "cam_vana", "cam_v_custom1"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; + rgltr-load-current = <200000 680000 0 50000 29000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index 9f9d62f576ce..7e83169f5180 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -103,13 +103,13 @@ cam_vdig-supply = <&pm8350_s12>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; + cam_v_custom1-supply = <&pm8008j_l7>; regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; + "cam_clk", "cam_vana", "cam_v_custom1"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; + rgltr-load-current = <200000 680000 0 50000 29000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -228,13 +228,13 @@ cam_vdig-supply = <&pm8350_s12>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; + cam_v_custom1-supply = <&pm8008j_l7>; regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; + "cam_clk", "cam_vana", "cam_v_custom1"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; + rgltr-load-current = <200000 680000 0 50000 29000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active From dc22611ef648a66467cef802ce746683d933431a Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Sat, 15 Feb 2020 06:30:22 +0800 Subject: [PATCH 050/190] ARM: dts: msm: Add camera nodes for Lahaina Add camera nodes for Lahaina QRD device. Change-Id: I1b73df1b11100114575e532f89d2b4afade10f22 CRs-Fixed: 2625098 --- lahaina-camera-sensor-qrd.dtsi | 491 +++++++++++++++++++++++++++++++++ 1 file changed, 491 insertions(+) create mode 100644 lahaina-camera-sensor-qrd.dtsi diff --git a/lahaina-camera-sensor-qrd.dtsi b/lahaina-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..9f9d62f576ce --- /dev/null +++ b/lahaina-camera-sensor-qrd.dtsi @@ -0,0 +1,491 @@ +#include + +&cam_cci0 { + actuator_triple_tele: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_wide: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_tele: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_v_custom1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof1: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From 7482bf56d2b4237726beaf6de9efb55807b5fd69 Mon Sep 17 00:00:00 2001 From: Karthik Jayakumar Date: Thu, 27 Feb 2020 14:13:00 -0800 Subject: [PATCH 051/190] ARM: dts: msm: Update rear tof sensor configuration for Lahaina Changes the cell index to match user space definitions for rear TOF sensor. CRs-Fixed: 2584631 Change-Id: I299149ea969ba587d3c2b694caf3580a7c6ef4df --- lahaina-camera-sensor-cdp.dtsi | 2 +- lahaina-camera-sensor-mtp.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index 7ba7e85cb507..eca5277709d0 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -253,7 +253,7 @@ }; qcom,cam-sensor3 { - cell-index = <0>; + cell-index = <7>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; eeprom-src = <&eeprom_tof2>; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index 7ba7e85cb507..eca5277709d0 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -253,7 +253,7 @@ }; qcom,cam-sensor3 { - cell-index = <0>; + cell-index = <7>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; eeprom-src = <&eeprom_tof2>; From 302c0d5c091b616e1718ba25f1eda3ceaaddb030 Mon Sep 17 00:00:00 2001 From: Ashwini Muduganti Date: Sat, 15 Feb 2020 06:30:22 +0800 Subject: [PATCH 052/190] ARM: dts: msm: Add camera nodes for Lahaina Add camera nodes for Lahaina QRD device. Change-Id: I1b73df1b11100114575e532f89d2b4afade10f22 CRs-Fixed: 2625098 --- lahaina-camera-sensor-qrd.dtsi | 491 +++++++++++++++++++++++++++++++++ 1 file changed, 491 insertions(+) create mode 100644 lahaina-camera-sensor-qrd.dtsi diff --git a/lahaina-camera-sensor-qrd.dtsi b/lahaina-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..9f9d62f576ce --- /dev/null +++ b/lahaina-camera-sensor-qrd.dtsi @@ -0,0 +1,491 @@ +#include + +&cam_cci0 { + actuator_triple_tele: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_wide: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_tele: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_v_custom1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + eeprom-src = <&eeprom_tof2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_vana1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_vana1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; + rgltr-load-current = <5000 680000 0 50000 29000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_tof1: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor4 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 116 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From e973ea7ab9f318b9bc03d2567273553c7f63d104 Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Thu, 12 Mar 2020 09:41:04 +0800 Subject: [PATCH 053/190] ARM: dts: msm: Update camera device tree inclusions for Lahaina Add flash nodes to enable camera functionality on Lahaina QRD. Change-Id: I47ab4a0a44b5f3accbf599f6ac33df0b4bd71e9e CRs-Fixed: 2625098 --- lahaina-camera-sensor-qrd.dtsi | 51 +++++++++++++++++++++++++++++----- 1 file changed, 44 insertions(+), 7 deletions(-) diff --git a/lahaina-camera-sensor-qrd.dtsi b/lahaina-camera-sensor-qrd.dtsi index 9f9d62f576ce..eca5277709d0 100644 --- a/lahaina-camera-sensor-qrd.dtsi +++ b/lahaina-camera-sensor-qrd.dtsi @@ -1,5 +1,39 @@ #include +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + &cam_cci0 { actuator_triple_tele: qcom,actuator0 { cell-index = <0>; @@ -103,13 +137,13 @@ cam_vdig-supply = <&pm8350_s12>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; + cam_v_custom1-supply = <&pm8008j_l7>; regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; + "cam_clk", "cam_vana", "cam_v_custom1"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; + rgltr-load-current = <200000 680000 0 50000 29000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -140,6 +174,7 @@ sensor-position-yaw = <180>; eeprom-src = <&eeprom_triple_tele>; actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; cam_vdig-supply = <&pm8008i_l2>; @@ -182,6 +217,7 @@ sensor-position-yaw = <180>; actuator-src = <&actuator_triple_wide>; eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l3>; cam_v_custom1-supply = <&pm8008i_l5>; @@ -217,7 +253,7 @@ }; qcom,cam-sensor3 { - cell-index = <0>; + cell-index = <7>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <3>; eeprom-src = <&eeprom_tof2>; @@ -228,13 +264,13 @@ cam_vdig-supply = <&pm8350_s12>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; + cam_v_custom1-supply = <&pm8008j_l7>; regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; + "cam_clk", "cam_vana", "cam_v_custom1"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; + rgltr-load-current = <200000 680000 0 50000 29000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -379,6 +415,7 @@ sensor-position-yaw = <180>; eeprom-src = <&eeprom_triple_uw>; actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l6>; cam_vdig-supply = <&pm8008i_l2>; From acff28265ecc0f39f5e9571977be49b04d980f01 Mon Sep 17 00:00:00 2001 From: Pavan Kumar Chilamkurthi Date: Sat, 7 Dec 2019 04:04:47 -0800 Subject: [PATCH 054/190] ARM: dts: msm: Add support to discard a region in dma space Add support to discard a specified address space region inside the full dma map region for lahaina, kona and lito. CRs-Fixed: 2580128 Change-Id: Ibc5f316e73d020eb2ff500fad6ed92ea2a36c34e --- kona-camera.dtsi | 8 +++++--- lahaina-camera.dtsi | 8 +++++--- lito-camera.dtsi | 8 +++++--- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index e76f07ad0eb1..b6f117801b88 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -435,7 +435,8 @@ <&apps_smmu 0x2420 0x400>, <&apps_smmu 0x2421 0x400>; label = "icp"; - qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; + qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -465,11 +466,12 @@ }; iova-mem-region-io { - /* IO region is approximately 3.3 GB */ + /* IO region is approximately 3.7 GB */ iova-region-name = "io"; iova-region-start = <0x10c00000>; - iova-region-len = <0xcf300000>; + iova-region-len = <0xee300000>; iova-region-id = <0x3>; + iova-region-discard = <0xdff00000 0x300000>; status = "ok"; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 0c24a25aa896..d77cb946b32a 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -435,7 +435,8 @@ <&apps_smmu 0x2420 0x400>, <&apps_smmu 0x2421 0xc60>; label = "icp"; - qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; + qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -465,11 +466,12 @@ }; iova-mem-region-io { - /* IO region is approximately 3.3 GB */ + /* IO region is approximately 3.7 GB */ iova-region-name = "io"; iova-region-start = <0x10c00000>; - iova-region-len = <0xcf300000>; + iova-region-len = <0xee300000>; iova-region-id = <0x3>; + iova-region-discard = <0xdff00000 0x300000>; status = "ok"; }; diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 9cf6320be3d1..ef5f0fba9839 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -386,7 +386,8 @@ <&apps_smmu 0x1260 0x0>; label = "icp"; qcom,iommu-faults = "non-fatal"; - qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; + qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -416,11 +417,12 @@ }; iova-mem-region-io { - /* IO region is approximately 3.3 GB */ + /* IO region is approximately 3.7 GB */ iova-region-name = "io"; iova-region-start = <0x10c00000>; - iova-region-len = <0xcf300000>; + iova-region-len = <0xee300000>; iova-region-id = <0x3>; + iova-region-discard = <0xdff00000 0x300000>; status = "ok"; }; From 8e0abb409a1c1b58d5de3d3c0ddca0a6ec977b5a Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Fri, 28 Feb 2020 12:09:51 -0800 Subject: [PATCH 055/190] ARM: dts: msm: Add support for other sensors on Lahaina Add sensor dtsi nodes for cell index 0 for Lahaina DC and cell index 8 and 9 for other DC. Add custom gpio to enable external regulators. CRs-Fixed: 2584631 Change-Id: Iae945932005bcb76550655e700bf0c10719ff19a --- lahaina-camera-sensor-cdp.dtsi | 200 ++++++++++++++++++++++++++++++++- lahaina-camera-sensor-mtp.dtsi | 200 ++++++++++++++++++++++++++++++++- 2 files changed, 392 insertions(+), 8 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index eca5277709d0..4400dc562d50 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -165,6 +165,41 @@ clock-rates = <24000000>; }; + eeprom_ext_rgb0: qcom,eeprom7 { + cell-index = <8>; + compatible = "qcom,eeprom"; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3 + &cam_sensor_active_ext_regs0>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3 + &cam_sensor_suspend_ext_regs0>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>, + <&tlmm 28 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_EXT_REGS0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + qcom,cam-sensor0 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -183,7 +218,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <10000 52000 140000 0 2000000>; @@ -227,7 +261,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; rgltr-load-current = <5000 68000 74000 805000 0 2000000>; @@ -291,6 +324,90 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + qcom,cam-sensor6 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor7 { + cell-index = <8>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_ext_rgb0>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3 + &cam_sensor_active_ext_regs0>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3 + &cam_sensor_suspend_ext_regs0>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>, + <&tlmm 28 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_EXT_REGS0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; &cam_cci1 { @@ -406,6 +523,41 @@ clock-rates = <24000000>; }; + eeprom_ext_rgb1: qcom,eeprom8 { + cell-index = <9>; + compatible = "qcom,eeprom"; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4 + &cam_sensor_active_ext_regs1>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4 + &cam_sensor_suspend_ext_regs1>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_EXT_REGS1"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + qcom,cam-sensor2 { cell-index = <6>; compatible = "qcom,cam-sensor"; @@ -424,7 +576,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <3000 52000 257000 0 2000000>; @@ -501,7 +652,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <5000 35000 301000 0 2000000>; @@ -525,4 +675,46 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + qcom,cam-sensor8 { + cell-index = <9>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_ext_rgb1>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4 + &cam_sensor_active_ext_regs1>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4 + &cam_sensor_suspend_ext_regs1>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_EXT_REGS1"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index eca5277709d0..4400dc562d50 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -165,6 +165,41 @@ clock-rates = <24000000>; }; + eeprom_ext_rgb0: qcom,eeprom7 { + cell-index = <8>; + compatible = "qcom,eeprom"; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3 + &cam_sensor_active_ext_regs0>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3 + &cam_sensor_suspend_ext_regs0>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>, + <&tlmm 28 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_EXT_REGS0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + qcom,cam-sensor0 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -183,7 +218,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <10000 52000 140000 0 2000000>; @@ -227,7 +261,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; rgltr-load-current = <5000 68000 74000 805000 0 2000000>; @@ -291,6 +324,90 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + qcom,cam-sensor6 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor7 { + cell-index = <8>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_ext_rgb0>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3 + &cam_sensor_active_ext_regs0>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3 + &cam_sensor_suspend_ext_regs0>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>, + <&tlmm 28 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_EXT_REGS0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; &cam_cci1 { @@ -406,6 +523,41 @@ clock-rates = <24000000>; }; + eeprom_ext_rgb1: qcom,eeprom8 { + cell-index = <9>; + compatible = "qcom,eeprom"; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4 + &cam_sensor_active_ext_regs1>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4 + &cam_sensor_suspend_ext_regs1>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_EXT_REGS1"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + qcom,cam-sensor2 { cell-index = <6>; compatible = "qcom,cam-sensor"; @@ -424,7 +576,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <3000 52000 257000 0 2000000>; @@ -501,7 +652,6 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <5000 35000 301000 0 2000000>; @@ -525,4 +675,46 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + qcom,cam-sensor8 { + cell-index = <9>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_ext_rgb1>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0>; + rgltr-max-voltage = <0>; + rgltr-load-current = <0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4 + &cam_sensor_active_ext_regs1>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4 + &cam_sensor_suspend_ext_regs1>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_EXT_REGS1"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; From aec5c84fc7baa2349be7aed20f71987401b92126 Mon Sep 17 00:00:00 2001 From: Venkat Chinta Date: Thu, 13 Feb 2020 16:39:54 -0800 Subject: [PATCH 056/190] ARM: dts: msm: Add IFE-CDM support This change adds support for CDM internal to full IFEs on Kona and Lahaina hw. CRs-Fixed: 2621792 Change-Id: Ie4d153e1f7f6e1e2285e59736e4c7d0f6ed20827 --- kona-camera.dtsi | 87 +++++++++++++++++++++------------- lahaina-camera.dtsi | 111 ++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 162 insertions(+), 36 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index e76f07ad0eb1..f3367a3d0ac2 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -381,7 +381,8 @@ <&apps_smmu 0xC40 0x400>, <&apps_smmu 0xC41 0x400>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ife"; + label = "ife", "ife-cdm"; + multiple-client-devices; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -489,7 +490,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; - label = "cpas-cdm0"; + label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { @@ -618,8 +619,8 @@ "csid4", "csid5", "csid6", "ife0", "ife1", "ife2", "ife3", "custom0", "ipe0", "cam-cdm-intf0", "cpas-cdm0", - "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", - "fd0"; + "ife-cdm0", "ife-cdm1", "bps0", "icp0", + "jpeg-dma0", "jpeg-enc0", "fd0"; camera-bus-nodes { level3-nodes { @@ -1127,9 +1128,9 @@ status = "ok"; }; - qcom,cpas-cdm0@ac4d000 { + cam_cpas_cdm: qcom,cpas-cdm@ac4d000 { cell-index = <0>; - compatible = "qcom,cam170-cpas-cdm0"; + compatible = "qcom,cam-cpas-cdm1_2"; label = "cpas-cdm"; reg = <0xac4d000 0x1000>; reg-names = "cpas-cdm"; @@ -1144,50 +1145,74 @@ <&clock_camcc CAM_CC_CPAS_AHB_CLK>; clock-rates = <0 0>; clock-cntl-level = "svs"; - cdm-client-names = "ife"; + cdm-client-names = "ife2", "ife3", "ife4", "ife5", "ife6"; status = "ok"; }; - qcom,cpas-cdm1@acb4200 { - cell-index = <1>; - compatible = "qcom,cam480-cpas-cdm1"; - label = "cpas-cdm"; + qcom,ife-cdm0@acb4200 { + cell-index = <0>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; reg = <0xacb4200 0x1000>; - reg-names = "cpas-cdm"; + reg-names = "ife-cdm0"; reg-cam-base = <0xb4200>; interrupts = ; - interrupt-names = "cpas-cdm"; - regulator-names = "camss"; + interrupt-names = "ife-cdm0"; + regulator-names = "camss","ife0"; camss-supply = <&titan_top_gdsc>; - clock-names = "cam_cc_cpas_slow_ahb_clk", + ife0-supply = <&ife_0_gdsc>; + clock-names = "ife_0_ahb", + "ife_0_areg", + "ife_clk", + "ife_axi_clk", "cam_cc_cpas_ahb_clk"; - clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + clocks = + <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, <&clock_camcc CAM_CC_CPAS_AHB_CLK>; - clock-rates = <0 0>; - clock-cntl-level = "svs"; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; cdm-client-names = "ife0"; - status = "disabled"; + status = "ok"; }; - qcom,cpas-cdm2@acc3200 { - cell-index = <2>; - compatible = "qcom,cam480-cpas-cdm2"; - label = "cpas-cdm"; + qcom,ife-cdm1@acc3200 { + cell-index = <1>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; reg = <0xacc3200 0x1000>; - reg-names = "cpas-cdm"; + reg-names = "ife-cdm1"; reg-cam-base = <0xc3200>; interrupts = ; - interrupt-names = "cpas-cdm"; - regulator-names = "camss"; + interrupt-names = "ife-cdm1"; + regulator-names = "camss","ife1"; camss-supply = <&titan_top_gdsc>; - clock-names = "cam_cc_cpas_slow_ahb_clk", + ife1-supply = <&ife_1_gdsc>; + clock-names = "ife_1_ahb", + "ife_1_areg", + "ife_clk", + "ife_axi_clk", "cam_cc_cpas_ahb_clk"; - clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + clocks = + <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>, <&clock_camcc CAM_CC_CPAS_AHB_CLK>; - clock-rates = <0 0>; - clock-cntl-level = "svs"; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; cdm-client-names = "ife1"; - status = "disabled"; + status = "ok"; }; qcom,cam-isp { diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 0c24a25aa896..64cdcef30407 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -381,7 +381,8 @@ <&apps_smmu 0xC40 0x440>, <&apps_smmu 0xC41 0x440>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ife"; + label = "ife", "ife-cdm"; + multiple-client-devices; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -489,7 +490,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; - label = "cpas-cdm0"; + label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { @@ -585,7 +586,8 @@ "csid0", "csid1", "csid2", "csid3", "csid4", "ife0", "ife1", "ife2", "ife3", "ife4", "custom0", "custom1", "ipe0", "cam-cdm-intf0", - "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", + "ife-cdm0", "ife-cdm1", "ife-cdm2", "cpas-cdm0", + "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", "tpg0", "tpg1"; camera-bus-nodes { @@ -1145,7 +1147,7 @@ qcom,cpas-cdm0 { cell-index = <0>; - compatible = "qcom,cam170-cpas-cdm0"; + compatible = "qcom,cam-cpas-cdm1_2"; label = "cpas-cdm"; reg = <0xac4d000 0x1000>; reg-names = "cpas-cdm"; @@ -1160,7 +1162,106 @@ <&clock_camcc CAM_CC_CPAS_AHB_CLK>; clock-rates = <0 0>; clock-cntl-level = "svs"; - cdm-client-names = "ife"; + cdm-client-names = "ife3", "ife4"; + status = "ok"; + }; + + qcom,ife-cdm0 { + cell-index = <0>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; + reg = <0xacb4200 0x1000>; + reg-names = "ife-cdm0"; + reg-cam-base = <0xb4200>; + interrupts = ; + interrupt-names = "ife-cdm0"; + regulator-names = "camss","ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = "ife_0_ahb", + "ife_0_areg", + "ife_clk", + "ife_axi_clk", + "cam_cc_cpas_ahb_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ife0"; + status = "ok"; + }; + + qcom,ife-cdm1 { + cell-index = <1>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; + reg = <0xacc3200 0x1000>; + reg-names = "ife-cdm1"; + reg-cam-base = <0xc3200>; + interrupts = ; + interrupt-names = "ife-cdm1"; + regulator-names = "camss","ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = "ife_1_ahb", + "ife_1_areg", + "ife_clk", + "ife_axi_clk", + "cam_cc_cpas_ahb_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ife1"; + status = "ok"; + }; + + qcom,ife-cdm2 { + cell-index = <2>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; + reg = <0xacef200 0x1000>; + reg-names = "ife-cdm2"; + reg-cam-base = <0xef200>; + interrupts = ; + interrupt-names = "ife-cdm2"; + regulator-names = "camss","ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = "ife_2_ahb", + "ife_2_areg", + "ife_clk", + "ife_axi_clk", + "cam_cc_cpas_ahb_clk"; + clocks = + <&clock_camcc CAM_CC_IFE_2_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_2_AREG_CLK>, + <&clock_camcc CAM_CC_IFE_2_CLK>, + <&clock_camcc CAM_CC_IFE_2_AXI_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ife2"; status = "ok"; }; From 89a0c3f391a6bddcfc66b66d98923a8ab5c59638 Mon Sep 17 00:00:00 2001 From: Sathish Ambley Date: Tue, 10 Sep 2019 12:24:56 -0700 Subject: [PATCH 057/190] ARM: dts: msm: Add support for Kona XR platform camera hardware Add support for camera for kona XR platforms as a part of new project. CRs-Fixed: 2532247 Change-Id: Ic3747a6e7a620cce5bc48c3f37a51435b7f89bbf --- kona-camera-sensor-xr.dtsi | 687 +++++++++++++++++++++++++++++++++++++ 1 file changed, 687 insertions(+) create mode 100644 kona-camera-sensor-xr.dtsi diff --git a/kona-camera-sensor-xr.dtsi b/kona-camera-sensor-xr.dtsi new file mode 100644 index 000000000000..c0cb17b1319c --- /dev/null +++ b/kona-camera-sensor-xr.dtsi @@ -0,0 +1,687 @@ +#include + +&soc { + led_flash_rear: qcom,camera-flash0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + shared-gpios = <84 83 82 114 145>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_sensor_6dof_vana_active + &cam_sensor_6dof_vdig_active + &cam_sensor_6dof_vio_active + &cam_sensor_active_6 + &cam_sensor_et_vio_active>; + pinctrl-1 = <&cam_sensor_6dof_vana_suspend + &cam_sensor_6dof_vdig_suspend + &cam_sensor_6dof_vio_suspend + &cam_sensor_suspend_6 + &cam_sensor_et_vio_suspend>; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_wide: qcom,actuator4 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + actuator_triple_tele: qcom,actuator5 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <1>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_wide: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l5>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-position = <0>; + sensor-mode = <0>; + cci-master = <0>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + /* RGB Left (Master) */ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l2>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <600000 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rgbleft>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rgbleft>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>, + <&tlmm 117 0>, + <&tlmm 116 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vio = <3>; + gpio-vdig = <4>; + gpio-req-tbl-num = <0 1 2 3 4>; + gpio-req-tbl-flags = <1 0 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_VANA2", + "CAM_VIO2", + "CAM_VDIG2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + /* RGB Right(Slave) */ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l2>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <600000 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rgbright>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rgbright>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>, + <&tlmm 117 0>, + <&tlmm 116 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vio = <3>; + gpio-vdig = <4>; + gpio-req-tbl-num = <0 1 2 3 4>; + gpio-req-tbl-flags = <1 0 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VANA3", + "CAM_VIO3", + "CAM_VDIG3"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + /* 6DOF Left (Slave) */ + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l2>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <6000000 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_6dofright>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_6dofright>; + gpios = <&tlmm 98 0>, + <&tlmm 131 0>, + <&tlmm 84 0>, + <&tlmm 83 0>, + <&tlmm 82 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vio = <3>; + gpio-vdig = <4>; + gpio-req-tbl-num = <0 1 2 3 4>; + gpio-req-tbl-flags = <1 0 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4", + "CAM_VIO4", + "CAM_VDIG4"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + /* 6DOF Right (Master) */ + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <6000000 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_6dofleft>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_6dofleft>; + gpios = <&tlmm 99 0>, + <&tlmm 130 0>, + <&tlmm 84 0>, + <&tlmm 83 0>, + <&tlmm 82 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vio = <3>; + gpio-vdig = <4>; + gpio-req-tbl-num = <0 1 2 3 4>; + gpio-req-tbl-flags = <1 0 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5", + "CAM_VANA5", + "CAM_VIO5", + "CAM_VDIG5"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator6 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2856000>; + rgltr-max-voltage = <3104000>; + rgltr-load-current = <100000>; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <0>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_uw: qcom,eeprom6 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l3>; + cam_clk-supply = <&titan_top_gdsc>; + cam_vaf-supply = <&pm8150a_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>; + rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 96 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <0>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_tof: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8009_l7>; + cam_vdig-supply = <&vreg_tof>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 3600000 0>; + rgltr-max-voltage = <0 3600000 0>; + rgltr-load-current = <180000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_3>; + gpios = <&tlmm 97 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-position = <1>; + sensor-mode = <0>; + cci-master = <1>; + status = "disabled"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /* ET LEFT (Master) */ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8009_l7>; + cam_bob-supply = <&pm8150a_bob>; + cam_vana-supply = <&pm8009_l6>; + cam_vdig-supply = <&pm8009_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>; + rgltr-load-current = <600000 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_etleft>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_etleft>; + gpios = <&tlmm 94 0>, + <&tlmm 93 0>, + <&tlmm 114 0>, + <&tlmm 145 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vio = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VANA0", + "CAM_VIO0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /* ET RIGHT (Left) */ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_bob-supply = <&pm8150a_bob>; + cam_vdig-supply = <&pm8009_l2>; + cam_vio-supply = <&pm8009_l7>; + cam_vana-supply = <&pm8009_l6>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>; + rgltr-load-current = <600000 80000 1200000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_etright>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_etright>; + gpios = <&tlmm 95 0>, + <&tlmm 92 0>, + <&tlmm 114 0>, + <&tlmm 145 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vio = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1", + "CAM_VIO1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + +}; + From 570f2d6df13da2f755e2df787780a414b348f2ef Mon Sep 17 00:00:00 2001 From: Divya Sharma Date: Fri, 3 Apr 2020 11:24:30 -0700 Subject: [PATCH 058/190] Revert "ARM: dts: msm: Add camera nodes for Lahaina" This reverts commit 302c0d5c091b616e1718ba25f1eda3ceaaddb030. Change-Id: I9d0a7d7a0535d3073d0c2db8ea25f49fb72ff68d --- lahaina-camera-sensor-qrd.dtsi | 491 --------------------------------- 1 file changed, 491 deletions(-) delete mode 100644 lahaina-camera-sensor-qrd.dtsi diff --git a/lahaina-camera-sensor-qrd.dtsi b/lahaina-camera-sensor-qrd.dtsi deleted file mode 100644 index 9f9d62f576ce..000000000000 --- a/lahaina-camera-sensor-qrd.dtsi +++ /dev/null @@ -1,491 +0,0 @@ -#include - -&cam_cci0 { - actuator_triple_tele: qcom,actuator0 { - cell-index = <0>; - compatible = "qcom,actuator"; - cci-master = <0>; - cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - actuator_triple_wide: qcom,actuator1 { - cell-index = <1>; - compatible = "qcom,actuator"; - cci-master = <1>; - cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - eeprom_triple_tele: qcom,eeprom0 { - cell-index = <0>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008i_l4>; - cam_vdig-supply = <&pm8008i_l2>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <10000 52000 140000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_triple_wide: qcom,eeprom1 { - cell-index = <1>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008i_l3>; - cam_vana1-supply = <&pm8008i_l5>; - cam_vdig-supply = <&pm8008i_l1>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vio", "cam_vana", "cam_vana1", - "cam_vdig", "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; - rgltr-load-current = <5000 68000 74000 805000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_rst1>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_rst1>; - gpios = <&tlmm 101 0>, - <&tlmm 16 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - cci-master = <1>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_tof2: qcom,eeprom3 { - cell-index = <3>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&pm8008j_l3>; - cam_vdig-supply = <&pm8350_s12>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; - regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; - rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk3_active - &cam_sensor_active_rst3>; - pinctrl-1 = <&cam_sensor_mclk3_suspend - &cam_sensor_suspend_rst3>; - gpios = <&tlmm 103 0>, - <&tlmm 117 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; - cci-master = <0>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor0 { - cell-index = <5>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <0>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_tele>; - actuator-src = <&actuator_triple_tele>; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008i_l4>; - cam_vdig-supply = <&pm8008i_l2>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor1 { - cell-index = <4>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <1>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - actuator-src = <&actuator_triple_wide>; - eeprom-src = <&eeprom_triple_wide>; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008i_l3>; - cam_v_custom1-supply = <&pm8008i_l5>; - cam_vdig-supply = <&pm8008i_l1>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", - "cam_vdig","cam_clk", "cam_bob"; - rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; - rgltr-load-current = <5000 68000 74000 805000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_rst1>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_rst1>; - gpios = <&tlmm 101 0>, - <&tlmm 16 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - cci-master = <1>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor3 { - cell-index = <0>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <3>; - eeprom-src = <&eeprom_tof2>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - cam_vio-supply = <&pm8008j_l3>; - cam_vdig-supply = <&pm8350_s12>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vana-supply = <&pm8008j_l6>; - cam_vana1-supply = <&pm8008j_l7>; - regulator-names = "cam_vio", "cam_vdig", - "cam_clk", "cam_vana", "cam_vana1"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 1170000 0 2800000 3000000>; - rgltr-max-voltage = <1800000 2040000 0 2800000 3600000>; - rgltr-load-current = <5000 680000 0 50000 29000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk3_active - &cam_sensor_active_rst3>; - pinctrl-1 = <&cam_sensor_mclk3_suspend - &cam_sensor_suspend_rst3>; - gpios = <&tlmm 103 0>, - <&tlmm 117 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; - cci-master = <0>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; -}; - -&cam_cci1 { - actuator_triple_uw: qcom,actuator2 { - cell-index = <2>; - compatible = "qcom,actuator"; - cci-master = <0>; - cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - eeprom_triple_uw: qcom,eeprom2 { - cell-index = <2>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008i_l6>; - cam_vdig-supply = <&pm8008i_l2>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <3000 52000 257000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_active - &cam_sensor_active_rst2>; - pinctrl-1 = <&cam_sensor_mclk2_suspend - &cam_sensor_suspend_rst2>; - gpios = <&tlmm 102 0>, - <&tlmm 106 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - cci-master = <0>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_tof1: qcom,eeprom4 { - cell-index = <4>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&pm8008j_l3>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_vio", "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 0>; - rgltr-max-voltage = <1800000 0>; - rgltr-load-current = <185000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk4_active - &cam_sensor_active_rst4>; - pinctrl-1 = <&cam_sensor_mclk4_suspend - &cam_sensor_suspend_rst4>; - gpios = <&tlmm 104 0>, - <&tlmm 116 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK4", - "CAM_RESET4"; - cci-master = <1>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_front: qcom,eeprom5 { - cell-index = <5>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008j_l5>; - cam_vdig-supply = <&pm8008j_l1>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0>; - rgltr-max-voltage = <1800000 2900000 1150000 0>; - rgltr-load-current = <5000 35000 301000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk5_active - &cam_sensor_active_rst5>; - pinctrl-1 = <&cam_sensor_mclk5_suspend - &cam_sensor_suspend_rst5>; - gpios = <&tlmm 105 0>, - <&tlmm 115 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK5", - "CAM_RESET5"; - cci-master = <1>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor2 { - cell-index = <6>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <2>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_uw>; - actuator-src = <&actuator_triple_uw>; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008i_l6>; - cam_vdig-supply = <&pm8008i_l2>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <3000 52000 257000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_active - &cam_sensor_active_rst2>; - pinctrl-1 = <&cam_sensor_mclk2_suspend - &cam_sensor_suspend_rst2>; - gpios = <&tlmm 102 0>, - <&tlmm 106 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - cci-master = <0>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor4 { - cell-index = <3>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <4>; - eeprom-src = <&eeprom_tof1>; - sensor-position-roll = <270>; - sensor-position-pitch = <0>; - sensor-position-yaw = <0>; - cam_vio-supply = <&pm8008j_l3>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_vio", "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 0>; - rgltr-max-voltage = <1800000 0>; - rgltr-load-current = <185000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk4_active - &cam_sensor_active_rst4>; - pinctrl-1 = <&cam_sensor_mclk4_suspend - &cam_sensor_suspend_rst4>; - gpios = <&tlmm 104 0>, - <&tlmm 116 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK4", - "CAM_RESET4"; - cci-master = <1>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor5 { - cell-index = <2>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <5>; - sensor-position-roll = <270>; - sensor-position-pitch = <0>; - sensor-position-yaw = <0>; - eeprom-src = <&eeprom_front>; - cam_vio-supply = <&pm8008j_l3>; - cam_vana-supply = <&pm8008j_l5>; - cam_vdig-supply = <&pm8008j_l1>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <5000 35000 301000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk5_active - &cam_sensor_active_rst5>; - pinctrl-1 = <&cam_sensor_mclk5_suspend - &cam_sensor_suspend_rst5>; - gpios = <&tlmm 105 0>, - <&tlmm 115 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK5", - "CAM_RESET5"; - cci-master = <1>; - status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; -}; From 4a183e04ace03554e00200d47bfebb016449019e Mon Sep 17 00:00:00 2001 From: Vishalsingh Hajeri Date: Wed, 1 Apr 2020 19:41:56 -0700 Subject: [PATCH 059/190] ARM: dts: msm: Remove secure IFE SID for Lahaina and Kona Secure IFE SID's are never used. This change removes these entries. CRs-Fixed: 2665962 Change-Id: I7ceb5b1f5a7e8f809de567b321af7b244f9f3a30 --- kona-camera.dtsi | 6 +----- lahaina-camera.dtsi | 6 +----- 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index f3367a3d0ac2..0b3290ce75f4 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -373,13 +373,9 @@ msm_cam_smmu_ife { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x800 0x400>, - <&apps_smmu 0x801 0x400>, <&apps_smmu 0x840 0x400>, - <&apps_smmu 0x841 0x400>, <&apps_smmu 0xC00 0x400>, - <&apps_smmu 0xC01 0x400>, - <&apps_smmu 0xC40 0x400>, - <&apps_smmu 0xC41 0x400>; + <&apps_smmu 0xC40 0x400>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; label = "ife", "ife-cdm"; multiple-client-devices; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 64cdcef30407..f6b3f9608643 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -373,13 +373,9 @@ msm_cam_smmu_ife { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x800 0x440>, - <&apps_smmu 0x801 0x440>, <&apps_smmu 0x840 0x440>, - <&apps_smmu 0x841 0x440>, <&apps_smmu 0xC00 0x440>, - <&apps_smmu 0xC01 0x440>, - <&apps_smmu 0xC40 0x440>, - <&apps_smmu 0xC41 0x440>; + <&apps_smmu 0xC40 0x440>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; label = "ife", "ife-cdm"; multiple-client-devices; From 714d6366e3711978c986fbd6416bf081af8d0857 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Thu, 30 Apr 2020 15:34:41 -0700 Subject: [PATCH 060/190] ARM: dts: msm: Add support to enable external regulator for Lahaina The non-POR sensors require support for enabling DB03 which requires VIO PM8008_L3J to be on. Add support for enabling external regulator in other sensors and respective eeprom. CRs-Fixed: 2584631 Change-Id: I06d5b0f8d4940b2df8d8bb2d058205a3519bdab9 --- lahaina-camera-sensor-cdp.dtsi | 44 ++++++++++++++++++---------------- lahaina-camera-sensor-mtp.dtsi | 44 ++++++++++++++++++---------------- 2 files changed, 48 insertions(+), 40 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index 4400dc562d50..8200734cf491 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -168,12 +168,13 @@ eeprom_ext_rgb0: qcom,eeprom7 { cell-index = <8>; compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -377,12 +378,13 @@ eeprom-src = <&eeprom_ext_rgb0>; actuator-src = <&actuator_triple_tele>; led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -526,12 +528,13 @@ eeprom_ext_rgb1: qcom,eeprom8 { cell-index = <9>; compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk4_active @@ -540,8 +543,8 @@ pinctrl-1 = <&cam_sensor_mclk4_suspend &cam_sensor_suspend_rst4 &cam_sensor_suspend_ext_regs1>; - gpios = <&tlmm 105 0>, - <&tlmm 115 0>, + gpios = <&tlmm 104 0>, + <&tlmm 116 0>, <&tlmm 29 0>; gpio-reset = <1>; gpio-custom1 = <2>; @@ -686,12 +689,13 @@ eeprom-src = <&eeprom_ext_rgb1>; actuator-src = <&actuator_triple_uw>; led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk4_active @@ -700,8 +704,8 @@ pinctrl-1 = <&cam_sensor_mclk4_suspend &cam_sensor_suspend_rst4 &cam_sensor_suspend_ext_regs1>; - gpios = <&tlmm 105 0>, - <&tlmm 115 0>, + gpios = <&tlmm 104 0>, + <&tlmm 116 0>, <&tlmm 29 0>; gpio-reset = <1>; gpio-custom1 = <2>; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index 4400dc562d50..8200734cf491 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -168,12 +168,13 @@ eeprom_ext_rgb0: qcom,eeprom7 { cell-index = <8>; compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -377,12 +378,13 @@ eeprom-src = <&eeprom_ext_rgb0>; actuator-src = <&actuator_triple_tele>; led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active @@ -526,12 +528,13 @@ eeprom_ext_rgb1: qcom,eeprom8 { cell-index = <9>; compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk4_active @@ -540,8 +543,8 @@ pinctrl-1 = <&cam_sensor_mclk4_suspend &cam_sensor_suspend_rst4 &cam_sensor_suspend_ext_regs1>; - gpios = <&tlmm 105 0>, - <&tlmm 115 0>, + gpios = <&tlmm 104 0>, + <&tlmm 116 0>, <&tlmm 29 0>; gpio-reset = <1>; gpio-custom1 = <2>; @@ -686,12 +689,13 @@ eeprom-src = <&eeprom_ext_rgb1>; actuator-src = <&actuator_triple_uw>; led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_clk"; + regulator-names = "cam_vio", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <0>; - rgltr-max-voltage = <0>; - rgltr-load-current = <0>; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <10000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk4_active @@ -700,8 +704,8 @@ pinctrl-1 = <&cam_sensor_mclk4_suspend &cam_sensor_suspend_rst4 &cam_sensor_suspend_ext_regs1>; - gpios = <&tlmm 105 0>, - <&tlmm 115 0>, + gpios = <&tlmm 104 0>, + <&tlmm 116 0>, <&tlmm 29 0>; gpio-reset = <1>; gpio-custom1 = <2>; From 32b215daece3bd0dbc6eef9ea69074516d9ab425 Mon Sep 17 00:00:00 2001 From: Karthik Jayakumar Date: Mon, 2 Mar 2020 10:37:49 -0800 Subject: [PATCH 061/190] ARM: dts: msm: Update context bank size for Kona and Lahaina Updates SMMU context bank size for IFE, JPEG and FD in Kona to 4GB minus a 1MB pad for start and another 1 MB pad for end. Lahaina has the same change except for FD context bank which is deprecated. CRs-Fixed: 2584631 Change-Id: I8d1eba4465c75babdcfc95a6df75788cc058cd7d --- kona-camera.dtsi | 40 ++++++++++++++++++++++++---------------- lahaina-camera.dtsi | 30 ++++++++++++++++++------------ 2 files changed, 42 insertions(+), 28 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index df0534624822..20aba2306c76 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -376,15 +376,17 @@ <&apps_smmu 0x840 0x400>, <&apps_smmu 0xC00 0x400>, <&apps_smmu 0xC40 0x400>; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-mem-region-io { iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; @@ -396,13 +398,15 @@ iommus = <&apps_smmu 0x2040 0x400>, <&apps_smmu 0x2440 0x400>; label = "jpeg"; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; jpeg_iova_mem_map: iova-mem-map { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-mem-region-io { iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; @@ -489,13 +493,15 @@ iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; label = "cpas-cdm"; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; @@ -512,14 +518,16 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x2080 0x400>, <&apps_smmu 0x2480 0x400>; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; label = "fd"; fd_iova_mem_map: iova-mem-map { iova-mem-region-io { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 78c5086ec9b2..b95da10d7bdd 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -376,15 +376,17 @@ <&apps_smmu 0x840 0x440>, <&apps_smmu 0xC00 0x440>, <&apps_smmu 0xC40 0x440>; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-mem-region-io { iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; @@ -396,13 +398,15 @@ iommus = <&apps_smmu 0x2040 0x400>, <&apps_smmu 0x2440 0x400>; label = "jpeg"; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; jpeg_iova_mem_map: iova-mem-map { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-mem-region-io { iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; @@ -489,13 +493,15 @@ iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; label = "cpas-cdm"; - qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { - /* IO region is approximately 3.4 GB */ + /* IO region is approximately 4.0 GB */ iova-region-name = "io"; - iova-region-start = <0x7400000>; - iova-region-len = <0xd8c00000>; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; iova-region-id = <0x3>; status = "ok"; }; From 57993ee452e81347a23ccb3252110f98ca6f6949 Mon Sep 17 00:00:00 2001 From: Pavan Kumar Chilamkurthi Date: Tue, 21 Apr 2020 09:24:56 -0700 Subject: [PATCH 062/190] ARM: dts: msm: Enable io-coherency for camera devices on lahaina Enable io-coherency to avoid cache flush operations when a buffer generated by CPU module is given to a HW as input. CRs-Fixed: 2678870 Change-Id: I1476139f91433ed677fd0d4f39421dd978c9732f --- lahaina-camera.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index b95da10d7bdd..eb80415a1ed9 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -377,6 +377,7 @@ <&apps_smmu 0xC00 0x440>, <&apps_smmu 0xC40 0x440>; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { @@ -399,6 +400,7 @@ <&apps_smmu 0x2440 0x400>; label = "jpeg"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 4.0 GB */ iova-mem-region-io { @@ -438,6 +440,7 @@ label = "icp"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; iova-region-discard = <0xdff00000 0x300000>; + dma-coherent-hint-cached; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -494,6 +497,7 @@ <&apps_smmu 0x24C0 0x400>; label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 4.0 GB */ From e0cd2447b11a5ebb22d8128302a242cb36cee599 Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Wed, 22 Apr 2020 20:14:12 +0530 Subject: [PATCH 063/190] ARM: dts: msm: camera: Merge kmd 3.1 changes in kmd 4.0 ARM: dts: msm: Fix custom gpio tables for bengal ARM: dts: msm: Fix svs clock level for bengal ARM: dts: msm: camera: Add required clocks to tpg and cpas node ARM: dts: msm: camera: cpas: Add constituent paths for OPE ARM: dts: msm: Fix the reset gpio for rear aux camera ARM: dts: msm: Fix orientation of camera sensors ARM: dts: msm: camera: cci: Add cci version ARM: dts: msm: camera: cpas: Add camera fuse support ARM: dts: msm: camera: smmu: Fix camera SID issue ARM: dts: msm: camera: Add support to Cx Ipeak ARM: dts: msm: Fix orientation of front camera ARM: dts: msm: Add support to discard a region in dma space ARM: dts: msm: camera: Correct the clock rates for all modules ARM: dts: msm: Fix inverted image on front camera ARM: dts: msm: Add CAMNOC nodes in lagoon camera dtsi ARM: dts: msm: camera: Update fifo depth for OPE CDM ARM: dts: msm: Change the vdig voltage of bengal front camera ARM: dts: msm: Change the vdig voltage of bengal front camera ARM: dts: msm: camera: ope: Change BL fifo depth ARM: dts: msm: Add camera sensor nodes in MTP/CDP for lagoon ARM: dts: msm: Update clock header for lagoon ARM: dts: msm: Add csiphy and cci nodes in lagoon camera DT ARM: dts: msm: Change IPE Write port, IPE clock source for lagoon camera ARM: dts: msm: Change CSID and VFE interrupt name for lagoon camera ARM: dts: msm: Add csiphy3 and cci1 clients to cpas ARM: dts: msm: Add support for Scuba camera ARM: dts: msm: Fix Bus and TFE nodes in Scuba camera ARM: dts: msm: Add cci and csiphy support for Scuba camera ARM: dts: msm: Fix the phy regulator voltage ARM: dts: msm: Add Camera Sensor nodes for IDP/IDPS for scuba ARM: dts: msm: Update GPU Mitigation ARM: dts: msm: Fix compilation issue for scuba-camera-sensor-idp ARM: dts: msm: camera: cpas: Disable secure feature mask ARM: dts: msm: Update PHY version for bengal target ARM: dts: msm: Remove fuse setting for secure camera. CRs-Fixed: 2668666 Change-Id: I052654c8cc05043a63355ccd13582a87e993e42a --- bengal-camera-sensor-idp.dtsi | 38 +- bengal-camera-sensor-qrd.dtsi | 10 +- bengal-camera.dtsi | 180 ++++---- bindings/msm-cam-cci.txt | 2 + bindings/msm-cam-cpas.txt | 6 + bindings/msm-cam-csiphy.txt | 4 +- bindings/msm-cam-tpg.txt | 4 +- lagoon-camera-sensor-cdp.dtsi | 421 +++++++++++++++++ lagoon-camera-sensor-mtp.dtsi | 421 +++++++++++++++++ lagoon-camera.dtsi | 828 +++++++++++++++++++++++++++++++++- scuba-camera-sensor-idp.dtsi | 313 +++++++++++++ scuba-camera.dtsi | 766 +++++++++++++++++++++++++++++++ 12 files changed, 2874 insertions(+), 119 deletions(-) create mode 100644 lagoon-camera-sensor-cdp.dtsi create mode 100644 lagoon-camera-sensor-mtp.dtsi create mode 100644 scuba-camera-sensor-idp.dtsi create mode 100644 scuba-camera.dtsi diff --git a/bengal-camera-sensor-idp.dtsi b/bengal-camera-sensor-idp.dtsi index 65ac19946f1e..48f40a98c4a5 100644 --- a/bengal-camera-sensor-idp.dtsi +++ b/bengal-camera-sensor-idp.dtsi @@ -118,8 +118,8 @@ &cam_sensor_rear1_reset_active>; pinctrl-1 = <&cam_sensor_mclk1_suspend &cam_sensor_rear1_reset_suspend>; - gpios = <&tlmm 19 0>, - <&tlmm 21 0>; + gpios = <&tlmm 21 0>, + <&tlmm 19 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -145,8 +145,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -211,7 +211,7 @@ cell-index = <0>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <0>; - sensor-position-roll = <90>; + sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; @@ -255,7 +255,7 @@ cell-index = <1>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <1>; - sensor-position-roll = <90>; + sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; @@ -278,8 +278,8 @@ &cam_sensor_rear1_reset_active>; pinctrl-1 = <&cam_sensor_mclk1_suspend &cam_sensor_rear1_reset_suspend>; - gpios = <&tlmm 19 0>, - <&tlmm 21 0>; + gpios = <&tlmm 21 0>, + <&tlmm 19 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -299,9 +299,9 @@ cell-index = <2>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; - sensor-position-roll = <90>; + sensor-position-roll = <270>; sensor-position-pitch = <0>; - sensor-position-yaw = <180>; + sensor-position-yaw = <0>; eeprom-src = <&eeprom_front>; cam_vio-supply = <&L7P>; cam_vana-supply = <&L6P>; @@ -311,8 +311,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -329,10 +329,14 @@ <&tlmm 66 0>, <&tlmm 67 0>; gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-custom2 = <3>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; + "CAM_RESET2", + "CAM_CSIMUX_OE0", + "CAM_CSIMUX_SEL0"; sensor-mode = <0>; cci-master = <1>; status = "ok"; @@ -347,7 +351,7 @@ cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; - sensor-position-roll = <90>; + sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; led-flash-src = <&led_flash_rear_aux2>; @@ -378,10 +382,14 @@ <&tlmm 66 0>, <&tlmm 67 0>; gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-custom2 = <3>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; + "CAM_RESET3", + "CAM_CSIMUX_OE1", + "CAM_CSIMUX_SEL1"; sensor-mode = <0>; cci-master = <0>; status = "ok"; diff --git a/bengal-camera-sensor-qrd.dtsi b/bengal-camera-sensor-qrd.dtsi index a4c93476024f..c6aa60f384ea 100644 --- a/bengal-camera-sensor-qrd.dtsi +++ b/bengal-camera-sensor-qrd.dtsi @@ -145,8 +145,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -301,7 +301,7 @@ cell-index = <2>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; - sensor-position-roll = <90>; + sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <0>; eeprom-src = <&eeprom_front>; @@ -313,8 +313,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index f771d37433fb..a84ebde35aa6 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -8,7 +8,7 @@ cam_csiphy0: qcom,csiphy0 { cell-index = <0>; - compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy"; reg = <0x05C52000 0x1000>; reg-names = "csiphy"; reg-cam-base = <0x52000>; @@ -30,15 +30,16 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; clock-rates = <19200000 0 19200000 0>, - <341330000 0 200000000 0>, + <240000000 0 200000000 0>, <341330000 0 200000000 0>, <384000000 0 268800000 0>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; cam_csiphy1: qcom,csiphy1 { cell-index = <1>; - compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy"; reg = <0x05C53000 0x1000>; reg-names = "csiphy"; reg-cam-base = <0x53000>; @@ -60,15 +61,16 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; clock-rates = <19200000 0 19200000 0>, - <341330000 0 200000000 0>, + <240000000 0 200000000 0>, <341330000 0 200000000 0>, <384000000 0 268800000 0>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; cam_csiphy2: qcom,csiphy2 { cell-index = <2>; - compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy"; reg = <0x05C54000 0x1000>; reg-names = "csiphy"; reg-cam-base = <0x54000>; @@ -90,15 +92,16 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; clock-rates = <19200000 0 19200000 0>, - <341330000 0 200000000 0>, + <240000000 0 200000000 0>, <341330000 0 200000000 0>, <384000000 0 268800000 0>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; cam_cci0: qcom,cci0 { cell-index = <0>; - compatible = "qcom,cci", "simple-bus"; + compatible = "qcom,cci-v1.2", "qcom,cci", "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg = <0x05C1B000 0x1000>; @@ -197,8 +200,7 @@ msm_cam_smmu_tfe { compatible = "qcom,msm-cam-smmu-cb"; - iommus = <&apps_smmu 0x400 0x000>, - <&apps_smmu 0x401 0x000>; + iommus = <&apps_smmu 0x400 0x000>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; label = "tfe"; @@ -217,9 +219,7 @@ msm_cam_smmu_ope { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x820 0x000>, - <&apps_smmu 0x821 0x020>, - <&apps_smmu 0x840 0x000>, - <&apps_smmu 0x841 0x000>; + <&apps_smmu 0x840 0x000>; qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; @@ -238,8 +238,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; - iommus = <&apps_smmu 0x800 0x000>, - <&apps_smmu 0x801 0x020>; + iommus = <&apps_smmu 0x800 0x000>; label = "cpas-cdm0"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; @@ -283,37 +282,42 @@ "gcc_camss_top_ahb_clk", "gcc_camss_top_ahb_clk_src", "gcc_camss_axi_clk", - "gcc_camss_axi_clk_src"; + "gcc_camss_axi_clk_src", + "gcc_camss_nrt_axi_clk", + "gcc_camss_rt_axi_clk"; clocks = <&gcc GCC_CAMERA_AHB_CLK>, <&gcc GCC_CAMSS_TOP_AHB_CLK>, <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, <&gcc GCC_CAMSS_AXI_CLK>, - <&gcc GCC_CAMSS_AXI_CLK_SRC>; + <&gcc GCC_CAMSS_AXI_CLK_SRC>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>; src-clock-name = "gcc_camss_axi_clk_src"; clock-rates = - <0 0 0 0 0>, - <0 80000000 80000000 19200000 19200000>, - <0 80000000 80000000 150000000 150000000>, - <0 80000000 80000000 200000000 200000000>, - <0 80000000 80000000 300000000 300000000>, - <0 80000000 80000000 300000000 300000000>, - <0 80000000 80000000 300000000 300000000>; + <0 0 0 0 0 0 0>, + <0 0 80000000 0 19200000 0 0>, + <0 0 80000000 0 150000000 0 0>, + <0 0 80000000 0 200000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>; clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", "svs_l1", "nominal", "turbo"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; control-camnoc-axi-clk; camnoc-bus-width = <32>; camnoc-axi-clk-bw-margin-perc = <20>; - qcom,msm-bus,name = "cam_ahb"; /*Need to verify*/ - qcom,msm-bus,num-cases = <7>; /*Need to verify*/ - qcom,msm-bus,num-paths = <1>; /*Need to verify*/ - qcom,msm-bus,vectors-KBps = /*Need to verify*/ + qcom,msm-bus,name = "cam_ahb"; + qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = , , + MSM_BUS_SLAVE_CAMERA_CFG 0 133333>, , + MSM_BUS_SLAVE_CAMERA_CFG 0 133333>, , ; traffic-transaction-type = ; + constituent-paths = + ; parent-node = <&level1_nrt0_rd_wr>; }; @@ -427,6 +435,9 @@ traffic-data = ; traffic-transaction-type = ; + constituent-paths = + ; parent-node = <&level1_nrt0_rd_wr>; }; @@ -591,23 +602,22 @@ "cphy_rx_clk_src", "tfe_cphy_rx_clk", "tfe_clk_src", - "tfe_clk", - "tfe_axi_clk"; + "tfe_clk"; clocks = <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_0_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>; + <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <240000000 240000000 0 240000000 256000000 256000000 150000000>, - <384000000 384000000 0 341333333 460800000 460800000 200000000>, - <426400000 426400000 0 384000000 576000000 576000000 300000000>; + <240000000 0 240000000 0 256000000 0>, + <384000000 0 341333333 0 460800000 0>, + <426400000 0 384000000 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -623,19 +633,18 @@ camss-supply = <&gcc_camss_top_gdsc>; clock-names = "tfe_clk_src", - "tfe_clk", - "tfe_axi_clk"; + "tfe_clk"; clocks = <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_0_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>; + <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <256000000 256000000 150000000>, - <460800000 460800000 200000000>, - <576000000 576000000 300000000>; + <256000000 0>, + <460800000 0>, + <576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -657,23 +666,22 @@ "cphy_rx_clk_src", "tfe_cphy_rx_clk", "tfe_clk_src", - "tfe_clk", - "tfe_axi_clk"; + "tfe_clk"; clocks = <&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_1_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>; + <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <240000000 240000000 0 240000000 256000000 256000000 150000000>, - <384000000 384000000 0 341333333 460800000 460800000 200000000>, - <426400000 426400000 0 384000000 576000000 576000000 300000000>; + <240000000 0 240000000 0 256000000 0>, + <384000000 0 341333333 0 460800000 0>, + <426400000 0 384000000 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -689,19 +697,18 @@ camss-supply = <&gcc_camss_top_gdsc>; clock-names = "tfe_clk_src", - "tfe_clk", - "tfe_axi_clk"; + "tfe_clk"; clocks = <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_1_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>; + <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <256000000 256000000 150000000>, - <460800000 460800000 200000000>, - <576000000 576000000 300000000>; + <256000000 0>, + <460800000 0>, + <576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -723,23 +730,22 @@ "cphy_rx_clk_src", "tfe_cphy_rx_clk", "tfe_clk_src", - "tfe_clk", - "tfe_axi_clk"; + "tfe_clk"; clocks = <&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>, <&gcc GCC_CAMSS_TFE_2_CSID_CLK>, <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>, <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_2_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>; + <&gcc GCC_CAMSS_TFE_2_CLK>; clock-rates = - <240000000 240000000 0 240000000 256000000 256000000 150000000>, - <384000000 384000000 0 341333333 460800000 460800000 200000000>, - <426400000 426400000 0 384000000 576000000 576000000 300000000>; + <240000000 0 240000000 0 256000000 0>, + <384000000 0 341333333 0 460800000 0>, + <426400000 0 384000000 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -755,19 +761,18 @@ camss-supply = <&gcc_camss_top_gdsc>; clock-names = "tfe_clk_src", - "tfe_clk", - "tfe_axi_clk"; + "tfe_clk"; clocks = <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_2_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>; + <&gcc GCC_CAMSS_TFE_2_CLK>; clock-rates = - <256000000 256000000 150000000>, - <460800000 460800000 200000000>, - <576000000 576000000 300000000>; + <256000000 0>, + <460800000 0>, + <576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -782,14 +787,16 @@ camss-supply = <&gcc_camss_top_gdsc>; clock-names = "cphy_rx_clk_src", - "tfe_0_cphy_rx_clk"; + "tfe_0_cphy_rx_clk", + "gcc_camss_cphy_0_clk"; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>; + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>; clock-rates = - <240000000 240000000>, - <341333333 341333333>, - <384000000 384000000>; + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "cphy_rx_clk_src"; clock-control-debugfs = "false"; @@ -807,14 +814,16 @@ camss-supply = <&gcc_camss_top_gdsc>; clock-names = "cphy_rx_clk_src", - "tfe_1_cphy_rx_clk"; + "tfe_1_cphy_rx_clk", + "gcc_camss_cphy_1_clk"; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>; + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>; clock-rates = - <240000000 240000000>, - <341333333 341333333>, - <384000000 384000000>; + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "cphy_rx_clk_src"; clock-control-debugfs = "false"; @@ -859,12 +868,13 @@ <&gcc GCC_CAMSS_OPE_CLK_SRC>, <&gcc GCC_CAMSS_OPE_CLK>; clock-rates = - <171428571 200000000 200000000>, - <171428571 266600000 266600000>, - <240000000 465000000 465000000>, - <240000000 580000000 580000000>; + <171428571 200000000 0>, + <171428571 266600000 0>, + <240000000 465000000 0>, + <240000000 580000000 0>; clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ope_clk_src"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; }; diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index be7cc712818a..d353e8b0bfd2 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -19,6 +19,8 @@ First Level Node - CCI device Usage: required Value type: Definition: Should be "qcom,cci". + In case of cci version 1.2, + use "qcom,cci-v1.2". - cell-index: cci hardware core index Usage: required diff --git a/bindings/msm-cam-cpas.txt b/bindings/msm-cam-cpas.txt index c18b74391c18..068edb5e0996 100644 --- a/bindings/msm-cam-cpas.txt +++ b/bindings/msm-cam-cpas.txt @@ -128,6 +128,11 @@ First Level Node - CAM CPAS device Definition: List of strings corresponds clock-rates levels. Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. +- qcom,cam-cx-ipeak + Usage: required + Value type: + Definition: Camera Cx Ipeak ID. + - control-camnoc-axi-clk Usage: optional Value type: @@ -311,6 +316,7 @@ Example: src-clock-name = "slow_ahb_clk_src"; clock-rates = <0 0 0 0 80000000 0>; clock-cntl-level = "turbo"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; control-camnoc-axi-clk; camnoc-bus-width = <32>; camnoc-axi-clk-bw-margin-perc = <10>; diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index fba46eed3b10..cb5680aac9cb 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -15,8 +15,8 @@ First Level Node - CSIPHY device Value type: Definition: Should be "qcom,csiphy-v1.0", "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", - "qcom,csiphy-v1.2.2", "qcom,csiphy-v1.2.3", - "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2", "qcom,csiphy". + "qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2", + "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy". - cell-index: csiphy hardware core index Usage: required diff --git a/bindings/msm-cam-tpg.txt b/bindings/msm-cam-tpg.txt index 869352373c5e..12672cb0dc72 100644 --- a/bindings/msm-cam-tpg.txt +++ b/bindings/msm-cam-tpg.txt @@ -17,7 +17,7 @@ Required properties: Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,tpg101", "qcom,tpg102" + driver. e.g. "qcom,tpg101", "qcom,tpg102", "qcom,tpgv1" - cell-index Usage: required @@ -110,4 +110,4 @@ Example: src-clock-name = "cphy_rx_clk_src"; clock-control-debugfs = "false"; status = "ok"; - }; \ No newline at end of file + }; diff --git a/lagoon-camera-sensor-cdp.dtsi b/lagoon-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..1bb08daa1d83 --- /dev/null +++ b/lagoon-camera-sensor-cdp.dtsi @@ -0,0 +1,421 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + reg = <0x04 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + reg = <0x05 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + reg = <0x06 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_rear: qcom,actuator@4 { + cell-index = <4>; + reg = <0x4>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_triple_rear_aux: qcom,actuator@5 { + cell-index = <5>; + reg = <0x5>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_triple_rear: qcom,eeprom@4 { + cell-index = <4>; + reg = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2904000 1104000 0 2800000>; + rgltr-max-voltage = <1800000 2904000 1104000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>, + <&tlmm 50 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_rear_aux: qcom,eeprom@5 { + cell-index = <5>; + reg = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <0 2000000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + reg = <0x4>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear>; + actuator-src = <&actuator_triple_rear>; + eeprom-src = <&eeprom_triple_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_v_custom1-supply = <&S2A>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2904000 1104000 0 2096000>; + rgltr-max-voltage = <1800000 2904000 1104000 0 2096000>; + rgltr-load-current = <0 80000 105000 0 80000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>, + <&tlmm 50 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + reg = <0x5>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux>; + actuator-src = <&actuator_triple_rear_aux>; + eeprom-src = <&eeprom_triple_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 2000000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_rear_aux2: qcom,actuator@6 { + cell-index = <6>; + reg = <0x6>; + compatible = "qcom,actuator"; + cci-device = <1>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_rear_aux2: qcom,eeprom@6 { + cell-index = <6>; + reg = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux2>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@6 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + reg = <0x06>; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux2>; + actuator-src = <&actuator_triple_rear_aux2>; + eeprom-src = <&eeprom_triple_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux2>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/lagoon-camera-sensor-mtp.dtsi b/lagoon-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..1bb08daa1d83 --- /dev/null +++ b/lagoon-camera-sensor-mtp.dtsi @@ -0,0 +1,421 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + reg = <0x04 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + reg = <0x05 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + reg = <0x06 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_rear: qcom,actuator@4 { + cell-index = <4>; + reg = <0x4>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_triple_rear_aux: qcom,actuator@5 { + cell-index = <5>; + reg = <0x5>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_triple_rear: qcom,eeprom@4 { + cell-index = <4>; + reg = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2904000 1104000 0 2800000>; + rgltr-max-voltage = <1800000 2904000 1104000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>, + <&tlmm 50 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_rear_aux: qcom,eeprom@5 { + cell-index = <5>; + reg = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <0 2000000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + reg = <0x4>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear>; + actuator-src = <&actuator_triple_rear>; + eeprom-src = <&eeprom_triple_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_v_custom1-supply = <&S2A>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2904000 1104000 0 2096000>; + rgltr-max-voltage = <1800000 2904000 1104000 0 2096000>; + rgltr-load-current = <0 80000 105000 0 80000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>, + <&tlmm 50 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + reg = <0x5>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux>; + actuator-src = <&actuator_triple_rear_aux>; + eeprom-src = <&eeprom_triple_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 2000000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_rear_aux2: qcom,actuator@6 { + cell-index = <6>; + reg = <0x6>; + compatible = "qcom,actuator"; + cci-device = <1>; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_triple_rear_aux2: qcom,eeprom@6 { + cell-index = <6>; + reg = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <0 80000 105000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux2>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor@6 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + reg = <0x06>; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_triple_rear_aux2>; + actuator-src = <&actuator_triple_rear_aux2>; + eeprom-src = <&eeprom_triple_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux2>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/lagoon-camera.dtsi b/lagoon-camera.dtsi index 9c2a5e8824b6..e59eb916a660 100644 --- a/lagoon-camera.dtsi +++ b/lagoon-camera.dtsi @@ -6,6 +6,332 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0x0ac65000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x65000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 880000 1200000>; + rgltr-max-voltage = <0 0 880000 1200000>; + rgltr-load-current = <0 0 80000 80000>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac66000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x66000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 880000 1200000>; + rgltr-max-voltage = <0 0 880000 1200000>; + rgltr-load-current = <0 0 80000 80000>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac67000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x67000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 880000 1200000>; + rgltr-max-voltage = <0 0 880000 1200000>; + rgltr-load-current = <0 0 80000 80000>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0xac68000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x68000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "refgen", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 880000 1200000>; + rgltr-max-voltage = <0 0 880000 1200000>; + rgltr-load-current = <0 0 80000 80000>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1"; + clock-rates = + <300000000 0 300000000 0>, + <384000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xac4a000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4a000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&camcc CAM_CC_CCI_0_CLK>, + <&camcc CAM_CC_CCI_0_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 39 0>, + <&tlmm 40 0>, + <&tlmm 41 0>, + <&tlmm 42 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xac4b000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4b000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&camcc CAM_CC_CCI_1_CLK>, + <&camcc CAM_CC_CCI_1_CLK_SRC>; + clock-names = "cci_clk", + "cci_1_clk_src"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + gpios = <&tlmm 43 0>, + <&tlmm 44 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam_smmu { compatible = "qcom,msm-cam-smmu"; status = "ok"; @@ -207,7 +533,7 @@ reg-names = "csid"; reg = <0xacb3000 0x1000>; reg-cam-base = <0xb3000>; - interrupt-names = "csid"; + interrupt-names = "csid0"; interrupts = ; regulator-names = "camss", "ife0"; camss-supply = <&cam_cc_titan_top_gdsc>; @@ -244,7 +570,7 @@ reg-names = "ife"; reg = <0xacaf000 0x4000>; reg-cam-base = <0xaf000>; - interrupt-names = "ife"; + interrupt-names = "ife0"; interrupts = ; regulator-names = "camss", "ife0"; camss-supply = <&cam_cc_titan_top_gdsc>; @@ -276,7 +602,7 @@ reg-names = "csid"; reg = <0xacba000 0x1000>; reg-cam-base = <0xba000>; - interrupt-names = "csid"; + interrupt-names = "csid1"; interrupts = ; regulator-names = "camss", "ife1"; camss-supply = <&cam_cc_titan_top_gdsc>; @@ -313,7 +639,7 @@ reg-names = "ife"; reg = <0xacb6000 0x4000>; reg-cam-base = <0xb6000>; - interrupt-names = "ife"; + interrupt-names = "ife1"; interrupts = ; regulator-names = "camss", "ife1"; camss-supply = <&cam_cc_titan_top_gdsc>; @@ -342,11 +668,11 @@ cam_csid2: qcom,csid2@acc1000 { cell-index = <2>; compatible = "qcom,csid170_200"; - reg-names = "csid"; + reg-names = "csid2"; reg = <0xacc1000 0x1000>; reg-cam-base = <0xc1000>; interrupt-names = "csid"; - interrupts = ; + interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; ife2-supply = <&cam_cc_ife_2_gdsc>; @@ -379,11 +705,11 @@ cam_vfe2: qcom,vfe2@acbd000 { cell-index = <2>; compatible = "qcom,vfe170_150"; - reg-names = "ife"; + reg-names = "ife2"; reg = <0xacbd000 0x4000>; reg-cam-base = <0xbd000>; interrupt-names = "ife"; - interrupts = ; + interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; ife2-supply = <&cam_cc_ife_2_gdsc>; @@ -496,6 +822,7 @@ "soc_ahb_clk", "icp_clk", "icp_clk_src"; + src-clock-name = "icp_clk_src"; clocks = <&camcc CAM_CC_FAST_AHB_CLK_SRC>, <&camcc CAM_CC_SOC_AHB_CLK>, @@ -506,8 +833,10 @@ <100000000 0 0 384000000>, <200000000 0 0 404000000>, <300000000 0 0 600000000>, + <404000000 0 0 600000000>, <404000000 0 0 600000000>; - clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-cntl-level = "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-cfg = <0x73 0x1CF>; status = "ok"; @@ -538,7 +867,7 @@ <0 0 0 0 240000000>, <0 0 0 0 320000000>, <0 0 0 0 404000000>, - <0 0 0 0 538000000>, + <0 0 0 0 538666666>, <0 0 0 0 600000000>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; @@ -667,4 +996,483 @@ src-clock-name = "lrme_clk_src"; status = "ok"; }; + + qcom,cam-cpas@ac40000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc", "core_top_csr_tcsr"; + reg = <0xac40000 0x1000>, + <0xac42000 0x4600>, + <0x01fc0000 0x40000>; + reg-cam-base = <0x40000 0x42000 0x0>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + qcom,cpas-hw-ver = <0x170200>; /* Titan v170 v2.0.0 */ + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_clk", + "soc_ahb_clk", + "slow_ahb_clk_src", + "cpas_ahb_clk", + "camnoc_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "slow_ahb_clk_src"; + clock-rates = + <0 0 0 0 0 0>, + <0 0 0 80000000 0 0>, + <0 0 0 80000000 0 0>, + <0 0 0 80000000 0 0>, + <0 0 0 80000000 0 0>, + <0 0 0 80000000 0 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + qcom,msm-bus,name = "cam_ahb"; + qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + , + , + , + , + , + ; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", + "minsvs", "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", "cci0", + "cci1", "csid0", "csid1", "csid2", "csid3", + "ife0", "ife1", "ife2", "ife3", "ipe0", + "cam-cdm-intf0", "cpas-cdm0", "bps0", + "icp0", "jpeg-dma0", "jpeg-enc0", "lrmecpas0"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_wr_sum: level3-rt0-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_0"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + + qcom,axi-port-camnoc { + qcom,msm-bus,name = + "cam_hf_0_camnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_0"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + + qcom,axi-port-camnoc { + qcom,msm-bus,name = + "cam_sf_0_camnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level3_nrt1_rd_wr_sum: level3-nrt1-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_icp"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_icp_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + + qcom,axi-port-camnoc { + qcom,msm-bus,name = + "cam_sf_icp_camnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + }; + + level2-nodes { + level-index = <2>; + level2_rt0_wr: level2-rt0-wr { + cell-index = <3>; + node-name = "level2-rt0-wr"; + parent-node = <&level3_rt0_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_rd_wr: level2-nrt0-rd-wr { + cell-index = <4>; + node-name = "level2-nrt0-rd-wr"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_rd: level2-nrt1-rd { + cell-index = <5>; + node-name = "level2-nrt1-rd"; + parent-node = <&level3_nrt1_rd_wr_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + level1_rt0_wr: level1-rt0-wr { + cell-index = <6>; + node-name = "level1-rt0-wr"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt1_wr: level1-rt1-wr { + cell-index = <7>; + node-name = "level1-rt1-wr"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr: level1-nrt0-wr { + cell-index = <8>; + node-name = "level1-nrt0-wr"; + parent-node = <&level2_nrt0_rd_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd: level1-nrt0-rd { + cell-index = <9>; + node-name = "level1-nrt0-rd"; + parent-node = <&level2_nrt0_rd_wr>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + + ife0_rdi_all_wr: ife0-rdi-all-wr { + cell-index = <10>; + node-name = "ife0-rdi-all-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + ife1_rdi_all_wr: ife1-rdi-all-wr { + cell-index = <11>; + node-name = "ife1-rdi-all-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + ife2_rdi_all_wr: ife2-rdi-all-wr { + cell-index = <12>; + node-name = "ife2-rdi-all-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_wr>; + }; + + ife3_rdi_all_wr: ife3-rdi-all-wr { + cell-index = <13>; + node-name = "ife3-rdi-all-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_wr>; + }; + + ife0_pixelall_wr: ife0-pixelall-wr { + cell-index = <14>; + node-name = "ife0-pixelall-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + ife1_pixelall_wr: ife1-pixelall-wr { + cell-index = <15>; + node-name = "ife1-pixelall-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + ife2_pixelall_wr: ife2-pixelall-wr { + cell-index = <16>; + node-name = "ife2-pixelall-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_wr>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <17>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <18>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + ipe0_all_rd: ipe0-all-rd { + cell-index = <19>; + node-name = "ipe0-all-rd"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd>; + }; + + ipe0_all_wr: ipe0-all-wr { + cell-index = <20>; + node-name = "ipe0-all-wr"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_wr>; + }; + + lrme0_all_rd: lrme0-all-rd { + cell-index = <21>; + node-name = "lrme0-all-rd"; + client-name = "lrmecpas0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + lrme0_all_wr: lrme0-all-wr { + cell-index = <22>; + node-name = "lrme0-all-wr"; + client-name = "lrmecpas0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <23>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd_wr>; + }; + + jpeg0_all_wr: jpeg0-all-wr { + cell-index = <24>; + node-name = "jpeg0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd_wr>; + }; + + jpeg0_all_rd: jpeg0-all-rd { + cell-index = <25>; + node-name = "jpeg0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd_wr>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <26>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_rd>; + }; + }; + }; + }; }; diff --git a/scuba-camera-sensor-idp.dtsi b/scuba-camera-sensor-idp.dtsi new file mode 100644 index 000000000000..6c7655b20cd8 --- /dev/null +++ b/scuba-camera-sensor-idp.dtsi @@ -0,0 +1,313 @@ +#include +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm2250_flash0>; + torch-source = <&pm2250_torch0>; + switch-source = <&pm2250_switch0>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm2250_flash0>; + torch-source = <&pm2250_torch0>; + switch-source = <&pm2250_switch0>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 20 0>, + <&tlmm 18 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_vaf-supply = <&L5P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 21 0>, + <&tlmm 19 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 20 0>, + <&tlmm 18 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active + &cam_sensor_csi_mux_oe_active + &cam_sensor_csi_mux_sel_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend + &cam_sensor_csi_mux_oe_suspend + &cam_sensor_csi_mux_sel_suspend>; + gpios = <&tlmm 21 0>, + <&tlmm 19 0>, + <&tlmm 113 0>, + <&tlmm 114 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-custom2 = <3>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_CSIMUX_OE0", + "CAM_CSIMUX_SEL0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L7P>; + cam_vana-supply = <&L6P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_front0_reset_active + &cam_sensor_csi_mux_oe_active + &cam_sensor_csi_mux_sel_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_front0_reset_suspend + &cam_sensor_csi_mux_oe_suspend + &cam_sensor_csi_mux_sel_suspend>; + gpios = <&tlmm 27 0>, + <&tlmm 24 0>, + <&tlmm 113 0>, + <&tlmm 114 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-custom2 = <3>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_CSIMUX_OE0", + "CAM_CSIMUX_SEL0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/scuba-camera.dtsi b/scuba-camera.dtsi new file mode 100644 index 000000000000..68a4f911e60d --- /dev/null +++ b/scuba-camera.dtsi @@ -0,0 +1,766 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + reg = <0x05C52000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x52000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr"; + gdscr-supply = <&gcc_camss_top_gdsc>; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&L5A>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <341330000 0 200000000 0>, + <341330000 0 200000000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + reg = <0x05C53000 0x1000>; + reg-names = "csiphy"; + reg-cam-base = <0x53000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr"; + gdscr-supply = <&gcc_camss_top_gdsc>; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&L5A>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <341330000 0 200000000 0>, + <341330000 0 200000000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x05C1B000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1B000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_0_CLK>, + <&gcc GCC_CAMSS_CCI_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 22 0>, + <&tlmm 23 0>, + <&tlmm 29 0>, + <&tlmm 30 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu"; + status = "ok"; + + msm_cam_smmu_tfe { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x400 0x000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "tfe"; + tfe_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_ope { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x820 0x000>, + <&apps_smmu 0x840 0x000>; + qcom,iommu-faults = "non-fatal"; + multiple-client-devices; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ope", "ope-cdm0"; + ope_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x000>; + label = "cpas-cdm0"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + + }; + + qcom,cam-cpas@5c11000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x11000 0x13000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&gcc_camss_top_gdsc>; + clock-names = + "gcc_camss_ahb_clk", + "gcc_camss_top_ahb_clk", + "gcc_camss_top_ahb_clk_src", + "gcc_camss_axi_clk", + "gcc_camss_axi_clk_src", + "gcc_camss_nrt_axi_clk", + "gcc_camss_rt_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_AXI_CLK_SRC>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>; + src-clock-name = "gcc_camss_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0>, + <0 0 80000000 0 19200000 0 0>, + <0 0 80000000 0 150000000 0 0>, + <0 0 80000000 0 200000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>; + clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + qcom,cx-ipeak-gpu-limit = <921600000>; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + qcom,msm-bus,name = "cam_ahb"; + qcom,msm-bus,num-cases = <7>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + , + , + , + , + , + ; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", "lowsvs", + "lowsvs", "lowsvs", "svs", "svs_l1", "svs_l1", + "svs_l1", "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "cci0", + "csid0", "csid1", "tfe0", + "tfe1", "ope0", "cam-cdm-intf0", + "cpas-cdm0", "ope-cdm0", "tpg0", "tpg1"; + + camera-bus-nodes { + level2-nodes { + level-index = <2>; + level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level2-rt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_hf_0"; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_hf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + + level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level2-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_0"; + qcom,axi-port-mnoc { + qcom,msm-bus,name = + "cam_sf_0_mnoc"; + qcom,msm-bus-vector-dyn-vote; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + , + ; + }; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr: level1-rt0-wr { + cell-index = <2>; + node-name = "level1-rt0-wr"; + parent-node = <&level2_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd_wr: level1-nrt0-rd-wr { + cell-index = <3>; + node-name = "level1-nrt0-rd-wr"; + parent-node = <&level2_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ope0_all_wr: ope0-all-wr { + cell-index = <4>; + node-name = "ope0-all-wr"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope0_all_rd: ope0-all-rd { + cell-index = <5>; + node-name = "ope0-all-rd"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + tfe0_all_wr: tfe0-all-wr { + cell-index = <6>; + node-name = "tfe0-all-wr"; + client-name = "tfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe1_all_wr: tfe1-all-wr { + cell-index = <7>; + node-name = "tfe1-all-wr"; + client-name = "tfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <9>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope_cdm0_all_rd: ope-cdm0-all-rd { + cell-index = <10>; + node-name = "ope-cdm0-all-rd"; + client-name = "ope-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <2>; + cdm-client-names = "vfe"; + status = "ok"; + }; + + cam_cpas_cdm: qcom,cpas-cdm0@5c23000 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm2_0"; + label = "cpas-cdm"; + reg = <0x5c23000 0x400>; + reg-names = "cpas-cdm0"; + reg-cam-base = <0x23000>; + interrupts = ; + interrupt-names = "cpas-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = "cam_cc_cpas_top_ahb_clk"; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>; + clock-rates = <0>; + clock-cntl-level = "svs"; + cdm-client-names = "tfe0", "tfe1"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + cam_ope_cdm: qcom,ope-cdm0@5c42000 { + cell-index = <0>; + compatible = "qcom,cam-ope-cdm2_0"; + label = "ope-cdm"; + reg = <0x5c42000 0x400>; + reg-names = "ope-cdm0"; + reg-cam-base = <0x42000>; + interrupts = ; + interrupt-names = "ope-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = <0 0 0>, + <0 0 0>, + <0 0 0>, + <0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ope"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "tfe"; + status = "ok"; + }; + + cam_tfe_csid0: qcom,tfe_csid0@5c6e000 { + cell-index = <0>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c6e000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x6e000 0x11000 0x13000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <240000000 0 240000000 0 256000000 0>, + <384000000 0 341333333 0 460800000 0>, + <426400000 0 384000000 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe0: qcom,tfe0@5c6e000 { + cell-index = <0>; + compatible = "qcom,tfe530"; + reg-names = "tfe0"; + reg = <0x5c6e000 0x5000>; + reg-cam-base = <0x6e000>; + interrupt-names = "tfe0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <256000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_csid1: qcom,tfe_csid1@5c75000 { + cell-index = <1>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c75000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x75000 0x11000 0x13000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <240000000 0 240000000 0 256000000 0>, + <384000000 0 341333333 0 460800000 0>, + <426400000 0 384000000 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe1: qcom,tfe1@5c75000 { + cell-index = <1>; + compatible = "qcom,tfe530"; + reg-names = "tfe1"; + reg = <0x5c75000 0x5000>; + reg-cam-base = <0x75000>; + interrupt-names = "tfe1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <256000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_tpg0: qcom,tpg0@5c66000 { + cell-index = <0>; + compatible = "qcom,tpgv1"; + reg-names = "tpg0", "top"; + reg = <0x5c66000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x66000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_0_cphy_rx_clk", + "gcc_camss_cphy_0_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-rates = + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + cam_tfe_tpg1: qcom,tpg0@5c68000 { + cell-index = <1>; + compatible = "qcom,tpgv1"; + reg-names = "tpg0", "top"; + reg = <0x5c68000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x68000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_1_cphy_rx_clk", + "gcc_camss_cphy_1_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-rates = + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <1>; + status = "ok"; + }; + + ope: qcom,ope@0x5c42000 { + cell-index = <0>; + compatible = "qcom,ope"; + reg = + <0x5c42000 0x400>, + <0x5c42400 0x200>, + <0x5c42600 0x200>, + <0x5c42800 0x4400>, + <0x5c46c00 0x190>, + <0x5c46d90 0xA00>; + reg-names = + "ope_cdm", + "ope_top", + "ope_qos", + "ope_pp", + "ope_bus_rd", + "ope_bus_wr"; + reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>; + interrupts = ; + interrupt-names = "ope"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk_src", + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = + <171428571 0 200000000 0>, + <171428571 0 266600000 0>, + <240000000 0 465000000 0>, + <240000000 0 580000000 0>; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + src-clock-name = "ope_clk_src"; + status = "ok"; + }; +}; From ab323d58868dd262b9ee50bee4363f689de69802 Mon Sep 17 00:00:00 2001 From: Vishalsingh Hajeri Date: Mon, 4 May 2020 11:41:22 -0700 Subject: [PATCH 064/190] dt-bindings: camera: Adding documentation for CSIPHY TPG 1.3 Add compatibility string for new version of TPG. CRs-Fixed: 2682256 Change-Id: I7b00c1c62e3f9ef00b309dabca487ffc2919c3e6 --- bindings/msm-cam-tpg.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bindings/msm-cam-tpg.txt b/bindings/msm-cam-tpg.txt index 12672cb0dc72..f25fa9ae98be 100644 --- a/bindings/msm-cam-tpg.txt +++ b/bindings/msm-cam-tpg.txt @@ -17,7 +17,7 @@ Required properties: Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,tpg101", "qcom,tpg102", "qcom,tpgv1" + driver. e.g. "qcom,tpg101", "qcom,tpg102", "qcom,tpgv1", "qcom,tpg103" - cell-index Usage: required From f69aae82fbd0252fc35165cedb4ab472b43ce143 Mon Sep 17 00:00:00 2001 From: Suresh Vankadara Date: Sat, 30 May 2020 15:52:54 +0530 Subject: [PATCH 065/190] ARM: dts: msm: Add support for holi camera Support is added for Camera device nodes for Holi. CRs-Fixed: 2701462 Change-Id: Ic6cd3c32ad9232b081bc5ec43de15c16c40ff360 --- bindings/msm-cam-cdm.txt | 3 +- bindings/msm-cam-ppi.txt | 95 ++++++ holi-camera.dtsi | 715 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 812 insertions(+), 1 deletion(-) create mode 100644 bindings/msm-cam-ppi.txt create mode 100644 holi-camera.dtsi diff --git a/bindings/msm-cam-cdm.txt b/bindings/msm-cam-cdm.txt index a407bd656a0b..783bc20bab53 100644 --- a/bindings/msm-cam-cdm.txt +++ b/bindings/msm-cam-cdm.txt @@ -57,7 +57,8 @@ to CDM interface node. Definition: Should be "qcom,cam170-cpas-cdm0", "qcom,cam480-cpas-cdm0", "qcom,cam480-cpas-cdm1", "qcom,cam480-cpas-cdm2", "qcom,cam-cpas-cdm1_0", "qcom,cam-cpas-cdm1_1", "qcom,cam-cpas-cdm1_2", "qcom,cam-ife-cdm1_2", - "qcom,cam-cpas-cdm2_0" or "qcom,cam-ope-cdm2_0" + "qcom,cam-cpas-cdm2_0" or "qcom,cam-ope-cdm2_0", + "qcom,cam-cpas-cdm2_1" or "qcom,cam-ope-cdm2_1" - label Usage: required diff --git a/bindings/msm-cam-ppi.txt b/bindings/msm-cam-ppi.txt new file mode 100644 index 000000000000..4733b8e8ad31 --- /dev/null +++ b/bindings/msm-cam-ppi.txt @@ -0,0 +1,95 @@ +* Qualcomm Technologies, Inc. MSM camera PPI + +======================= +Required Node Structure +======================= +The camera PPI node must be described in First level of device nodes. The +first level describe the overall PPI node structure. + +====================================== +First Level Node - PPI device +====================================== + +- compatible + Usage: required + Value type: + Definition: Should be "qcom,ppi100". + +- cell-index: ppi hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + +- reg + Usage: required + Value type: + Definition: offset and length of the register set + for the device for the ppi operating in + compatible mode. + +- reg-names + Usage: required + Value type: + Definition: Should specify relevant names to each + reg property defined. + +- reg-cam-base + Usage: required + Value type: + Definition: offset of PPI in camera hw block + +- interrupts + Usage: required + Value type: + Definition: Interrupt associated with PPI HW. + +- interrupt-names + Usage: required + Value type: + Definition: Name of the interrupt. + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for PPI HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clock rates in Hz for PPI HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- clocks + Usage: required + Value type: + Definition: all clock phandle and source clocks. + +- regulator-names + Usage: required + Value type: + Definition: name of the voltage regulators required for the device. + +- gdscr-supply + Usage: required + Value type: + Definition: should contain gdsr regulator used for PPI clocks. + +Example: + qcom,ppi0@5cb3000 { + cell-index = <0>; + compatible = "qcom,ppi100"; + reg-names = "ppi0"; + reg = <0x5cb3000 0x200>; + reg-cam-base = <0xb3000>; + interrupt-names = "ppi0"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-names = "gcc_camss_cphy_0_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; +}; diff --git a/holi-camera.dtsi b/holi-camera.dtsi new file mode 100644 index 000000000000..bde47daef0d2 --- /dev/null +++ b/holi-camera.dtsi @@ -0,0 +1,715 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + + msm_cam_smmu_tfe { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "tfe"; + tfe_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_ope { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xc20 0x000>, + <&apps_smmu 0xc40 0x000>; + qcom,iommu-faults = "non-fatal"; + multiple-client-devices; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ope", "ope-cdm0"; + ope_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xc00 0x000>; + label = "cpas-cdm0"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + + }; + + qcom,cam-cpas@5c11000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x11000 0x13000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&gcc_camss_top_gdsc>; + clock-names = + "gcc_camss_ahb_clk", + "gcc_camss_top_ahb_clk", + "gcc_camss_top_ahb_clk_src", + "gcc_camss_axi_clk", + "gcc_camss_axi_clk_src", + "gcc_camss_nrt_axi_clk", + "gcc_camss_rt_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_AXI_CLK_SRC>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>; + src-clock-name = "gcc_camss_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0>, + <0 0 19200000 0 19200000 0 0>, + <0 0 80000000 0 150000000 0 0>, + <0 0 80000000 0 200000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", + "svs_l1", "nominal", "nominal_l1", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_CAMERA_CFG>; + cam-ahb-num-cases = <7>; + cam-ahb-bw-KBps = + <0 0>, <0 133333>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", "lowsvs", + "lowsvs", "lowsvs", "svs", "svs_l1", "svs_l1", + "svs_l1", "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "cci0", "cci1", "csid0", "csid1", "csid2", + "tfe0", "tfe1", "tfe2", "ope0", "cam-cdm-intf0", + "cpas-cdm0", "ope-cdm0", "tpg0", "tpg1"; + + camera-bus-nodes { + level2-nodes { + level-index = <2>; + level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level2-rt0-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmrt_virt MASTER_CAMNOC_HF + &bimc SLAVE_EBI>; + }; + }; + + level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level2-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmrt_virt MASTER_CAMNOC_SF + &bimc SLAVE_EBI>; + }; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr: level1-rt0-wr { + cell-index = <2>; + node-name = "level1-rt0-wr"; + parent-node = <&level2_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd_wr: level1-nrt0-rd-wr { + cell-index = <3>; + node-name = "level1-nrt0-rd-wr"; + parent-node = <&level2_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ope0_all_wr: ope0-all-wr { + cell-index = <4>; + node-name = "ope0-all-wr"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope0_all_rd: ope0-all-rd { + cell-index = <5>; + node-name = "ope0-all-rd"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + tfe0_all_wr: tfe0-all-wr { + cell-index = <6>; + node-name = "tfe0-all-wr"; + client-name = "tfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe1_all_wr: tfe1-all-wr { + cell-index = <7>; + node-name = "tfe1-all-wr"; + client-name = "tfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <9>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope_cdm0_all_rd: ope-cdm0-all-rd { + cell-index = <10>; + node-name = "ope-cdm0-all-rd"; + client-name = "ope-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <2>; + cdm-client-names = "vfe"; + status = "ok"; + }; + + cam_cpas_cdm: qcom,cpas-cdm0@5c23000 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm2_1"; + label = "cpas-cdm"; + reg = <0x5c23000 0x400>; + reg-names = "cpas-cdm0"; + reg-cam-base = <0x23000>; + interrupts = ; + interrupt-names = "cpas-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = "cam_cc_cpas_top_ahb_clk"; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>; + clock-rates = <0>; + clock-cntl-level = "svs"; + cdm-priority-group = <0x3>; + cdm-client-names = "tfe0", "tfe1", "tfe2"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + cam_ope_cdm: qcom,ope-cdm0@5c42000 { + cell-index = <0>; + compatible = "qcom,cam-ope-cdm2_1"; + label = "ope-cdm"; + reg = <0x5c42000 0x400>; + reg-names = "ope-cdm0"; + reg-cam-base = <0x42000>; + interrupts = ; + interrupt-names = "ope-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = <0 0 0>, + <0 0 0>, + <0 0 0>, + <0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ope"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "tfe"; + status = "ok"; + }; + + cam_tfe_csid0: qcom,tfe_csid0@5c6e000 { + cell-index = <0>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c6e000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x6e000 0x11000 0x13000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <300000000 0 240000000 0 300000000 0>, + <426400000 0 341333333 0 460800000 0>, + <466500000 0 384000000 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + ppi-enable; + status = "ok"; + }; + + cam_tfe0: qcom,tfe0@5c6e000 { + cell-index = <0>; + compatible = "qcom,tfe530"; + reg-names = "tfe0"; + reg = <0x5c6e000 0x5000>; + reg-cam-base = <0x6e000>; + interrupt-names = "tfe0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <300000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_csid1: qcom,tfe_csid1@5c75000 { + cell-index = <1>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c75000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x75000 0x11000 0x13000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <300000000 0 240000000 0 300000000 0>, + <426400000 0 341333333 0 460800000 0>, + <466500000 0 384000000 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + ppi-enable; + status = "ok"; + }; + + cam_tfe1: qcom,tfe1@5c75000 { + cell-index = <1>; + compatible = "qcom,tfe530"; + reg-names = "tfe1"; + reg = <0x5c75000 0x5000>; + reg-cam-base = <0x75000>; + interrupt-names = "tfe1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <300000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe_csid2: qcom,tfe_csid2@5c7c000 { + cell-index = <2>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c7c000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x7c000 0x11000 0x13000>; + interrupt-names = "csid2"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CLK>; + clock-rates = + <300000000 0 240000000 0 300000000 0>, + <426400000 0 341333333 0 460800000 0>, + <466500000 0 384000000 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + ppi-enable; + status = "ok"; + }; + + cam_tfe2: qcom,tfe2@5c7c000 { + cell-index = <2>; + compatible = "qcom,tfe530"; + reg-names = "tfe2"; + reg = <0x5c7c000 0x5000>; + reg-cam-base = <0x7c000>; + interrupt-names = "tfe2"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CLK>; + clock-rates = + <300000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_ppi0: qcom,ppi0@5cb3000 { + cell-index = <0>; + compatible = "qcom,ppi100"; + reg-names = "ppi0"; + reg = <0x5cb3000 0x200>; + reg-cam-base = <0xb3000>; + interrupt-names = "ppi0"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-names = "gcc_camss_cphy_0_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi1: qcom,ppi1@5cb3200 { + cell-index = <1>; + compatible = "qcom,ppi100"; + reg-names = "ppi1"; + reg = <0x5cb3200 0x200>; + reg-cam-base = <0xb3200>; + interrupt-names = "ppi1"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-names = "gcc_camss_cphy_1_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi2: qcom,ppi2@5cb3400 { + cell-index = <2>; + compatible = "qcom,ppi100"; + reg-names = "ppi2"; + reg = <0x5cb3400 0x200>; + reg-cam-base = <0xb3400>; + interrupt-names = "ppi2"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_2_CLK>; + clock-names = "gcc_camss_cphy_2_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi3: qcom,ppi3@5cb3600 { + cell-index = <3>; + compatible = "qcom,ppi100"; + reg-names = "ppi3"; + reg = <0x5cb3600 0x200>; + reg-cam-base = <0xb3600>; + interrupt-names = "ppi3"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_3_CLK>; + clock-names = "gcc_camss_cphy_3_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_tfe_tpg0: qcom,tpg0@5c66000 { + cell-index = <0>; + compatible = "qcom,tpg101"; + reg-names = "tpg0", "top"; + reg = <0x5c66000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x66000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_0_cphy_rx_clk", + "gcc_camss_cphy_0_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-rates = + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + cam_tfe_tpg1: qcom,tpg0@5c68000 { + cell-index = <1>; + compatible = "qcom,tpg101"; + reg-names = "tpg1", "top"; + reg = <0x5c68000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x68000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_1_cphy_rx_clk", + "gcc_camss_cphy_1_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-rates = + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <1>; + status = "ok"; + }; + + ope: qcom,ope@0x5c42000 { + cell-index = <0>; + compatible = "qcom,ope"; + reg = + <0x5c42000 0x400>, + <0x5c42400 0x200>, + <0x5c42600 0x200>, + <0x5c42800 0x4400>, + <0x5c46c00 0x190>, + <0x5c46d90 0xA00>; + reg-names = + "ope_cdm", + "ope_top", + "ope_qos", + "ope_pp", + "ope_bus_rd", + "ope_bus_wr"; + reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>; + interrupts = ; + interrupt-names = "ope"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk_src", + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = + <171428571 0 200000000 0>, + <171428571 0 266600000 0>, + <240000000 0 480000000 0>, + <240000000 0 580000000 0>; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + src-clock-name = "ope_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; +}; From 0679cf6bd0bba29a5abf0f6837ad588bb61d18c2 Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Tue, 2 Jun 2020 12:40:38 -0700 Subject: [PATCH 066/190] ARM: dts: msm: Add power support for RCM camera DC Add support for L5I and L1I to turn on sensor on RCM camera DC. CRs-Fixed: 2700940 Change-Id: If48712e7d6bdcfb8eec7037878c56606671eee68 --- lahaina-camera-sensor-cdp.dtsi | 29 +++++++++++++++++++---------- lahaina-camera-sensor-mtp.dtsi | 29 +++++++++++++++++++---------- 2 files changed, 38 insertions(+), 20 deletions(-) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index 8200734cf491..f4d5ac06e853 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -64,15 +64,19 @@ compatible = "qcom,eeprom"; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; + cam_v_custom1-supply = <&pm8008i_l5>; cam_vdig-supply = <&pm8008i_l2>; + cam_v_custom2-supply = <&pm8008i_l1>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig", "cam_v_custom2", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <10000 52000 140000 0 103000>; + rgltr-min-voltage = <1800000 2700000 1700000 950000 1000000 0 + 2700000>; + rgltr-max-voltage = <1800000 2900000 1900000 1150000 1200000 0 + 3000000>; + rgltr-load-current = <15000 52000 72000 140000 250000 0 103000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -338,15 +342,20 @@ led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; + cam_v_custom1-supply = <&pm8008i_l5>; cam_vdig-supply = <&pm8008i_l2>; + cam_v_custom2-supply = <&pm8008i_l1>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig", "cam_v_custom2","cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; + rgltr-min-voltage = <1800000 2700000 1700000 950000 1000000 0 + 3200000>; + rgltr-max-voltage = <1800000 2900000 1900000 1150000 1200000 0 + 3960000>; + rgltr-load-current = <15000 52000 72000 140000 250000 0 + 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index 8200734cf491..f4d5ac06e853 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -64,15 +64,19 @@ compatible = "qcom,eeprom"; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; + cam_v_custom1-supply = <&pm8008i_l5>; cam_vdig-supply = <&pm8008i_l2>; + cam_v_custom2-supply = <&pm8008i_l1>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_vaf-supply = <&pm8008i_l7>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig", "cam_v_custom2", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <10000 52000 140000 0 103000>; + rgltr-min-voltage = <1800000 2700000 1700000 950000 1000000 0 + 2700000>; + rgltr-max-voltage = <1800000 2900000 1900000 1150000 1200000 0 + 3000000>; + rgltr-load-current = <15000 52000 72000 140000 250000 0 103000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -338,15 +342,20 @@ led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&pm8008j_l3>; cam_vana-supply = <&pm8008i_l4>; + cam_v_custom1-supply = <&pm8008i_l5>; cam_vdig-supply = <&pm8008i_l2>; + cam_v_custom2-supply = <&pm8008i_l1>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&pm8350c_bob>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig", "cam_v_custom2","cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; + rgltr-min-voltage = <1800000 2700000 1700000 950000 1000000 0 + 3200000>; + rgltr-max-voltage = <1800000 2900000 1900000 1150000 1200000 0 + 3960000>; + rgltr-load-current = <15000 52000 72000 140000 250000 0 + 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active From 258a4cf2dd8ed7adb805c12391a9eebfad7a34ac Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Tue, 2 Jun 2020 14:06:41 +0530 Subject: [PATCH 067/190] dt-bindings: camera: Add support for new CSIPHY version Add new CSIPHY version 1.2.4 to bindings. CRs-Fixed: 2709344 Change-Id: I1ec6e867b904353bfc7ffa4f88a8604675484a23 --- bindings/msm-cam-csiphy.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index cb5680aac9cb..3aa9b41d155a 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -16,7 +16,7 @@ First Level Node - CSIPHY device Definition: Should be "qcom,csiphy-v1.0", "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", "qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2", - "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy". + "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy-v1.2.4", "qcom,csiphy". - cell-index: csiphy hardware core index Usage: required From cdd75fa3b1952c0049d3fdb8abb7764abc8fc407 Mon Sep 17 00:00:00 2001 From: Suresh Vankadara Date: Mon, 22 Jun 2020 11:42:11 +0530 Subject: [PATCH 068/190] ARM: dts: msm: Fix MM client for camera SF client Update mmnrt entry for camera SF client. CRs-Fixed: 2701462 Change-Id: I7bbd6062a931c28566e33b28df789575775cd716 --- holi-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index bde47daef0d2..87dc2b5a2ca9 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -179,7 +179,7 @@ qcom,axi-port-mnoc { interconnect-names = "cam_sf_0"; interconnects = - <&mmrt_virt MASTER_CAMNOC_SF + <&mmnrt_virt MASTER_CAMNOC_SF &bimc SLAVE_EBI>; }; }; From 716d4f0a2c434afe4e79826bb3bf81f178c2998f Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Mon, 22 Jun 2020 05:43:36 +0530 Subject: [PATCH 069/190] ARM: dts: msm: Add camera sensor devicetree support for shima Add devicetree nodes of sensor modules (sensor/flash/eeprom/actuator) to IDP/IDPS platforms for shima. Change-Id: I539f456185a5d6332c29d00c6c960a9ad29250d3 CRs-Fixed: 2709344 --- shima-camera-sensor-idp.dtsi | 382 ++++++++++++++++++++++++++++++++++ shima-camera-sensor-idps.dtsi | 382 ++++++++++++++++++++++++++++++++++ 2 files changed, 764 insertions(+) create mode 100644 shima-camera-sensor-idp.dtsi create mode 100644 shima-camera-sensor-idps.dtsi diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi new file mode 100644 index 000000000000..5a18e6d08682 --- /dev/null +++ b/shima-camera-sensor-idp.dtsi @@ -0,0 +1,382 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_wide: qcom,actuator0 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom0 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_vana1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom1 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; diff --git a/shima-camera-sensor-idps.dtsi b/shima-camera-sensor-idps.dtsi new file mode 100644 index 000000000000..5a18e6d08682 --- /dev/null +++ b/shima-camera-sensor-idps.dtsi @@ -0,0 +1,382 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_wide: qcom,actuator0 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom0 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_vana1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom1 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From c88d8b39de520c0059d464024e370a221112680e Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Mon, 8 Jun 2020 19:44:16 +0530 Subject: [PATCH 070/190] ARM: dts: msm: Add camera device tree support for Shima camera Add ICP, IPE, BPS, CDM, SMMU, JPEG, IFE, CSID nodes for shima camera. CRs-Fixed: 2707213 Change-Id: I018611b5d6cdb5dabf6f6720b5e211872e8bcc85 --- shima-camera.dtsi | 912 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 912 insertions(+) create mode 100644 shima-camera.dtsi diff --git a/shima-camera.dtsi b/shima-camera.dtsi new file mode 100644 index 000000000000..7639917c2a89 --- /dev/null +++ b/shima-camera.dtsi @@ -0,0 +1,912 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1000 0x440>, + <&apps_smmu 0x1040 0x440>, + <&apps_smmu 0x1400 0x440>, + <&apps_smmu 0x1440 0x440>; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + label = "ife", "ife-cdm"; + multiple-client-devices; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2840 0x400>, + <&apps_smmu 0x2C40 0x400>; + label = "jpeg"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x28E2 0x400>, + <&apps_smmu 0x2CE2 0x400>, + <&apps_smmu 0x2800 0x400>, + <&apps_smmu 0x2C00 0x400>, + <&apps_smmu 0x2860 0x400>, + <&apps_smmu 0x2C60 0x400>, + <&apps_smmu 0x2820 0x400>, + <&apps_smmu 0x2C20 0x400>; + label = "icp"; + qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 150MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x9600000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10a00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.3 GB */ + iova-region-name = "io"; + iova-region-start = <0x10c00000>; + iova-region-len = <0xcf300000>; + iova-region-id = <0x3>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10b00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x28C0 0x400>, + <&apps_smmu 0x2CC0 0x400>; + label = "cpas-cdm"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + label = "cam-secure"; + qcom,secure-cb; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc"; + status = "ok"; + }; + + qcom,cpas-cdm0 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm1_2"; + label = "cpas-cdm"; + reg = <0xac4d000 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x4d000>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife3", "ife4"; + status = "ok"; + }; + + qcom,ife-cdm0 { + cell-index = <0>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; + reg = <0xacb4200 0x1000>; + reg-names = "ife-cdm0"; + reg-cam-base = <0xb4200>; + interrupts = ; + interrupt-names = "ife-cdm0"; + regulator-names = "camss","ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = "ife_0_ahb", + "ife_0_areg", + "ife_clk", + "ife_axi_clk", + "cam_cc_cpas_ahb_clk"; + clocks = + <&camcc CAM_CC_IFE_0_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AREG_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ife0"; + status = "ok"; + }; + + qcom,ife-cdm1 { + cell-index = <1>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; + reg = <0xacc3200 0x1000>; + reg-names = "ife-cdm1"; + reg-cam-base = <0xc3200>; + interrupts = ; + interrupt-names = "ife-cdm1"; + regulator-names = "camss","ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = "ife_1_ahb", + "ife_1_areg", + "ife_clk", + "ife_axi_clk", + "cam_cc_cpas_ahb_clk"; + clocks = + <&camcc CAM_CC_IFE_1_AHB_CLK>, + <&camcc CAM_CC_IFE_1_AREG_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ife1"; + status = "ok"; + }; + + qcom,ife-cdm2 { + cell-index = <2>; + compatible = "qcom,cam-ife-cdm1_2"; + label = "ife-cdm"; + reg = <0xacef200 0x1000>; + reg-names = "ife-cdm2"; + reg-cam-base = <0xef200>; + interrupts = ; + interrupt-names = "ife-cdm2"; + regulator-names = "camss","ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = "ife_2_ahb", + "ife_2_areg", + "ife_clk", + "ife_axi_clk", + "cam_cc_cpas_ahb_clk"; + clocks = + <&camcc CAM_CC_IFE_2_AHB_CLK>, + <&camcc CAM_CC_IFE_2_AREG_CLK>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>, + <0 0 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ife2"; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_csid0: qcom,csid0 { + cell-index = <0>; + compatible = "qcom,csid580"; + reg-names = "csid"; + reg = <0xacb5200 0x1000>; + reg-cam-base = <0xb5200>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_0_areg", + "ife_0_ahb", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AREG_CLK>, + <&camcc CAM_CC_IFE_0_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <400000000 0 320000000 0 338000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 600000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,ife0 { + cell-index = <0>; + compatible = "qcom,vfe580"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacb4000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xb4000 0x42000>; + interrupt-names = "ife0"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_0_ahb", + "ife_0_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AREG_CLK>, + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <0 100000000 338000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 600000000 0 0>, + <0 400000000 720000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_0_areg"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid1: qcom,csid1 { + cell-index = <1>; + compatible = "qcom,csid580"; + reg-names = "csid"; + reg = <0xacc4200 0x1000>; + reg-cam-base = <0xc4200>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_1_areg", + "ife_1_ahb", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AREG_CLK>, + <&camcc CAM_CC_IFE_1_AHB_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <400000000 0 320000000 0 338000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 600000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,ife1 { + cell-index = <1>; + compatible = "qcom,vfe580"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacc3000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xc3000 0x42000>; + interrupt-names = "ife1"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_1_ahb", + "ife_1_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_AHB_CLK>, + <&camcc CAM_CC_IFE_1_AREG_CLK>, + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <0 100000000 338000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 600000000 0 0>, + <0 400000000 720000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_1_areg"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <720000000>; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid2: qcom,csid2 { + cell-index = <2>; + compatible = "qcom,csid580"; + reg-names = "csid"; + reg = <0xacf0200 0x1000>; + reg-cam-base = <0xf0200>; + interrupt-names = "csid2"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_2_areg", + "ife_2_ahb", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_2_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_2_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AREG_CLK>, + <&camcc CAM_CC_IFE_2_AHB_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <400000000 0 320000000 0 338000000 0 100000000 0 0>, + <400000000 0 400000000 0 475000000 0 200000000 0 0>, + <400000000 0 400000000 0 600000000 0 300000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>, + <400000000 0 400000000 0 720000000 0 400000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe2: qcom,ife2 { + cell-index = <2>; + compatible = "qcom,vfe580"; + reg-names = "ife", "cam_camnoc"; + reg = <0xacef000 0xd000>, + <0xac42000 0x8000>; + reg-cam-base = <0xef000 0x42000>; + interrupt-names = "ife2"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_2_ahb", + "ife_2_areg", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_2_AHB_CLK>, + <&camcc CAM_CC_IFE_2_AREG_CLK>, + <&camcc CAM_CC_IFE_2_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <0 100000000 338000000 0 0>, + <0 200000000 475000000 0 0>, + <0 300000000 600000000 0 0>, + <0 400000000 720000000 0 0>, + <0 400000000 720000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_2_areg"; + clock-control-debugfs = "true"; + ubwc-static-cfg = <0x1026 0x1036>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0 { + cell-index = <3>; + compatible = "qcom,csid-lite580"; + reg-names = "csid-lite"; + reg = <0xacd9200 0x1000>; + reg-cam-base = <0xd9200>; + interrupt-names = "csid-lite0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_lite_ahb", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <400000000 0 0 0 400000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,ife-lite0 { + cell-index = <3>; + compatible = "qcom,vfe-lite580"; + reg-names = "ife-lite"; + reg = <0xacd9000 0x2200>; + reg-cam-base = <0xd9000>; + interrupt-names = "ife-lite0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_lite_ahb", + "ife_lite_axi", + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_AXI_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_csid_lite1: qcom,csid-lite1 { + cell-index = <4>; + compatible = "qcom,csid-lite580"; + reg-names = "csid-lite"; + reg = <0xacdb400 0x1000>; + reg-cam-base = <0xdb400>; + interrupt-names = "csid-lite1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_lite_ahb", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <400000000 0 0 0 400000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>, + <400000000 0 0 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite1: qcom,ife-lite1 { + cell-index = <4>; + compatible = "qcom,vfe-lite580"; + reg-names = "ife-lite"; + reg = <0xacdb200 0x2200>; + reg-cam-base = <0xdb200>; + interrupt-names = "ife-lite1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_lite_ahb", + "ife_lite_axi", + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_AXI_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_CLK>; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>, + <0 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_csiphy_tpg0: qcom,tpg0@ac97000 { + cell-index = <0>; + compatible = "qcom,tpg102"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xac97000 0x1000>, + <0xac40000 0x1000>; + reg-cam-base = <0x97000 0x40000>; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-rates = + <400000000 0 300000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "csi0phytimer_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg1: qcom,tpg1@ac98000 { + cell-index = <1>; + compatible = "qcom,tpg102"; + reg-names = "tpg1", "cam_cpas_top"; + reg = <0xac98000 0x1000>, + <0xac40000 0x1000>; + reg-cam-base = <0x98000 0x40000>; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + clocks = + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-rates = + <400000000 0 300000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "csi1phytimer_clk_src"; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", + "qcom,ipe0", + "qcom,bps"; + num-a5 = <1>; + num-ipe = <1>; + num-bps = <1>; + status = "ok"; + icp_pc_en; + ipe_bps_pc_en; + }; + + cam_a5: qcom,a5 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_ICP_CLK_SRC>, + <&camcc CAM_CC_ICP_CLK>; + + clock-rates = + <100000000 0 400000000 0>, + <200000000 0 480000000 0>, + <300000000 0 600000000 0>, + <400000000 0 600000000 0>, + <400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + fw_name = "CAMERA_ICP.elf"; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; + }; + + cam_ipe0: qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac9a000 0x12000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x9a000>; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk_src", + "ipe_0_clk"; + src-clock-name = "ipe_0_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_IPE_0_AHB_CLK>, + <&camcc CAM_CC_IPE_0_AREG_CLK>, + <&camcc CAM_CC_IPE_0_AXI_CLK>, + <&camcc CAM_CC_IPE_0_CLK_SRC>, + <&camcc CAM_CC_IPE_0_CLK>; + + clock-rates = + <0 0 0 300000000 0>, + <0 0 0 450000000 0>, + <0 0 0 525000000 0>, + <0 0 0 700000000 0>, + <0 0 0 700000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; + }; + + cam_bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac7a000 0x8000>; + reg-names = "bps_top"; + reg-cam-base = <0x7a000>; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = + "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk_src", + "bps_clk"; + src-clock-name = "bps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_BPS_AHB_CLK>, + <&camcc CAM_CC_BPS_AREG_CLK>, + <&camcc CAM_CC_BPS_AXI_CLK>, + <&camcc CAM_CC_BPS_CLK_SRC>, + <&camcc CAM_CC_BPS_CLK>; + + clock-rates = + <0 0 0 200000000 0>, + <0 0 0 400000000 0>, + <0 0 0 480000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac53000 0x4000>; + reg-cam-base = <0x53000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac57000 0x4000>; + reg-cam-base = <0x57000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; +}; From dd390c2312fcd5c38a5df9adb14212f63327edd2 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Tue, 9 Jun 2020 21:48:25 +0530 Subject: [PATCH 071/190] ARM: dts: msm: Add CAMNOC nodes in Shima camera Add CAMNOC device tree in Shima camera dtsi. CRs-Fixed: 2707213 Change-Id: I80a4f49947a972ab97ea8a6f6328769cfa406996 --- shima-camera.dtsi | 569 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 569 insertions(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 7639917c2a89..b2bd7f299e74 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -909,4 +909,573 @@ clock-cntl-level = "nominal"; status = "ok"; }; + + qcom,cam-cpas { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0xac40000 0x1000>, + <0xac42000 0x8000>; + reg-cam-base = <0x40000 0x42000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_hf_clk", + "gcc_axi_sf_clk", + "slow_ahb_clk_src", + "cpas_ahb_clk", + "cpas_core_ahb_clk", + "camnoc_axi_clk_src", + "camnoc_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CORE_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "camnoc_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0 0>, + <0 0 0 80000000 0 0 300000000 0>, + <0 0 0 80000000 0 0 300000000 0>, + <0 0 0 80000000 0 0 342855555 0>, + <0 0 0 80000000 0 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_CAMERA_CFG>; + cam-ahb-num-cases = <8>; + cam-ahb-bw-KBps = + <0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", + "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csid0", "csid1", "csid2", "csid3", + "csid4", "ife0", "ife1", "ife2", "ife3", "ife4", + "ipe0", "cam-cdm-intf0","ife-cdm0", "ife-cdm1", + "ife-cdm2", "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", + "jpeg-enc0", "tpg0", "tpg1"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_rd_wr_sum: level3-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_HF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_SF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt1_rd_wr_sum: level3-nrt1-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = + "cam_sf_icp"; + interconnects = + <&mmss_noc MASTER_CAMNOC_ICP + &mc_virt SLAVE_EBI1>; + }; + }; + }; + + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt0_wr: level2-rt0-wr { + cell-index = <3>; + node-name = "level2-rt0-wr"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt0_rd: level2-rt0-rd { + cell-index = <4>; + node-name = "level2-rt0-rd"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_wr: level2-nrt0-wr { + cell-index = <5>; + node-name = "level2-nrt0-wr"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_rd: level2-nrt0-rd { + cell-index = <6>; + node-name = "level2-nrt0-rd"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_rd: level2-nrt1-rd { + cell-index = <7>; + node-name = "level2-nrt1-rd"; + parent-node = <&level3_nrt1_rd_wr_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr0: level1-rt0-wr0 { + cell-index = <8>; + node-name = "level1-rt0-wr0"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr1: level1-rt0-wr1 { + cell-index = <9>; + node-name = "level1-rt0-wr1"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_rd0: level1-rt0-rd0 { + cell-index = <10>; + node-name = "level1-rt0-rd0"; + parent-node = <&level2_rt0_rd>; + traffic-merge-type = + ; + }; + + level1_rt0_wr2: level1-rt0-wr2 { + cell-index = <11>; + node-name = "level1-rt0-wr2"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr0: level1-nrt0-wr0 { + cell-index = <12>; + node-name = "level1-nrt0-wr0"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd0: level1-nrt0-rd0 { + cell-index = <13>; + node-name = "level1-nrt0-rd0"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr1: level1-nrt0-wr1 { + cell-index = <14>; + node-name = "level1-nrt0-wr1"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd1: level1-nrt0-rd1 { + cell-index = <15>; + node-name = "level1-nrt0-rd2"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ife2_ubwc_stats_wr: ife2-ubwc-stats-wr { + cell-index = <16>; + node-name = "ife2-ubwc-stats-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife0_ubwc_stats_wr: ife0-ubwc-stats-wr { + cell-index = <17>; + node-name = "ife0-ubwc-stats-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife1_ubwc_stats_wr: ife1-ubwc-stats-wr { + cell-index = <18>; + node-name = "ife1-ubwc-stats-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife0_linear_pdaf_wr: ife0-linear-pdaf-wr { + cell-index = <19>; + node-name = "ife0-linear-pdaf-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife1_linear_pdaf_wr: ife1-linear-pdaf-wr { + cell-index = <20>; + node-name = "ife1-linear-pdaf-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife2_linear_pdaf_wr: ife2-linear-pdaf-wr { + cell-index = <21>; + node-name = "ife2-linear-pdaf-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife0_rdi_all_rd: ife0-rdi-all-rd { + cell-index = <22>; + node-name = "ife0-rdi-all-rd"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife1_rdi_all_rd: ife1-rdi-all-rd { + cell-index = <23>; + node-name = "ife1-rdi-all-rd"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife2_rdi_all_rd: ife2-rdi-all-rd { + cell-index = <24>; + node-name = "ife2-rdi-all-rd"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { + cell-index = <25>; + node-name = "ife0-rdi-pixel-raw-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { + cell-index = <26>; + node-name = "ife1-rdi-pixel-raw-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife2_rdi_pixel_raw_wr: ife2-rdi-pixel-raw-wr { + cell-index = <27>; + node-name = "ife2-rdi-pixel-raw-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife3_rdi_all_wr: ife3-rdi-all-wr { + cell-index = <28>; + node-name = "ife3-rdi-all-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife4_rdi_all_wr: ife4-rdi-all-wr { + cell-index = <29>; + node-name = "ife4-rdi-all-wr"; + client-name = "ife4"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ipe0_all_wr: ipe0-all-wr { + cell-index = <30>; + node-name = "ipe0-all-wr"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <31>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + ipe0_ref_rd: ipe0-ref-rd { + cell-index = <32>; + node-name = "ipe0-ref-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <33>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + ipe0_in_rd: ipe0-in-rd { + cell-index = <34>; + node-name = "ipe0-in-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + jpeg_enc0_all_wr: jpeg-enc0-all-wr { + cell-index = <35>; + node-name = "jpeg-enc0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr1>; + }; + + jpeg_dma0_all_wr: jpeg-dma0-all-wr { + cell-index = <36>; + node-name = "jpeg-dma0-all-wr"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr1>; + }; + + jpeg_enc0_all_rd: jpeg-enc0-all-rd { + cell-index = <37>; + node-name = "jpeg-enc0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + jpeg_dma0_all_rd: jpeg-dma0-all-rd { + cell-index = <38>; + node-name = "jpeg-dma0-all-rd"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <39>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <40>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_rd>; + }; + }; + }; + }; }; From b481e3262276755d0d07566daeda6ffd146795d7 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Mon, 22 Jun 2020 07:14:08 +0530 Subject: [PATCH 072/190] ARM: dts: msm: Add CSIPHY/CCI devicetree support for shima Add CSIPHY/CCI nodes to camera devicetree for shima. Change-Id: I4499e9aab45fb8f1e7728fffc5b260638d18eeff CRs-Fixed: 2709344 --- shima-camera.dtsi | 390 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 390 insertions(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index b2bd7f299e74..1eb72cade0a6 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -11,6 +11,396 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.4", "qcom,csiphy"; + reg = <0x0ac6a000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6a000>; + interrupts = ; + interrupt-names = "csiphy0"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L10C>; + csi-vdd-0p9-supply = <&L6B>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <320000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.4", "qcom,csiphy"; + reg = <0xac6c000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6c000>; + interrupts = ; + interrupt-names = "csiphy1"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L10C>; + csi-vdd-0p9-supply = <&L6B>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <320000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.4", "qcom,csiphy"; + reg = <0xac6e000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x6e000>; + interrupts = ; + interrupt-names = "csiphy2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L10C>; + csi-vdd-0p9-supply = <&L6B>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <320000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.4", "qcom,csiphy"; + reg = <0xac70000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x70000>; + interrupts = ; + interrupt-names = "csiphy3"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L10C>; + csi-vdd-0p9-supply = <&L6B>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <320000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy4 { + cell-index = <4>; + compatible = "qcom,csiphy-v1.2.4", "qcom,csiphy"; + reg = <0xac72000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x72000>; + interrupts = ; + interrupt-names = "csiphy4"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L10C>; + csi-vdd-0p9-supply = <&L6B>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY4_CLK>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy4_clk", + "csi4phytimer_clk_src", + "csi4phytimer_clk"; + src-clock-name = "csi4phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <320000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy5: qcom,csiphy5 { + cell-index = <5>; + compatible = "qcom,csiphy-v1.2.4", "qcom,csiphy"; + reg = <0xac74000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x74000>; + interrupts = ; + interrupt-names = "csiphy5"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L10C>; + csi-vdd-0p9-supply = <&L6B>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY5_CLK>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy5_clk", + "csi5phytimer_clk_src", + "csi5phytimer_clk"; + src-clock-name = "csi5phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <320000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac4f000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4f000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&clock_camcc CAM_CC_CCI_0_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_0_CLK>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 107 0>, + <&tlmm 108 0>, + <&tlmm 109 0>, + <&tlmm 110 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac50000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x50000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&clock_camcc CAM_CC_CCI_1_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_1_CLK>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active &cci3_active>; + pinctrl-1 = <&cci2_suspend &cci3_suspend>; + gpios = <&tlmm 111 0>, + <&tlmm 112 0>, + <&tlmm 113 0>, + <&tlmm 114 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2", + "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam_smmu { compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; From f9a19d4c9af81110907652cbe2b7e000e645649f Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Wed, 27 May 2020 10:33:43 +0800 Subject: [PATCH 073/190] ARM: dts: msm: Update PMIC voltage to meet sensor spec Raise up 50mv of L1i, L2i, L1j volatage to meet sensor spec voltage. Change-Id: Id0131a9c683526e285b54266298e441b67800f7d CRs-Fixed: 2694123 --- lahaina-camera-sensor-qrd.dtsi | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/lahaina-camera-sensor-qrd.dtsi b/lahaina-camera-sensor-qrd.dtsi index eca5277709d0..48da6db60f15 100644 --- a/lahaina-camera-sensor-qrd.dtsi +++ b/lahaina-camera-sensor-qrd.dtsi @@ -70,7 +70,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-min-voltage = <1800000 2700000 1000000 0 2700000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; rgltr-load-current = <10000 52000 140000 0 103000>; gpio-no-mux = <0>; @@ -106,7 +106,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vana1", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-min-voltage = <1800000 2700000 1700000 1050000 0 2700000>; rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; rgltr-load-current = <5000 68000 74000 805000 0 103000>; gpio-no-mux = <0>; @@ -183,8 +183,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-min-voltage = <1800000 2700000 1000000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <10000 52000 140000 0 2000000>; gpio-no-mux = <0>; @@ -227,8 +226,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-min-voltage = <1800000 2700000 1700000 1050000 0 3200000>; rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; rgltr-load-current = <5000 68000 74000 805000 0 2000000>; gpio-no-mux = <0>; @@ -317,7 +315,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-min-voltage = <1800000 2700000 1000000 0 2700000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; rgltr-load-current = <3000 52000 257000 0 103000>; gpio-no-mux = <0>; @@ -382,7 +380,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-min-voltage = <1800000 2700000 1000000 0>; rgltr-max-voltage = <1800000 2900000 1150000 0>; rgltr-load-current = <5000 35000 301000 0>; gpio-no-mux = <0>; @@ -424,8 +422,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-min-voltage = <1800000 2700000 1000000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <3000 52000 257000 0 2000000>; gpio-no-mux = <0>; @@ -501,8 +498,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - pwm-switch; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-min-voltage = <1800000 2700000 1000000 0 3200000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <5000 35000 301000 0 2000000>; gpio-no-mux = <0>; From 2037851cc041087f300d5f55af834ee461e2b9b3 Mon Sep 17 00:00:00 2001 From: Jigar Agrawal Date: Thu, 9 Jul 2020 15:31:53 -0700 Subject: [PATCH 074/190] dt-bindings: camera: Add compatible string for Waipio CSIPHY Update the binding for the CSIPHY 2.1.0 for Waipio. CRs-Fixed: 2724449 Change-Id: I32df9350afab14446c3e871e5575aeb4836e4251 --- bindings/msm-cam-csiphy.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index 3aa9b41d155a..8be06453c709 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -16,7 +16,8 @@ First Level Node - CSIPHY device Definition: Should be "qcom,csiphy-v1.0", "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", "qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2", - "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy-v1.2.4", "qcom,csiphy". + "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy-v2.1.0", + "qcom,csiphy-v1.2.4", "qcom,csiphy". - cell-index: csiphy hardware core index Usage: required From fc5cbad4b637f6fb8da6585f55efc48b16649432 Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Fri, 12 Jun 2020 12:30:53 +0530 Subject: [PATCH 075/190] ARM: dts: msm: Add cam-sync node for bengal target Adds cam-sync driver node for bengal target. CRs-Fixed: 2729996 Change-Id: I401e8eabe13fafbdcb00a63f25783084d90d1ab4 --- bengal-camera.dtsi | 11 ++++++++--- holi-camera.dtsi | 4 ++-- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index a84ebde35aa6..d8e1210f4335 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -6,6 +6,11 @@ status = "ok"; }; + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + cam_csiphy0: qcom,csiphy0 { cell-index = <0>; compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy"; @@ -223,7 +228,7 @@ qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ope", "ope-cdm0"; + label = "ope", "ope-cdm"; ope_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -239,7 +244,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x800 0x000>; - label = "cpas-cdm0"; + label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { @@ -264,7 +269,7 @@ qcom,cam-cpas@5c11000 { cell-index = <0>; - compatible = "qcom,cam-cpas"; + compatible = "qcom,cam-cpas", "simple-bus"; label = "cpas"; arch-compat = "cpas_top"; status = "ok"; diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 87dc2b5a2ca9..39edc689efe2 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -40,7 +40,7 @@ qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ope", "ope-cdm0"; + label = "ope", "ope-cdm"; ope_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -56,7 +56,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xc00 0x000>; - label = "cpas-cdm0"; + label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { From 52f29ffeec7c485265abccc1fa8940ef85a20f47 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Wed, 15 Jul 2020 17:42:22 +0530 Subject: [PATCH 076/190] ARM: dts: msm: Fix camcc clock handles in phy/cci nodes Fix camcc clock names in phy/cci nodes in camera dt for shima. CRs-Fixed: 2732811 Change-Id: I6a217c748c12733ee860263a4caf5b1cdb5b4aa7 --- shima-camera.dtsi | 56 +++++++++++++++++++++++------------------------ 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 1eb72cade0a6..4ea2ad3b1865 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -29,10 +29,10 @@ rgltr-min-voltage = <0 0 1200000 880000>; rgltr-max-voltage = <0 0 1260000 1050000>; rgltr-load-current = <0 0 54000 96400>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY0_CLK>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>; clock-names = "cphy_rx_clk_src", "csiphy0_clk", "csi0phytimer_clk_src", @@ -63,10 +63,10 @@ rgltr-min-voltage = <0 0 1200000 880000>; rgltr-max-voltage = <0 0 1260000 1050000>; rgltr-load-current = <0 0 54000 96400>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY1_CLK>, - <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>; clock-names = "cphy_rx_clk_src", "csiphy1_clk", "csi1phytimer_clk_src", @@ -97,10 +97,10 @@ rgltr-min-voltage = <0 0 1200000 880000>; rgltr-max-voltage = <0 0 1260000 1050000>; rgltr-load-current = <0 0 54000 96400>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY2_CLK>, - <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>; clock-names = "cphy_rx_clk_src", "csiphy2_clk", "csi2phytimer_clk_src", @@ -131,10 +131,10 @@ rgltr-min-voltage = <0 0 1200000 880000>; rgltr-max-voltage = <0 0 1260000 1050000>; rgltr-load-current = <0 0 54000 96400>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY3_CLK>, - <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>; clock-names = "cphy_rx_clk_src", "csiphy3_clk", "csi3phytimer_clk_src", @@ -165,10 +165,10 @@ rgltr-min-voltage = <0 0 1200000 880000>; rgltr-max-voltage = <0 0 1260000 1050000>; rgltr-load-current = <0 0 54000 96400>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY4_CLK>, - <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>; clock-names = "cphy_rx_clk_src", "csiphy4_clk", "csi4phytimer_clk_src", @@ -199,10 +199,10 @@ rgltr-min-voltage = <0 0 1200000 880000>; rgltr-max-voltage = <0 0 1260000 1050000>; rgltr-load-current = <0 0 54000 96400>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY5_CLK>, - <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY5_CLK>, + <&camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI5PHYTIMER_CLK>; clock-names = "cphy_rx_clk_src", "csiphy5_clk", "csi5phytimer_clk_src", @@ -226,8 +226,8 @@ status = "ok"; gdscr-supply = <&cam_cc_titan_top_gdsc>; regulator-names = "gdscr"; - clocks = <&clock_camcc CAM_CC_CCI_0_CLK_SRC>, - <&clock_camcc CAM_CC_CCI_0_CLK>; + clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>, + <&camcc CAM_CC_CCI_0_CLK>; clock-names = "cci_0_clk_src", "cci_0_clk"; src-clock-name = "cci_0_clk_src"; @@ -319,8 +319,8 @@ status = "ok"; gdscr-supply = <&cam_cc_titan_top_gdsc>; regulator-names = "gdscr"; - clocks = <&clock_camcc CAM_CC_CCI_1_CLK_SRC>, - <&clock_camcc CAM_CC_CCI_1_CLK>; + clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>, + <&camcc CAM_CC_CCI_1_CLK>; clock-names = "cci_1_clk_src", "cci_1_clk"; src-clock-name = "cci_1_clk_src"; From 62013c9c4dc0e4bd39bb774b1a389033bb2bc08c Mon Sep 17 00:00:00 2001 From: Sureshnaidu Laveti Date: Tue, 7 Jul 2020 09:25:05 -0700 Subject: [PATCH 077/190] ARM: dts: msm: Add OIS node to Lahaina target Add OIS node to Lahaina target to support OIS for CCI 0. CRs-Fixed: 2721489 External Impact: No Change-Id: I5813739bd2c916342066a96ebf99345aaf171118 --- lahaina-camera-sensor-cdp.dtsi | 13 +++++++++++++ lahaina-camera-sensor-mtp.dtsi | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/lahaina-camera-sensor-cdp.dtsi b/lahaina-camera-sensor-cdp.dtsi index f4d5ac06e853..488c6cb18c3c 100644 --- a/lahaina-camera-sensor-cdp.dtsi +++ b/lahaina-camera-sensor-cdp.dtsi @@ -35,6 +35,18 @@ }; &cam_cci0 { + ois0: qcom,ois0 { + cell-index = <0>; + compatible = "qcom,ois"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + actuator_triple_tele: qcom,actuator0 { cell-index = <0>; compatible = "qcom,actuator"; @@ -337,6 +349,7 @@ sensor-position-roll = <90>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + ois-src = <&ois0>; eeprom-src = <&eeprom_triple_tele>; actuator-src = <&actuator_triple_tele>; led-flash-src = <&led_flash_triple_rear_aux>; diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index f4d5ac06e853..488c6cb18c3c 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -35,6 +35,18 @@ }; &cam_cci0 { + ois0: qcom,ois0 { + cell-index = <0>; + compatible = "qcom,ois"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + actuator_triple_tele: qcom,actuator0 { cell-index = <0>; compatible = "qcom,actuator"; @@ -337,6 +349,7 @@ sensor-position-roll = <90>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + ois-src = <&ois0>; eeprom-src = <&eeprom_triple_tele>; actuator-src = <&actuator_triple_tele>; led-flash-src = <&led_flash_triple_rear_aux>; From 8f0ed7f0a18b976686cc2e30e5258d92c806be03 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Mon, 20 Jul 2020 02:59:18 +0530 Subject: [PATCH 078/190] ARM: dts: msm: Fix clock handles in sensor DTs for shima Fix camcc clock names in sensor dt nodes for shima. CRs-Fixed: 2732811 Change-Id: I101eb98754adaa954a310d4dbb84d9f5fcca75a8 --- shima-camera-sensor-idp.dtsi | 16 ++++++++-------- shima-camera-sensor-idps.dtsi | 16 ++++++++-------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index 5a18e6d08682..5922346607e5 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -89,7 +89,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -124,7 +124,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -167,7 +167,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -209,7 +209,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -258,7 +258,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -292,7 +292,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -334,7 +334,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -374,7 +374,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; diff --git a/shima-camera-sensor-idps.dtsi b/shima-camera-sensor-idps.dtsi index 5a18e6d08682..5922346607e5 100644 --- a/shima-camera-sensor-idps.dtsi +++ b/shima-camera-sensor-idps.dtsi @@ -89,7 +89,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -124,7 +124,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -167,7 +167,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -209,7 +209,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -258,7 +258,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -292,7 +292,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -334,7 +334,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -374,7 +374,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; From 40b5c64d1605ba8fff8c656e3aed9c11d3db2750 Mon Sep 17 00:00:00 2001 From: Jigar Agrawal Date: Sun, 7 Jun 2020 16:14:56 -0700 Subject: [PATCH 079/190] ARM: dts: msm: Add dualife as a client of CPAS-CDM for Kona and Lahaina Add dualife in the CPAS-CDM client list to use the CPAS-CDM for dual IFE usecase. CRs-Fixed: 2704472 Change-Id: Id482e9fee3794cd70ab136712ba4dcc2c6162d16 --- kona-camera.dtsi | 2 +- lahaina-camera.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index 20aba2306c76..db430c6a3532 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1151,7 +1151,7 @@ <&clock_camcc CAM_CC_CPAS_AHB_CLK>; clock-rates = <0 0>; clock-cntl-level = "svs"; - cdm-client-names = "ife2", "ife3", "ife4", "ife5", "ife6"; + cdm-client-names = "ife2", "ife3", "ife4", "ife5", "ife6", "dualife"; status = "ok"; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index eb80415a1ed9..15b65c62056e 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1170,7 +1170,7 @@ <&clock_camcc CAM_CC_CPAS_AHB_CLK>; clock-rates = <0 0>; clock-cntl-level = "svs"; - cdm-client-names = "ife3", "ife4"; + cdm-client-names = "ife3", "ife4", "dualife"; status = "ok"; }; From 82d8d12d36d9e665685b084fd686e8d9c37d3655 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 16 Jul 2020 17:33:41 +0530 Subject: [PATCH 080/190] ARM: dts: msm: Add Camera Sensor nodes for MTP,CDP for holi Enable Camera sensors, EEPROM, actuator, Flash nodes for holi camera. Change-Id: Ifd5215d083863fa7ea24649c72d9905f4d849d71 CRs-Fixed: 2733427 --- holi-camera-sensor-cdp.dtsi | 383 ++++++++++++++++++++++++++++++++++++ holi-camera-sensor-mtp.dtsi | 383 ++++++++++++++++++++++++++++++++++++ 2 files changed, 766 insertions(+) create mode 100644 holi-camera-sensor-cdp.dtsi create mode 100644 holi-camera-sensor-mtp.dtsi diff --git a/holi-camera-sensor-cdp.dtsi b/holi-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..231d8e2c054f --- /dev/null +++ b/holi-camera-sensor-cdp.dtsi @@ -0,0 +1,383 @@ +#include +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + actuator_rear_aux2: qcom,actuator3 { + cell-index = <3>; + compatible = "qcom,actuator"; + cci-device = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux2>; + actuator-src = <&actuator_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; diff --git a/holi-camera-sensor-mtp.dtsi b/holi-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..231d8e2c054f --- /dev/null +++ b/holi-camera-sensor-mtp.dtsi @@ -0,0 +1,383 @@ +#include +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + actuator_rear_aux2: qcom,actuator3 { + cell-index = <3>; + compatible = "qcom,actuator"; + cci-device = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux2>; + actuator-src = <&actuator_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From e56148b05fda0bda1d688a6e421bd6718dba803c Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 16 Jul 2020 12:19:33 +0530 Subject: [PATCH 081/190] ARM: dts: msm: Add CSIPHY/CCI devicetree support for holi Add CSIPHY/CCI nodes to camera devicetree for holi camera. Change-Id: Ie39b30ebada13ce467bfdc2f90c8a899fc9bcacc CRs-Fixed: 2733427 --- bindings/msm-cam-csiphy.txt | 2 +- holi-camera.dtsi | 287 ++++++++++++++++++++++++++++++++++++ 2 files changed, 288 insertions(+), 1 deletion(-) diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index 8be06453c709..14b5052e075f 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -17,7 +17,7 @@ First Level Node - CSIPHY device "qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1", "qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2", "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy-v2.1.0", - "qcom,csiphy-v1.2.4", "qcom,csiphy". + "qcom,csiphy-v1.2.4", "qcom,csiphy-v1.2.5", "qcom,csiphy". - cell-index: csiphy hardware core index Usage: required diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 39edc689efe2..8bd1fc4cae22 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -6,6 +6,293 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.5", "qcom,csiphy"; + reg = <0x05C52000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x52000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1049000 1305000>; + rgltr-load-current = <0 0 15900 8900>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-rates = + <240000000 0 200000000 0>, + <341330000 0 200000000 0>, + <341330000 0 268800000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.5", "qcom,csiphy"; + reg = <0x05C54000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x54000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1049000 1305000>; + rgltr-load-current = <0 15900 8900>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-rates = + <240000000 0 200000000 0>, + <341330000 0 200000000 0>, + <341330000 0 268800000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.5", "qcom,csiphy"; + reg = <0x05C56000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x56000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1049000 1305000>; + rgltr-load-current = <0 15900 8900>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_2_CLK>, + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-rates = + <240000000 0 200000000 0>, + <341330000 0 200000000 0>, + <341330000 0 268800000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci"; + reg = <0x05C1B000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1B000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_0_CLK>, + <&gcc GCC_CAMSS_CCI_0_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 39 0>, + <&tlmm 40 0>, + <&tlmm 41 0>, + <&tlmm 42 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci"; + reg = <0x05C1C000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1C000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_1_CLK>, + <&gcc GCC_CAMSS_CCI_1_CLK_SRC>; + clock-names = "cci_1_clk", + "cci_1_clk_src"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + gpios = <&tlmm 43 0>, + <&tlmm 44 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam-sync { compatible = "qcom,cam-sync"; status = "ok"; From 568940cf944fc598d0e2687e06b8a86a0edab87f Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Thu, 25 Jun 2020 16:03:57 -0700 Subject: [PATCH 082/190] ARM: dts: msm: Correct regulator voting for Lahaina platforms CSIPHY hardware needs to vote for CSI regulators, for correct ref count. This change add appropriate regualtors for CSIPHY hardwares. CRs-Fixed: 2729624 Change-Id: I6c71a93ac27c0c4898c5a52e33ccca6a555fe6ef --- lahaina-camera.dtsi | 66 ++++++++++++++++++++++++++++----------------- 1 file changed, 42 insertions(+), 24 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index eb80415a1ed9..a4fefedf7e6b 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -20,10 +20,13 @@ interrupts = ; interrupt-names = "csiphy0"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY0_CLK>, <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, @@ -48,10 +51,13 @@ interrupts = ; interrupt-names = "csiphy1"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY1_CLK>, <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, @@ -77,10 +83,13 @@ interrupts = ; interrupt-names = "csiphy2"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY2_CLK>, <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, @@ -105,10 +114,13 @@ interrupts = ; interrupt-names = "csiphy3"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY3_CLK>, <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, @@ -133,10 +145,13 @@ interrupts = ; interrupt-names = "csiphy4"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY4_CLK>, <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, @@ -161,10 +176,13 @@ interrupts = ; interrupt-names = "csiphy5"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY5_CLK>, <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, From b02ad972321bb5bd70b345b77110d8a8c1b25803 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Tue, 28 Jul 2020 07:44:51 +0530 Subject: [PATCH 083/190] ARM: dts: msm: Add CSIPHY/CCI for bus3 in devicetree for holi Add support for CSIPHY/CCI for bus3 nodes to camera devicetree for holi camera. CRs-Fixed: 2733427 Change-Id: I6744c5a6e627147c91478af2f783c4fbe57d709f --- holi-camera.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 45 insertions(+), 6 deletions(-) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 8bd1fc4cae22..1f8087a35ae2 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -111,6 +111,41 @@ status = "ok"; }; + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.5", "qcom,csiphy"; + reg = <0x05C58000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x58000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L18A>; + mipi-csi-vdd2-supply = <&L22A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1049000 1305000>; + rgltr-load-current = <0 15900 8900>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_3_CLK>, + <&gcc GCC_CAMSS_CSI3PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-rates = + <240000000 0 133330000 0>, + <341330000 0 200000000 0>, + <341330000 0 268800000 0>, + <384000000 0 268800000 0>; + status = "ok"; + }; + cam_cci0: qcom,cci0 { cell-index = <0>; compatible = "qcom,cci"; @@ -223,14 +258,18 @@ clock-cntl-level = "svs"; clock-rates = <0 37500000>; pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cci2_active>; - pinctrl-1 = <&cci2_suspend>; + pinctrl-0 = <&cci2_active &cci3_active>; + pinctrl-1 = <&cci2_suspend &cci3_suspend>; gpios = <&tlmm 43 0>, - <&tlmm 44 0>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 1>; + <&tlmm 44 0>, + <&tlmm 2 0>, + <&tlmm 3 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; gpio-req-tbl-label = "CCI_I2C_DATA2", - "CCI_I2C_CLK2"; + "CCI_I2C_CLK2", + "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { hw-thigh = <201>; From 61d0c902329cdf8cbccc0bb29e64205797a64f0d Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Mon, 3 Aug 2020 15:30:12 -0700 Subject: [PATCH 084/190] ARM: dts: msm: Correct SVS clock level for IPE0 in Lahaina DT The SVS clock rate for IPE0 is 450MHz as opposed to 475MHz. This wrong entry resulted in clock being bumped to NOM instead of SVS level. CRs-Fixed: 2745429 Change-Id: I759cff68f3811d9f7c44d2fe99bbc0433895945a --- lahaina-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index eb80415a1ed9..116baed82f17 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1808,7 +1808,7 @@ clock-rates = <0 0 0 300000000 0>, - <0 0 0 475000000 0>, + <0 0 0 450000000 0>, <0 0 0 525000000 0>, <0 0 0 700000000 0>, <0 0 0 700000000 0>; From 9df5e9444a27604277660f3d1cb3e697212a209d Mon Sep 17 00:00:00 2001 From: Yulei Yao Date: Thu, 30 Jul 2020 15:14:53 +0800 Subject: [PATCH 085/190] ARM: dts: msm: Add camera dts nodes for holi QRD Add 3 rear cameras and 1 front camera nodes for holi QRD. CRs-Fixed: 2744444 External Impact: No. Change-Id: I8d9d41c48e331934ac1c0ab3084b2608093443a1 --- holi-camera-sensor-qrd.dtsi | 383 ++++++++++++++++++++++++++++++++++++ 1 file changed, 383 insertions(+) create mode 100644 holi-camera-sensor-qrd.dtsi diff --git a/holi-camera-sensor-qrd.dtsi b/holi-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..231d8e2c054f --- /dev/null +++ b/holi-camera-sensor-qrd.dtsi @@ -0,0 +1,383 @@ +#include +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pm6150l_flash0 &pm6150l_flash1>; + torch-source = <&pm6150l_torch0 &pm6150l_torch1>; + switch-source = <&pm6150l_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + actuator_rear_aux2: qcom,actuator3 { + cell-index = <3>; + compatible = "qcom,actuator"; + cci-device = <1>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1050000 0>; + rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux2>; + actuator-src = <&actuator_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From 317c0c2bdabe38ec18d4d8fccb115c764ee91db1 Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Mon, 3 Aug 2020 15:30:12 -0700 Subject: [PATCH 086/190] ARM: dts: msm: Correct SVS clock level for IPE0 in Lahaina DT The SVS clock rate for IPE0 is 450MHz as opposed to 475MHz. This wrong entry resulted in clock being bumped to NOM instead of SVS level. CRs-Fixed: 2745429 Change-Id: I759cff68f3811d9f7c44d2fe99bbc0433895945a --- lahaina-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index eb80415a1ed9..116baed82f17 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1808,7 +1808,7 @@ clock-rates = <0 0 0 300000000 0>, - <0 0 0 475000000 0>, + <0 0 0 450000000 0>, <0 0 0 525000000 0>, <0 0 0 700000000 0>, <0 0 0 700000000 0>; From 3f7c648b6b1dd5de3d87af706a48a39cc7751846 Mon Sep 17 00:00:00 2001 From: Ravikishore Pampana Date: Fri, 17 Jul 2020 07:02:47 +0530 Subject: [PATCH 087/190] ARM: dts: msm: camera: Add hw pid info to ife nodes for lahaina and shima Each ife hardware instance has unique pid values. Add pid values to each ife node instance. These are used to find the ife instance that caused page fault. Added pid values to lahaina and shima ife nodes. CRs-Fixed: 2750690 Change-Id: I42ff0765c1eb21d430d903cda55dfb91ff052376 --- bindings/msm-cam-vfe.txt | 6 ++++++ lahaina-camera.dtsi | 5 +++++ shima-camera.dtsi | 5 +++++ 3 files changed, 16 insertions(+) diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index 89866769ce09..85dc19873b16 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -115,6 +115,11 @@ Optional properties: Definition: Scalable clock names to identify which clocks needs to update along with source clock. +- cam_hw_pid: + Usage: optional + Value type: + Definition: HW unique Pid values + Example: qcom,vfe0@acaf000 { cell-index = <0>; @@ -152,5 +157,6 @@ Example: scl-clk-en; scl-clk-names = "ife_axi_clk"; qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>; + cam_hw_pid = < 28 4 16 8 >; status = "ok"; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index b729a7315cb2..f785451cdeb7 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1380,6 +1380,7 @@ clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; clock-rates-option = <720000000>; ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = < 28 4 16 8 >; status = "ok"; }; @@ -1466,6 +1467,7 @@ clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; clock-rates-option = <720000000>; ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = < 29 5 17 9 >; status = "ok"; }; @@ -1549,6 +1551,7 @@ scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = < 23 6 20 10>; status = "ok"; }; @@ -1621,6 +1624,7 @@ "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = < 7 >; status = "ok"; }; @@ -1693,6 +1697,7 @@ "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = < 21 >; status = "ok"; }; diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 4ea2ad3b1865..31d514e14fdd 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -756,6 +756,7 @@ clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; clock-rates-option = <720000000>; ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = < 28 4 16 8 >; status = "ok"; }; @@ -842,6 +843,7 @@ clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; clock-rates-option = <720000000>; ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = < 29 5 17 9 >; status = "ok"; }; @@ -925,6 +927,7 @@ scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = < 23 6 18 10>; status = "ok"; }; @@ -997,6 +1000,7 @@ "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = < 20 >; status = "ok"; }; @@ -1069,6 +1073,7 @@ "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = < 19 >; status = "ok"; }; From 2a85f4729dc338adda00e053085e76f404ee7ca8 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Thu, 25 Jun 2020 16:03:57 -0700 Subject: [PATCH 088/190] ARM: dts: msm: Correct regulator voting for Lahaina platforms CSIPHY hardware needs to vote for CSI regulators, for correct ref count. This change add appropriate regualtors for CSIPHY hardwares. CRs-Fixed: 2729624 Change-Id: I6c71a93ac27c0c4898c5a52e33ccca6a555fe6ef --- lahaina-camera.dtsi | 66 ++++++++++++++++++++++++++++----------------- 1 file changed, 42 insertions(+), 24 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index eb80415a1ed9..a4fefedf7e6b 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -20,10 +20,13 @@ interrupts = ; interrupt-names = "csiphy0"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY0_CLK>, <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, @@ -48,10 +51,13 @@ interrupts = ; interrupt-names = "csiphy1"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY1_CLK>, <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, @@ -77,10 +83,13 @@ interrupts = ; interrupt-names = "csiphy2"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY2_CLK>, <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, @@ -105,10 +114,13 @@ interrupts = ; interrupt-names = "csiphy3"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY3_CLK>, <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, @@ -133,10 +145,13 @@ interrupts = ; interrupt-names = "csiphy4"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY4_CLK>, <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, @@ -161,10 +176,13 @@ interrupts = ; interrupt-names = "csiphy5"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - refgen-supply = <&refgen>; - regulator-names = "gdscr", "refgen"; - csi-vdd-voltage = <1200000>; - mipi-csi-vdd-supply = <&pm8350_l6>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1208000 888000>; + rgltr-load-current = <0 54000 96400>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY5_CLK>, <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, From 140b00a8f3aa79770b90f8d5d53c6e4b93966cd6 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 6 Aug 2020 16:28:41 +0530 Subject: [PATCH 089/190] ARM: dts: msm: Add nominal clock cntl level for CSIPHY for holi Add support for nominal clock cntl level for CSIPHY to camera devicetree for holi camera. CRs-Fixed: 2733427 Change-Id: I59b28dbb75f5b7bb0e6e7b693ccec4b010ebe9df --- holi-camera.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 1f8087a35ae2..3c21e0621efb 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -32,7 +32,7 @@ "csi0phytimer_clk_src", "csi0phytimer_clk"; src-clock-name = "csi0phytimer_clk_src"; - clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; clock-rates = <240000000 0 200000000 0>, <341330000 0 200000000 0>, @@ -67,7 +67,7 @@ "csi1phytimer_clk_src", "csi1phytimer_clk"; src-clock-name = "csi1phytimer_clk_src"; - clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; clock-rates = <240000000 0 200000000 0>, <341330000 0 200000000 0>, @@ -102,7 +102,7 @@ "csi2phytimer_clk_src", "csi2phytimer_clk"; src-clock-name = "csi2phytimer_clk_src"; - clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; clock-rates = <240000000 0 200000000 0>, <341330000 0 200000000 0>, @@ -137,7 +137,7 @@ "csi3phytimer_clk_src", "csi3phytimer_clk"; src-clock-name = "csi3phytimer_clk_src"; - clock-cntl-level = "svs", "svs_l1", "nom", "turbo"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; clock-rates = <240000000 0 133330000 0>, <341330000 0 200000000 0>, From d8ed1c7841c734bb89cc1f5c445186d5e5ebfde6 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Wed, 12 Aug 2020 20:15:08 +0530 Subject: [PATCH 090/190] ARM: dts: msm: Add fix for regulator voltage for holi camera -Regulator framework for pm8008 accepts only the voltages to be in multiple of 8mv , So this change rounds of the vdig supply in s5k3p9 and imx476 to 1.056 instead of 1.05 -Fixed typo in camera-device tree file. CRs-Fixed: 2733427 Change-Id: If801b781d08f4ab2bbfa4d866585c2ef99d2c2ac --- holi-camera-sensor-cdp.dtsi | 56 ++++++++++++++++++------------------- holi-camera-sensor-mtp.dtsi | 56 ++++++++++++++++++------------------- holi-camera-sensor-qrd.dtsi | 56 ++++++++++++++++++------------------- holi-camera.dtsi | 4 +-- 4 files changed, 86 insertions(+), 86 deletions(-) diff --git a/holi-camera-sensor-cdp.dtsi b/holi-camera-sensor-cdp.dtsi index 231d8e2c054f..9b77eeab3b35 100644 --- a/holi-camera-sensor-cdp.dtsi +++ b/holi-camera-sensor-cdp.dtsi @@ -18,8 +18,8 @@ status = "ok"; }; - led_flash_rear_aux2: qcom,camera-flash@2 { - cell-index = <2>; + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; compatible = "qcom,camera-flash"; flash-source = <&pm6150l_flash0 &pm6150l_flash1>; torch-source = <&pm6150l_torch0 &pm6150l_torch1>; @@ -59,8 +59,8 @@ "cam_clk", "cam_vaf"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; - rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -84,8 +84,8 @@ clock-rates = <19200000>; }; - eeprom_rear_aux: qcom,eeprom1 { - cell-index = <1>; + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; compatible = "qcom,eeprom"; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -139,8 +139,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <120000 80000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -164,16 +164,16 @@ clock-rates = <19200000>; }; - /*Rear Aux*/ - qcom,cam-sensor1 { - cell-index = <1>; + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <1>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear_aux>; - eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; cam_vdig-supply = <&L1P>; @@ -209,10 +209,10 @@ }; &cam_cci1 { - actuator_rear_aux2: qcom,actuator3 { - cell-index = <3>; + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; compatible = "qcom,actuator"; - cci-device = <1>; + cci-master= <0>; cam_vaf-supply = <&L5P>; regulator-names = "cam_vaf"; rgltr-cntrl-support; @@ -233,8 +233,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -258,8 +258,8 @@ clock-rates = <24000000>; }; - eeprom_rear_aux2: qcom,eeprom3 { - cell-index = <3>; + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; compatible = "qcom,eeprom"; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; @@ -312,8 +312,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -337,17 +337,17 @@ clock-rates = <24000000>; }; - /*Rear Aux2*/ - qcom,cam-sensor3 { - cell-index = <3>; + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear_aux2>; - actuator-src = <&actuator_rear_aux2>; - eeprom-src = <&eeprom_rear_aux2>; + led-flash-src = <&led_flash_rear_aux>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; cam_vdig-supply = <&L1P>; diff --git a/holi-camera-sensor-mtp.dtsi b/holi-camera-sensor-mtp.dtsi index 231d8e2c054f..9b77eeab3b35 100644 --- a/holi-camera-sensor-mtp.dtsi +++ b/holi-camera-sensor-mtp.dtsi @@ -18,8 +18,8 @@ status = "ok"; }; - led_flash_rear_aux2: qcom,camera-flash@2 { - cell-index = <2>; + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; compatible = "qcom,camera-flash"; flash-source = <&pm6150l_flash0 &pm6150l_flash1>; torch-source = <&pm6150l_torch0 &pm6150l_torch1>; @@ -59,8 +59,8 @@ "cam_clk", "cam_vaf"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; - rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -84,8 +84,8 @@ clock-rates = <19200000>; }; - eeprom_rear_aux: qcom,eeprom1 { - cell-index = <1>; + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; compatible = "qcom,eeprom"; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -139,8 +139,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <120000 80000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -164,16 +164,16 @@ clock-rates = <19200000>; }; - /*Rear Aux*/ - qcom,cam-sensor1 { - cell-index = <1>; + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <1>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear_aux>; - eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; cam_vdig-supply = <&L1P>; @@ -209,10 +209,10 @@ }; &cam_cci1 { - actuator_rear_aux2: qcom,actuator3 { - cell-index = <3>; + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; compatible = "qcom,actuator"; - cci-device = <1>; + cci-master= <0>; cam_vaf-supply = <&L5P>; regulator-names = "cam_vaf"; rgltr-cntrl-support; @@ -233,8 +233,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -258,8 +258,8 @@ clock-rates = <24000000>; }; - eeprom_rear_aux2: qcom,eeprom3 { - cell-index = <3>; + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; compatible = "qcom,eeprom"; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; @@ -312,8 +312,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -337,17 +337,17 @@ clock-rates = <24000000>; }; - /*Rear Aux2*/ - qcom,cam-sensor3 { - cell-index = <3>; + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear_aux2>; - actuator-src = <&actuator_rear_aux2>; - eeprom-src = <&eeprom_rear_aux2>; + led-flash-src = <&led_flash_rear_aux>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; cam_vdig-supply = <&L1P>; diff --git a/holi-camera-sensor-qrd.dtsi b/holi-camera-sensor-qrd.dtsi index 231d8e2c054f..f0214071d8bf 100644 --- a/holi-camera-sensor-qrd.dtsi +++ b/holi-camera-sensor-qrd.dtsi @@ -18,8 +18,8 @@ status = "ok"; }; - led_flash_rear_aux2: qcom,camera-flash@2 { - cell-index = <2>; + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; compatible = "qcom,camera-flash"; flash-source = <&pm6150l_flash0 &pm6150l_flash1>; torch-source = <&pm6150l_torch0 &pm6150l_torch1>; @@ -59,8 +59,8 @@ "cam_clk", "cam_vaf"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>; - rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -84,8 +84,8 @@ clock-rates = <19200000>; }; - eeprom_rear_aux: qcom,eeprom1 { - cell-index = <1>; + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; compatible = "qcom,eeprom"; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -139,8 +139,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <120000 80000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -164,16 +164,16 @@ clock-rates = <19200000>; }; - /*Rear Aux*/ - qcom,cam-sensor1 { - cell-index = <1>; + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <1>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear_aux>; - eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux2>; + eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; cam_vdig-supply = <&L1P>; @@ -209,10 +209,10 @@ }; &cam_cci1 { - actuator_rear_aux2: qcom,actuator3 { - cell-index = <3>; + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; compatible = "qcom,actuator"; - cci-device = <1>; + cci-master = <0>; cam_vaf-supply = <&L5P>; regulator-names = "cam_vaf"; rgltr-cntrl-support; @@ -233,8 +233,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -258,8 +258,8 @@ clock-rates = <24000000>; }; - eeprom_rear_aux2: qcom,eeprom3 { - cell-index = <3>; + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; compatible = "qcom,eeprom"; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; @@ -312,8 +312,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1050000 0>; - rgltr-max-voltage = <1800000 2800000 1050000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; rgltr-load-current = <0 80000 105000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -337,17 +337,17 @@ clock-rates = <24000000>; }; - /*Rear Aux2*/ - qcom,cam-sensor3 { - cell-index = <3>; + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <2>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear_aux2>; - actuator-src = <&actuator_rear_aux2>; - eeprom-src = <&eeprom_rear_aux2>; + led-flash-src = <&led_flash_rear_aux>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; cam_vdig-supply = <&L1P>; diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 3c21e0621efb..2d8b77658ebc 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -148,7 +148,7 @@ cam_cci0: qcom,cci0 { cell-index = <0>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; reg = <0x05C1B000 0x1000>; reg-names = "cci"; reg-cam-base = <0x1B000>; @@ -241,7 +241,7 @@ cam_cci1: qcom,cci1 { cell-index = <1>; - compatible = "qcom,cci"; + compatible = "qcom,cci", "simple-bus"; reg = <0x05C1C000 0x1000>; reg-names = "cci"; reg-cam-base = <0x1C000>; From 99d55a1b6370de5f5c884a034d9016cab9aa6a1c Mon Sep 17 00:00:00 2001 From: Tony Lijo Jose Date: Sat, 15 Aug 2020 19:01:47 +0530 Subject: [PATCH 091/190] ARM: dts: msm: Update the phy timer clock for phy 3 in holi The phytimer clock is updated as per clock driver update in holi target. CRs-Fixed: 2733427 Change-Id: I8a1bd5c3c04e3ef1c6866224101a2ad0e38fc535 --- holi-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 3c21e0621efb..097d61d7e45c 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -139,7 +139,7 @@ src-clock-name = "csi3phytimer_clk_src"; clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; clock-rates = - <240000000 0 133330000 0>, + <240000000 0 200000000 0>, <341330000 0 200000000 0>, <341330000 0 268800000 0>, <384000000 0 268800000 0>; From 458102c5a5ff1bdb5a8dc82bc25747707fe2c8f3 Mon Sep 17 00:00:00 2001 From: Divya Sharma Date: Wed, 19 Aug 2020 13:41:01 -0700 Subject: [PATCH 092/190] Revert "ARM: dts: msm: Correct regulator voting for Lahaina platforms" This reverts commit 2a85f4729dc338adda00e053085e76f404ee7ca8. Change-Id: Ieb62bf0adc74b7b1a7177baed9c0c18c069d8d4b --- lahaina-camera.dtsi | 66 +++++++++++++++++---------------------------- 1 file changed, 24 insertions(+), 42 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 3891e4bdd2f7..116baed82f17 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -20,13 +20,10 @@ interrupts = ; interrupt-names = "csiphy0"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - csi-vdd-1p2-supply = <&pm8350_l6>; - csi-vdd-0p9-supply = <&pm8350_l5>; - rgltr-cntrl-support; - regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; - rgltr-min-voltage = <0 1200000 880000>; - rgltr-max-voltage = <0 1208000 888000>; - rgltr-load-current = <0 54000 96400>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY0_CLK>, <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, @@ -51,13 +48,10 @@ interrupts = ; interrupt-names = "csiphy1"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - csi-vdd-1p2-supply = <&pm8350_l6>; - csi-vdd-0p9-supply = <&pm8350_l5>; - rgltr-cntrl-support; - regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; - rgltr-min-voltage = <0 1200000 880000>; - rgltr-max-voltage = <0 1208000 888000>; - rgltr-load-current = <0 54000 96400>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY1_CLK>, <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, @@ -83,13 +77,10 @@ interrupts = ; interrupt-names = "csiphy2"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - csi-vdd-1p2-supply = <&pm8350_l6>; - csi-vdd-0p9-supply = <&pm8350_l5>; - rgltr-cntrl-support; - regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; - rgltr-min-voltage = <0 1200000 880000>; - rgltr-max-voltage = <0 1208000 888000>; - rgltr-load-current = <0 54000 96400>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY2_CLK>, <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, @@ -114,13 +105,10 @@ interrupts = ; interrupt-names = "csiphy3"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - csi-vdd-1p2-supply = <&pm8350_l6>; - csi-vdd-0p9-supply = <&pm8350_l5>; - rgltr-cntrl-support; - regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; - rgltr-min-voltage = <0 1200000 880000>; - rgltr-max-voltage = <0 1208000 888000>; - rgltr-load-current = <0 54000 96400>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY3_CLK>, <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, @@ -145,13 +133,10 @@ interrupts = ; interrupt-names = "csiphy4"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - csi-vdd-1p2-supply = <&pm8350_l6>; - csi-vdd-0p9-supply = <&pm8350_l5>; - rgltr-cntrl-support; - regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; - rgltr-min-voltage = <0 1200000 880000>; - rgltr-max-voltage = <0 1208000 888000>; - rgltr-load-current = <0 54000 96400>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY4_CLK>, <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, @@ -176,13 +161,10 @@ interrupts = ; interrupt-names = "csiphy5"; gdscr-supply = <&cam_cc_titan_top_gdsc>; - csi-vdd-1p2-supply = <&pm8350_l6>; - csi-vdd-0p9-supply = <&pm8350_l5>; - rgltr-cntrl-support; - regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; - rgltr-min-voltage = <0 1200000 880000>; - rgltr-max-voltage = <0 1208000 888000>; - rgltr-load-current = <0 54000 96400>; + refgen-supply = <&refgen>; + regulator-names = "gdscr", "refgen"; + csi-vdd-voltage = <1200000>; + mipi-csi-vdd-supply = <&pm8350_l6>; clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_CSIPHY5_CLK>, <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, From 53e56a12b5e6ff9385c2011c73eda296ba867647 Mon Sep 17 00:00:00 2001 From: Divya Sharma Date: Wed, 19 Aug 2020 13:41:16 -0700 Subject: [PATCH 093/190] Revert "ARM: dts: msm: Correct SVS clock level for IPE0 in Lahaina DT" This reverts commit 317c0c2bdabe38ec18d4d8fccb115c764ee91db1. Change-Id: I216f8bdf4c09962809a75b41e4b6fd318f1d4105 --- lahaina-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 116baed82f17..eb80415a1ed9 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1808,7 +1808,7 @@ clock-rates = <0 0 0 300000000 0>, - <0 0 0 450000000 0>, + <0 0 0 475000000 0>, <0 0 0 525000000 0>, <0 0 0 700000000 0>, <0 0 0 700000000 0>; From f4576af063ae4b8d229193852c037ecfa1b55971 Mon Sep 17 00:00:00 2001 From: Pavan Kumar Chilamkurthi Date: Wed, 19 Aug 2020 02:12:02 -0700 Subject: [PATCH 094/190] ARM: dts: msm: Add fast_ahb clock control through cpas for lahaina Control camcc fast_ahb clock rate through cpas driver. This helps in consolidating the ahb requests from each client and then vote max of all current requests. This change helps in avoiding each client controlling correspnding branch clk frequency on their own and thus changing the frequency without knowing other client's requirements. CRs-Fixed: 2759585 Change-Id: Ib22df29df36a0309a1e9fb58286162bcede2046c --- lahaina-camera.dtsi | 93 ++++++++++++++++++++++----------------------- 1 file changed, 46 insertions(+), 47 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index b729a7315cb2..ccc986917076 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -560,7 +560,8 @@ "cpas_ahb_clk", "cpas_core_ahb_clk", "camnoc_axi_clk_src", - "camnoc_axi_clk"; + "camnoc_axi_clk", + "cpas_fast_ahb_clk_src"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, <&clock_gcc GCC_CAMERA_HF_AXI_CLK>, @@ -569,16 +570,17 @@ <&clock_camcc CAM_CC_CPAS_AHB_CLK>, <&clock_camcc CAM_CC_CORE_AHB_CLK>, <&clock_camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, - <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>; src-clock-name = "camnoc_axi_clk_src"; clock-rates = - <0 0 0 0 0 0 0 0>, - <0 0 0 80000000 0 0 300000000 0>, - <0 0 0 80000000 0 0 400000000 0>, - <0 0 0 80000000 0 0 400000000 0>, - <0 0 0 80000000 0 0 400000000 0>, - <0 0 0 80000000 0 0 400000000 0>, - <0 0 0 80000000 0 0 480000000 0>; + <0 0 0 0 0 0 0 0 0>, + <0 0 0 80000000 0 0 300000000 0 100000000>, + <0 0 0 80000000 0 0 400000000 0 200000000>, + <0 0 0 80000000 0 0 400000000 0 300000000>, + <0 0 0 80000000 0 0 400000000 0 400000000>, + <0 0 0 80000000 0 0 400000000 0 400000000>, + <0 0 0 80000000 0 0 480000000 0 400000000>; clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", "nominal", "nominal_l1", "turbo"; control-camnoc-axi-clk; @@ -1329,11 +1331,11 @@ <&clock_camcc CAM_CC_IFE_0_AHB_CLK>, <&clock_camcc CAM_CC_IFE_0_AXI_CLK>; clock-rates = - <400000000 0 400000000 0 338000000 0 100000000 0 0>, - <400000000 0 400000000 0 475000000 0 200000000 0 0>, - <400000000 0 400000000 0 600000000 0 300000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>; + <400000000 0 400000000 0 338000000 0 0 0 0>, + <400000000 0 400000000 0 475000000 0 0 0 0>, + <400000000 0 400000000 0 600000000 0 0 0 0>, + <400000000 0 400000000 0 720000000 0 0 0 0>, + <400000000 0 400000000 0 720000000 0 0 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_csid_clk_src"; @@ -1366,15 +1368,14 @@ <&clock_camcc CAM_CC_IFE_0_CLK>, <&clock_camcc CAM_CC_IFE_0_AXI_CLK>; clock-rates = - <0 100000000 338000000 0 0>, - <0 200000000 475000000 0 0>, - <0 300000000 600000000 0 0>, - <0 400000000 720000000 0 0>, - <0 400000000 720000000 0 0>; + <0 0 338000000 0 0>, + <0 0 475000000 0 0>, + <0 0 600000000 0 0>, + <0 0 720000000 0 0>, + <0 0 720000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_clk_src"; - scl-clk-names = "ife_0_areg"; clock-control-debugfs = "true"; clock-names-option = "ife_dsp_clk"; clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; @@ -1415,11 +1416,11 @@ <&clock_camcc CAM_CC_IFE_1_AHB_CLK>, <&clock_camcc CAM_CC_IFE_1_AXI_CLK>; clock-rates = - <400000000 0 400000000 0 338000000 0 100000000 0 0>, - <400000000 0 400000000 0 475000000 0 200000000 0 0>, - <400000000 0 400000000 0 600000000 0 300000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>; + <400000000 0 400000000 0 338000000 0 0 0 0>, + <400000000 0 400000000 0 475000000 0 0 0 0>, + <400000000 0 400000000 0 600000000 0 0 0 0>, + <400000000 0 400000000 0 720000000 0 0 0 0>, + <400000000 0 400000000 0 720000000 0 0 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_csid_clk_src"; @@ -1452,15 +1453,14 @@ <&clock_camcc CAM_CC_IFE_1_CLK>, <&clock_camcc CAM_CC_IFE_1_AXI_CLK>; clock-rates = - <0 100000000 338000000 0 0>, - <0 200000000 475000000 0 0>, - <0 300000000 600000000 0 0>, - <0 400000000 720000000 0 0>, - <0 400000000 720000000 0 0>; + <0 0 338000000 0 0>, + <0 0 475000000 0 0>, + <0 0 600000000 0 0>, + <0 0 720000000 0 0>, + <0 0 720000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_clk_src"; - scl-clk-names = "ife_1_areg"; clock-control-debugfs = "true"; clock-names-option = "ife_dsp_clk"; clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; @@ -1501,11 +1501,11 @@ <&clock_camcc CAM_CC_IFE_2_AHB_CLK>, <&clock_camcc CAM_CC_IFE_2_AXI_CLK>; clock-rates = - <400000000 0 400000000 0 338000000 0 100000000 0 0>, - <400000000 0 400000000 0 475000000 0 200000000 0 0>, - <400000000 0 400000000 0 600000000 0 300000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>; + <400000000 0 400000000 0 338000000 0 0 0 0>, + <400000000 0 400000000 0 475000000 0 0 0 0>, + <400000000 0 400000000 0 600000000 0 0 0 0>, + <400000000 0 400000000 0 720000000 0 0 0 0>, + <400000000 0 400000000 0 720000000 0 0 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_csid_clk_src"; @@ -1538,15 +1538,14 @@ <&clock_camcc CAM_CC_IFE_2_CLK>, <&clock_camcc CAM_CC_IFE_2_AXI_CLK>; clock-rates = - <0 100000000 338000000 0 0>, - <0 200000000 475000000 0 0>, - <0 300000000 600000000 0 0>, - <0 400000000 720000000 0 0>, - <0 400000000 720000000 0 0>; + <0 0 338000000 0 0>, + <0 0 475000000 0 0>, + <0 0 600000000 0 0>, + <0 0 720000000 0 0>, + <0 0 720000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_clk_src"; - scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; ubwc-static-cfg = <0x1026 0x1036>; status = "ok"; @@ -1786,11 +1785,11 @@ <&clock_camcc CAM_CC_ICP_CLK>; clock-rates = - <100000000 0 400000000 0>, - <200000000 0 480000000 0>, - <300000000 0 600000000 0>, - <400000000 0 600000000 0>, - <400000000 0 600000000 0>; + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 600000000 0>, + <0 0 600000000 0>, + <0 0 600000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; From dd30cb7318f6de5fa521cbbe14bf24806bd1936f Mon Sep 17 00:00:00 2001 From: Gaurav Jindal Date: Thu, 20 Aug 2020 16:03:09 +0530 Subject: [PATCH 095/190] dt-bindings: camera: Add compatible string for Waipio CSID680 Add bindings for CSID680 for Waipio. Change-Id: I8a16e3edc41fc88da6ab07683ffe45a360a4c8e3 CRs-Fixed: 2759805 --- bindings/msm-cam-ife-csid.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index 7835bbfee272..5da5a5ad57d0 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -17,9 +17,10 @@ First Level Node - CAM IFE CSID device Value type: Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", "qcom,csid175_200", - "qcom,csid480", "qcom,csid580", "qcom,csid-lite170", "qcom,csid-lite175", - "qcom,csid-lite480" or "qcom,csid-custom480", - "qcom,csid-lite580" or "qcom,csid-custom580". + "qcom,csid480", "qcom,csid580", "qcom,csid680", "qcom,csid-lite170", + "qcom,csid-lite175", "qcom,csid-lite480" or "qcom,csid-custom480", + "qcom,csid-lite580" or "qcom,csid-custom580", + "qcom,csid-lite680". - cell-index Usage: required From a1604d34cce6401f9635b25c19ffcd849cc6e24c Mon Sep 17 00:00:00 2001 From: Pavan Kumar Chilamkurthi Date: Fri, 14 Aug 2020 03:22:33 -0700 Subject: [PATCH 096/190] ARM: dts: msm: Add rpmh bcm register map for lahaina Add rpmh bcm register space mapping to help read bcm status registers whenever IFE overflow happens. This helps in getting ddr, mnoc clock frequencies along with other camcc clock frequencies to understand the overflow scenario. CRs-Fixed: 2754299 Change-Id: I9b066684fc3083168f90e2883cf2e90db589828e --- lahaina-camera.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index b729a7315cb2..3feb192aed45 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -543,10 +543,11 @@ label = "cpas"; arch-compat = "cpas_top"; status = "ok"; - reg-names = "cam_cpas_top", "cam_camnoc"; + reg-names = "cam_cpas_top", "cam_camnoc", "cam_rpmh"; reg = <0xac40000 0x1000>, - <0xac42000 0x8000>; - reg-cam-base = <0x40000 0x42000>; + <0xac42000 0x8000>, + <0xbbf0000 0x1F00>; + reg-cam-base = <0x40000 0x42000 0x0BBF0000>; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; @@ -587,6 +588,7 @@ interconnect-names = "cam_ahb"; interconnects =<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_CAMERA_CFG>; + rpmh-bcm-info = <12 0x4 0x800 0 4>; cam-ahb-num-cases = <8>; cam-ahb-bw-KBps = <0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>, @@ -786,7 +788,7 @@ level-index = <0>; ife2_ubwc_stats_wr: ife2-ubwc-stats-wr { cell-index = <17>; - node-name = "ife0-ubwc-stats-wr"; + node-name = "ife2-ubwc-stats-wr"; client-name = "ife2"; traffic-data = ; From e1682de8730640a38ffb193840f6e256688c8e31 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Mon, 17 Aug 2020 14:08:38 +0530 Subject: [PATCH 097/190] ARM: dts: msm: Add support to discard a region in dma space Add support to discard a specified address space region inside the full dma map region for shima target. CRs-Fixed: 2732941 Change-Id: I7ec78c2842b16396cfe1632e7b09d7cdd84bd8bb --- shima-camera.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 4ea2ad3b1865..cff7270257fd 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -461,7 +461,8 @@ <&apps_smmu 0x2820 0x400>, <&apps_smmu 0x2C20 0x400>; label = "icp"; - qcom,iommu-dma-addr-pool = <0x10c00000 0xcf300000>; + qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -491,10 +492,11 @@ }; iova-mem-region-io { - /* IO region is approximately 3.3 GB */ + /* IO region is approximately 3.7 GB */ iova-region-name = "io"; iova-region-start = <0x10c00000>; - iova-region-len = <0xcf300000>; + iova-region-len = <0xee300000>; + iova-region-discard = <0xdff00000 0x300000>; iova-region-id = <0x3>; status = "ok"; }; From 61ca940eebd854e8160f8181ef0b1f59b58d59cd Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Fri, 21 Aug 2020 04:01:14 +0530 Subject: [PATCH 098/190] ARM: dts: msm: Add dualife as a client of CPAS-CDM for Shima Add dualife in the CPAS-CDM client list to use the CPAS-CDM for dual IFE usecase. Add csiphy and cci clients to cpas for shima. CRs-Fixed: 2732941 Change-Id: I2e236b465e8fb9d5624db3950f1b1b5ad5a373ff --- shima-camera.dtsi | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index cff7270257fd..131e4f9dbb7c 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -21,8 +21,8 @@ interrupt-names = "csiphy0"; gdscr-supply = <&cam_cc_titan_top_gdsc>; refgen-supply = <&refgen>; - csi-vdd-1p2-supply = <&L10C>; - csi-vdd-0p9-supply = <&L6B>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; regulator-names = "gdscr", "refgen", "csi-vdd-1p2", "csi-vdd-0p9"; rgltr-cntrl-support; @@ -55,8 +55,8 @@ interrupt-names = "csiphy1"; gdscr-supply = <&cam_cc_titan_top_gdsc>; refgen-supply = <&refgen>; - csi-vdd-1p2-supply = <&L10C>; - csi-vdd-0p9-supply = <&L6B>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; regulator-names = "gdscr", "refgen", "csi-vdd-1p2", "csi-vdd-0p9"; rgltr-cntrl-support; @@ -89,8 +89,8 @@ interrupt-names = "csiphy2"; gdscr-supply = <&cam_cc_titan_top_gdsc>; refgen-supply = <&refgen>; - csi-vdd-1p2-supply = <&L10C>; - csi-vdd-0p9-supply = <&L6B>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; regulator-names = "gdscr", "refgen", "csi-vdd-1p2", "csi-vdd-0p9"; rgltr-cntrl-support; @@ -123,8 +123,8 @@ interrupt-names = "csiphy3"; gdscr-supply = <&cam_cc_titan_top_gdsc>; refgen-supply = <&refgen>; - csi-vdd-1p2-supply = <&L10C>; - csi-vdd-0p9-supply = <&L6B>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; regulator-names = "gdscr", "refgen", "csi-vdd-1p2", "csi-vdd-0p9"; rgltr-cntrl-support; @@ -157,8 +157,8 @@ interrupt-names = "csiphy4"; gdscr-supply = <&cam_cc_titan_top_gdsc>; refgen-supply = <&refgen>; - csi-vdd-1p2-supply = <&L10C>; - csi-vdd-0p9-supply = <&L6B>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; regulator-names = "gdscr", "refgen", "csi-vdd-1p2", "csi-vdd-0p9"; rgltr-cntrl-support; @@ -191,8 +191,8 @@ interrupt-names = "csiphy5"; gdscr-supply = <&cam_cc_titan_top_gdsc>; refgen-supply = <&refgen>; - csi-vdd-1p2-supply = <&L10C>; - csi-vdd-0p9-supply = <&L6B>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; regulator-names = "gdscr", "refgen", "csi-vdd-1p2", "csi-vdd-0p9"; rgltr-cntrl-support; @@ -566,7 +566,7 @@ <&camcc CAM_CC_CPAS_AHB_CLK>; clock-rates = <0 0>; clock-cntl-level = "svs"; - cdm-client-names = "ife3", "ife4"; + cdm-client-names = "ife3", "ife4", "dualife"; status = "ok"; }; @@ -1371,6 +1371,8 @@ "turbo", "turbo"; client-id-based; client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "csiphy5", "cci0", "cci1", "csid0", "csid1", "csid2", "csid3", "csid4", "ife0", "ife1", "ife2", "ife3", "ife4", "ipe0", "cam-cdm-intf0","ife-cdm0", "ife-cdm1", From 4699bc7497d9e5ea7f18b37ee1e760d24c152922 Mon Sep 17 00:00:00 2001 From: Anand Ravi Date: Thu, 16 Jul 2020 14:03:48 -0700 Subject: [PATCH 099/190] ARM: dts: msm: Fixes label_is_string warning Property 'label' is a reserved property of type string. Present device trees use the property as list of strings. Rename the property to 'cam-smmu-label' to resolve conflict. CRs-Fixed: 2729703 Change-Id: Iabfe66482014097b46d136cdde622cd1d246b446 --- bengal-camera.dtsi | 8 ++++---- holi-camera.dtsi | 8 ++++---- kona-camera.dtsi | 12 ++++++------ lagoon-camera.dtsi | 12 ++++++------ lahaina-camera.dtsi | 10 +++++----- lito-camera.dtsi | 14 +++++++------- scuba-camera.dtsi | 8 ++++---- shima-camera.dtsi | 10 +++++----- 8 files changed, 41 insertions(+), 41 deletions(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index d8e1210f4335..0c55ca288a4a 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -208,7 +208,7 @@ iommus = <&apps_smmu 0x400 0x000>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "tfe"; + cam-smmu-label = "tfe"; tfe_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -228,7 +228,7 @@ qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ope", "ope-cdm"; + cam-smmu-label = "ope", "ope-cdm"; ope_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -244,7 +244,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x800 0x000>; - label = "cpas-cdm"; + cam-smmu-label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { @@ -261,7 +261,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 57af50ffe175..8569e9253584 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -346,7 +346,7 @@ iommus = <&apps_smmu 0x800 0x000>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "tfe"; + cam-smmu-label = "tfe"; tfe_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -366,7 +366,7 @@ qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ope", "ope-cdm"; + cam-smmu-label = "ope", "ope-cdm0"; ope_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -382,7 +382,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xc00 0x000>; - label = "cpas-cdm"; + cam-smmu-label = "cpas-cdm0"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { @@ -399,7 +399,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; diff --git a/kona-camera.dtsi b/kona-camera.dtsi index db430c6a3532..e0b496a0d8cd 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -377,7 +377,7 @@ <&apps_smmu 0xC00 0x400>, <&apps_smmu 0xC40 0x400>; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; - label = "ife", "ife-cdm"; + cam-smmu-label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 4.0 GB */ @@ -397,7 +397,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x2040 0x400>, <&apps_smmu 0x2440 0x400>; - label = "jpeg"; + cam-smmu-label = "jpeg"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 4.0 GB */ @@ -435,7 +435,7 @@ <&apps_smmu 0x2021 0x400>, <&apps_smmu 0x2420 0x400>, <&apps_smmu 0x2421 0x400>; - label = "icp"; + cam-smmu-label = "icp"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { @@ -492,7 +492,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; - label = "cpas-cdm"; + cam-smmu-label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { @@ -510,7 +510,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; @@ -519,7 +519,7 @@ iommus = <&apps_smmu 0x2080 0x400>, <&apps_smmu 0x2480 0x400>; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; - label = "fd"; + cam-smmu-label = "fd"; fd_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 4.0 GB */ diff --git a/lagoon-camera.dtsi b/lagoon-camera.dtsi index e59eb916a660..b857cb42b16d 100644 --- a/lagoon-camera.dtsi +++ b/lagoon-camera.dtsi @@ -341,7 +341,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xD40 0x20>, <&apps_smmu 0xD60 0x20>; - label = "lrme"; + cam-smmu-label = "lrme"; lrme_iova_mem_map: iova-mem-map { iova-mem-region-shared { /* Shared region is 100MB long */ @@ -368,7 +368,7 @@ <&apps_smmu 0x840 0x0>, <&apps_smmu 0x860 0xc0>, <&apps_smmu 0x880 0x0>; - label = "ife"; + cam-smmu-label = "ife"; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -385,7 +385,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xD00 0x20>, <&apps_smmu 0xD20 0x20>; - label = "jpeg"; + cam-smmu-label = "jpeg"; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -409,7 +409,7 @@ iommus = <&apps_smmu 0xCA2 0x0>, <&apps_smmu 0xCC0 0x20>, <&apps_smmu 0xCE0 0x20>; - label = "icp"; + cam-smmu-label = "icp"; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -463,7 +463,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xC80 0x0>; - label = "cpas-cdm0"; + cam-smmu-label = "cpas-cdm0"; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 3.4 GB */ @@ -478,7 +478,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 1af0b26388b5..a454ad8cbf24 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -396,7 +396,7 @@ <&apps_smmu 0xC40 0x440>; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; - label = "ife", "ife-cdm"; + cam-smmu-label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 4.0 GB */ @@ -416,7 +416,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x2040 0x400>, <&apps_smmu 0x2440 0x400>; - label = "jpeg"; + cam-smmu-label = "jpeg"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { @@ -455,7 +455,7 @@ <&apps_smmu 0x2021 0xc60>, <&apps_smmu 0x2420 0x400>, <&apps_smmu 0x2421 0xc60>; - label = "icp"; + cam-smmu-label = "icp"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; iova-region-discard = <0xdff00000 0x300000>; dma-coherent-hint-cached; @@ -513,7 +513,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x20C0 0x400>, <&apps_smmu 0x24C0 0x400>; - label = "cpas-cdm"; + cam-smmu-label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { @@ -532,7 +532,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; }; diff --git a/lito-camera.dtsi b/lito-camera.dtsi index ef5f0fba9839..5d3771df46b7 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -335,7 +335,7 @@ <&apps_smmu 0xCC0 0x5E0>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ife"; + cam-smmu-label = "ife"; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -352,7 +352,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x1280 0x20>, <&apps_smmu 0x12A0 0x20>; - label = "jpeg"; + cam-smmu-label = "jpeg"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; jpeg_iova_mem_map: iova-mem-map { @@ -384,7 +384,7 @@ <&apps_smmu 0x1200 0x0>, <&apps_smmu 0x11E0 0x0>, <&apps_smmu 0x1260 0x0>; - label = "icp"; + cam-smmu-label = "icp"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; iova-region-discard = <0xdff00000 0x300000>; @@ -441,7 +441,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x1000 0x0>; - label = "cpas-cdm0"; + cam-smmu-label = "cpas-cdm0"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { @@ -458,7 +458,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; @@ -468,7 +468,7 @@ <&apps_smmu 0x12E0 0x20>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "fd"; + cam-smmu-label = "fd"; fd_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 3.4 GB */ @@ -485,7 +485,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x11C0 0x0>, <&apps_smmu 0x1240 0x0>; - label = "lrme"; + cam-smmu-label = "lrme"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; lrme_iova_mem_map: iova-mem-map { diff --git a/scuba-camera.dtsi b/scuba-camera.dtsi index 68a4f911e60d..7981c781f161 100644 --- a/scuba-camera.dtsi +++ b/scuba-camera.dtsi @@ -170,7 +170,7 @@ iommus = <&apps_smmu 0x400 0x000>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "tfe"; + cam-smmu-label = "tfe"; tfe_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -190,7 +190,7 @@ qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ope", "ope-cdm0"; + cam-smmu-label = "ope", "ope-cdm0"; ope_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -206,7 +206,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x800 0x000>; - label = "cpas-cdm0"; + cam-smmu-label = "cpas-cdm0"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { @@ -223,7 +223,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; diff --git a/shima-camera.dtsi b/shima-camera.dtsi index a2d4ff8733c0..ce11b26198fe 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -412,7 +412,7 @@ <&apps_smmu 0x1400 0x440>, <&apps_smmu 0x1440 0x440>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - label = "ife", "ife-cdm"; + cam-smmu-label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ @@ -430,7 +430,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x2840 0x400>, <&apps_smmu 0x2C40 0x400>; - label = "jpeg"; + cam-smmu-label = "jpeg"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ @@ -460,9 +460,9 @@ <&apps_smmu 0x2C60 0x400>, <&apps_smmu 0x2820 0x400>, <&apps_smmu 0x2C20 0x400>; - label = "icp"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; iova-region-discard = <0xdff00000 0x300000>; + cam-smmu-label = "icp"; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { /* Firmware region is 5MB */ @@ -517,7 +517,7 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x28C0 0x400>, <&apps_smmu 0x2CC0 0x400>; - label = "cpas-cdm"; + cam-smmu-label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { @@ -533,7 +533,7 @@ msm_cam_smmu_secure { compatible = "qcom,msm-cam-smmu-cb"; - label = "cam-secure"; + cam-smmu-label = "cam-secure"; qcom,secure-cb; }; }; From 298360094fbe2b584bb3427dc570e11cceabfdfd Mon Sep 17 00:00:00 2001 From: gqiaorui Date: Thu, 27 Aug 2020 10:36:01 +0800 Subject: [PATCH 100/190] ARM: dts: msm: add for shima sod qrd camera dts support for shima flash/sensor/eeporm birngup. Change-Id: Id43771e5f4ab52fd72ce5a156dcef1fda97565e3 CRs-Fixed: 2754663 --- shima-camera-sensor-qrd.dtsi | 382 +++++++++++++++++++++++++++++++++++ 1 file changed, 382 insertions(+) create mode 100644 shima-camera-sensor-qrd.dtsi diff --git a/shima-camera-sensor-qrd.dtsi b/shima-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..25848c2894c6 --- /dev/null +++ b/shima-camera-sensor-qrd.dtsi @@ -0,0 +1,382 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_wide: qcom,actuator0 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom0 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom1 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_v_custom1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From 999cde096af172ae4d9f2b5f313cd405eca762f5 Mon Sep 17 00:00:00 2001 From: Trishansh Bhardwaj Date: Wed, 2 Sep 2020 14:37:32 +0530 Subject: [PATCH 101/190] ARM: dts: msm: Fix smmu label for cpas and ope cdm Fix cam-smmu-label for cpas-cdm and ope-cdm. CRs-Fixed: 2768163 Change-Id: I588bcf1c81813f1ec9a3f26d91891bc2bb8375c1 --- holi-camera.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 8569e9253584..9b8e35e80c0c 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -366,7 +366,7 @@ qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; - cam-smmu-label = "ope", "ope-cdm0"; + cam-smmu-label = "ope", "ope-cdm"; ope_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -382,7 +382,7 @@ msm_cam_smmu_cpas_cdm { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xc00 0x000>; - cam-smmu-label = "cpas-cdm0"; + cam-smmu-label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { From b03f551bdfcf44bb0f2acf008d49d33a93f8f8cf Mon Sep 17 00:00:00 2001 From: Vikram Sharma Date: Wed, 19 Aug 2020 23:39:16 +0530 Subject: [PATCH 102/190] ARM: dts: msm: Add MFHDR fuse bit Add fuse entry for MFHDR feature bit. CRs-Fixed: 2770220 Change-Id: I9afb1599e4344514ccaaf4eab1e094e8ab82ab11 --- shima-camera.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index af2eda6c8f4a..ad7f867f6cb7 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1317,6 +1317,7 @@ reg = <0xac40000 0x1000>, <0xac42000 0x8000>; reg-cam-base = <0x40000 0x42000>; + cam_hw_fuse = ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 906fe1baa3169302270868854edd051cc8469954 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Mon, 31 Aug 2020 14:43:22 +0530 Subject: [PATCH 103/190] ARM: dts: msm: Add non-default rear sensor DT node on shima Add SHDR sensor IMX577 DT support for shima. CRs-Fixed: 2770001 Change-Id: Ib4381c9f19fdd0ba5fb3220b3301e61962af6e68 --- shima-camera-sensor-idp.dtsi | 79 +++++++ shima-camera-sensor-idps.dtsi | 382 ---------------------------------- 2 files changed, 79 insertions(+), 382 deletions(-) delete mode 100644 shima-camera-sensor-idps.dtsi diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index 5922346607e5..ebc927d6d2b3 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -130,6 +130,41 @@ clock-rates = <24000000>; }; + eeprom_triple_rear: qcom,eeprom4 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&S9B>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3200000 1000000 0>; + rgltr-max-voltage = <1800000 3960000 1200000 0>; + rgltr-load-current = <15000 2000000 805000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear (W) */ qcom,cam-sensor0 { cell-index = <4>; compatible = "qcom,cam-sensor"; @@ -173,6 +208,7 @@ clock-rates = <24000000>; }; + /* Rear-aux (T) */ qcom,cam-sensor1 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -214,6 +250,47 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + /* Rear */ + qcom,cam-sensor4 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_rear>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&S9B>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3200000 1000000 0>; + rgltr-max-voltage = <1800000 3960000 1200000 0>; + rgltr-load-current = <15000 2000000 805000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; &cam_cci1 { @@ -298,6 +375,7 @@ clock-rates = <24000000>; }; + /* Rear-aux (UW) */ qcom,cam-sensor2 { cell-index = <6>; compatible = "qcom,cam-sensor"; @@ -340,6 +418,7 @@ clock-rates = <24000000>; }; + /* Front */ qcom,cam-sensor3 { cell-index = <2>; compatible = "qcom,cam-sensor"; diff --git a/shima-camera-sensor-idps.dtsi b/shima-camera-sensor-idps.dtsi deleted file mode 100644 index 5922346607e5..000000000000 --- a/shima-camera-sensor-idps.dtsi +++ /dev/null @@ -1,382 +0,0 @@ -#include - -&soc { - led_flash_triple_rear: qcom,camera-flash@4 { - cell-index = <4>; - compatible = "qcom,camera-flash"; - flash-source = <&pm8350c_flash0 &pm8350c_flash1>; - torch-source = <&pm8350c_torch0 &pm8350c_torch1>; - switch-source = <&pm8350c_switch2>; - status = "ok"; - }; - - led_flash_triple_rear_aux: qcom,camera-flash@5 { - cell-index = <5>; - compatible = "qcom,camera-flash"; - flash-source = <&pm8350c_flash0 &pm8350c_flash1>; - torch-source = <&pm8350c_torch0 &pm8350c_torch1>; - switch-source = <&pm8350c_switch2>; - status = "ok"; - }; - - led_flash_triple_rear_aux2: qcom,camera-flash@6 { - cell-index = <6>; - compatible = "qcom,camera-flash"; - flash-source = <&pm8350c_flash0 &pm8350c_flash1>; - torch-source = <&pm8350c_torch0 &pm8350c_torch1>; - switch-source = <&pm8350c_switch2>; - status = "ok"; - }; - - qcom,cam-res-mgr { - compatible = "qcom,cam-res-mgr"; - status = "ok"; - }; -}; - -&cam_cci0 { - actuator_triple_wide: qcom,actuator0 { - cell-index = <4>; - compatible = "qcom,actuator"; - cci-master = <0>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - actuator_triple_tele: qcom,actuator1 { - cell-index = <5>; - compatible = "qcom,actuator"; - cci-master = <1>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - eeprom_triple_wide: qcom,eeprom0 { - cell-index = <4>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L3I>; - cam_vana1-supply = <&L5I>; - cam_vdig-supply = <&L1I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vana1", - "cam_vdig", "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; - rgltr-load-current = <5000 68000 74000 805000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_triple_tele: qcom,eeprom1 { - cell-index = <5>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L4I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <10000 52000 140000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_rst1>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_rst1>; - gpios = <&tlmm 101 0>, - <&tlmm 16 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor0 { - cell-index = <4>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <0>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - actuator-src = <&actuator_triple_wide>; - eeprom-src = <&eeprom_triple_wide>; - led-flash-src = <&led_flash_triple_rear>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L3I>; - cam_v_custom1-supply = <&L5I>; - cam_vdig-supply = <&L1I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", - "cam_vdig","cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; - rgltr-load-current = <5000 68000 74000 805000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor1 { - cell-index = <5>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <1>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_tele>; - actuator-src = <&actuator_triple_tele>; - led-flash-src = <&led_flash_triple_rear_aux>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L4I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_rst1>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_rst1>; - gpios = <&tlmm 101 0>, - <&tlmm 16 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; -}; - -&cam_cci1 { - actuator_triple_uw: qcom,actuator2 { - cell-index = <6>; - compatible = "qcom,actuator"; - cci-master = <0>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - eeprom_triple_uw: qcom,eeprom2 { - cell-index = <6>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L6I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <3000 52000 257000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_active - &cam_sensor_active_rst2>; - pinctrl-1 = <&cam_sensor_mclk2_suspend - &cam_sensor_suspend_rst2>; - gpios = <&tlmm 102 0>, - <&tlmm 106 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK2_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_front: qcom,eeprom3 { - cell-index = <2>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L5J>; - cam_vdig-supply = <&L1J>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0>; - rgltr-max-voltage = <1800000 2900000 1150000 0>; - rgltr-load-current = <5000 35000 301000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk3_active - &cam_sensor_active_rst3>; - pinctrl-1 = <&cam_sensor_mclk3_suspend - &cam_sensor_suspend_rst3>; - gpios = <&tlmm 103 0>, - <&tlmm 117 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK3_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor2 { - cell-index = <6>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <2>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_uw>; - actuator-src = <&actuator_triple_uw>; - led-flash-src = <&led_flash_triple_rear_aux2>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L6I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <3000 52000 257000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_active - &cam_sensor_active_rst2>; - pinctrl-1 = <&cam_sensor_mclk2_suspend - &cam_sensor_suspend_rst2>; - gpios = <&tlmm 102 0>, - <&tlmm 106 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK2_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor3 { - cell-index = <2>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <3>; - sensor-position-roll = <270>; - sensor-position-pitch = <0>; - sensor-position-yaw = <0>; - eeprom-src = <&eeprom_front>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L5J>; - cam_vdig-supply = <&L1J>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <5000 35000 301000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk3_active - &cam_sensor_active_rst3>; - pinctrl-1 = <&cam_sensor_mclk3_suspend - &cam_sensor_suspend_rst3>; - gpios = <&tlmm 103 0>, - <&tlmm 117 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK3_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; -}; From f7b54dbeb805e35e83c7c9ffb39703c122b3eb93 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Mon, 31 Aug 2020 16:41:42 +0530 Subject: [PATCH 104/190] ARM: dts: msm: Add GCC throttle clock for Shima Add GCC throttle clock for real time(RT) and non real time(NRT) client for Shima target. We need to control explicitly GCC throttle clock for shima. CRs-Fixed: 2770220 Change-Id: If414039847ffd91fd0a2022e4a4c6fe213f2647f --- shima-camera.dtsi | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index af2eda6c8f4a..46890611963e 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1322,10 +1322,17 @@ camnoc-axi-min-ib-bw = <3000000000>; regulator-names = "camss-vdd"; camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + /* + * GCC throttle rt/nrt clock is added as a workaround in shima. + * Normally, This clock should be turned on/off along with + * GCC HF/SF clock + */ clock-names = "gcc_ahb_clk", "gcc_axi_hf_clk", "gcc_axi_sf_clk", + "gcc_rt_throttle_clk", + "gcc_nrt_throttle_clk", "slow_ahb_clk_src", "cpas_ahb_clk", "cpas_core_ahb_clk", @@ -1335,6 +1342,8 @@ <&gcc GCC_CAMERA_AHB_CLK>, <&gcc GCC_CAMERA_HF_AXI_CLK>, <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&gcc GCC_TITAN_RT_THROTTLE_CORE_CLK>, + <&gcc GCC_TITAN_NRT_THROTTLE_CORE_CLK>, <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, <&camcc CAM_CC_CPAS_AHB_CLK>, <&camcc CAM_CC_CORE_AHB_CLK>, @@ -1342,12 +1351,12 @@ <&camcc CAM_CC_CAMNOC_AXI_CLK>; src-clock-name = "camnoc_axi_clk_src"; clock-rates = - <0 0 0 0 0 0 0 0>, - <0 0 0 80000000 0 0 300000000 0>, - <0 0 0 80000000 0 0 300000000 0>, - <0 0 0 80000000 0 0 342855555 0>, - <0 0 0 80000000 0 0 400000000 0>, - <0 0 0 80000000 0 0 400000000 0>; + <0 0 0 0 0 0 0 0 0 0>, + <0 0 0 0 0 80000000 0 0 300000000 0>, + <0 0 0 0 0 80000000 0 0 300000000 0>, + <0 0 0 0 0 80000000 0 0 342855555 0>, + <0 0 0 0 0 80000000 0 0 400000000 0>, + <0 0 0 0 0 80000000 0 0 400000000 0>; clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", "nominal", "turbo"; control-camnoc-axi-clk; From c42871bdcf5f01d0ca4df1ffedeb76d9a486d25b Mon Sep 17 00:00:00 2001 From: Vikram Sharma Date: Wed, 19 Aug 2020 23:39:16 +0530 Subject: [PATCH 105/190] ARM: dts: msm: Add MFHDR fuse bit Add fuse entry for MFHDR feature bit. CRs-Fixed: 2770220 Change-Id: I9afb1599e4344514ccaaf4eab1e094e8ab82ab11 --- shima-camera.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index af2eda6c8f4a..ad7f867f6cb7 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1317,6 +1317,7 @@ reg = <0xac40000 0x1000>, <0xac42000 0x8000>; reg-cam-base = <0x40000 0x42000>; + cam_hw_fuse = ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 3d86e6f3c66d81f701d6f97296a77a955c8c8dd3 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Tue, 8 Sep 2020 13:48:22 +0530 Subject: [PATCH 106/190] ARM: dts: msm: Modify ubwc configuration for shima Modify currect ubwc configuration for shima target. Change-Id: Iaf72f0b056e62f1d3ecfc0334d4395f7683e26eb --- shima-camera.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index ad7f867f6cb7..6cc9ff0c8f47 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1178,9 +1178,9 @@ "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-ipe-fetch-cfg = <0x707b 0x7083>; - ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-ipe-write-cfg = <0x161cf 0x161ef>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; - ubwc-bps-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-write-cfg = <0x161cf 0x161ef>; status = "ok"; }; From f1f6ab204c942b5fabca714a985ca7b90d755cc7 Mon Sep 17 00:00:00 2001 From: Alok Pandey Date: Tue, 8 Sep 2020 03:03:12 +0530 Subject: [PATCH 107/190] ARM: dts: msm: Add TFE2 node in CPAS-CAMNOC graph Add TFE2 node in CAMNOC graph to consider BW voting done on TFE2 CPAS client. In the absence on this node, BW vote for TFE2 will be ignored by CPAS driver. CRs-Fixed: 2771589 Change-Id: Ie07677f4acbe0499307371ed16bb0cbf60247f57 --- holi-camera.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 9b8e35e80c0c..b014237d6977 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -596,6 +596,24 @@ parent-node = <&level1_rt0_wr>; }; + tfe2_all_wr: tfe2-all-wr { + cell-index = <8>; + node-name = "tfe2-all-wr"; + client-name = "tfe2"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + cpas_cdm0_all_rd: cpas-cdm0-all-rd { cell-index = <9>; node-name = "cpas-cdm0-all-rd"; From 81686757dce79d902f79805e5822d61b84c68d9e Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Mon, 31 Aug 2020 14:43:22 +0530 Subject: [PATCH 108/190] ARM: dts: msm: Add non-default rear sensor DT node on shima Add SHDR sensor IMX577 DT support for shima. CRs-Fixed: 2770001 Change-Id: Ib4381c9f19fdd0ba5fb3220b3301e61962af6e68 --- shima-camera-sensor-idp.dtsi | 79 +++++++ shima-camera-sensor-idps.dtsi | 382 ---------------------------------- 2 files changed, 79 insertions(+), 382 deletions(-) delete mode 100644 shima-camera-sensor-idps.dtsi diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index 5922346607e5..ebc927d6d2b3 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -130,6 +130,41 @@ clock-rates = <24000000>; }; + eeprom_triple_rear: qcom,eeprom4 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&S9B>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3200000 1000000 0>; + rgltr-max-voltage = <1800000 3960000 1200000 0>; + rgltr-load-current = <15000 2000000 805000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear (W) */ qcom,cam-sensor0 { cell-index = <4>; compatible = "qcom,cam-sensor"; @@ -173,6 +208,7 @@ clock-rates = <24000000>; }; + /* Rear-aux (T) */ qcom,cam-sensor1 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -214,6 +250,47 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + /* Rear */ + qcom,cam-sensor4 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_rear>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&BOB>; + cam_vdig-supply = <&S9B>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3200000 1000000 0>; + rgltr-max-voltage = <1800000 3960000 1200000 0>; + rgltr-load-current = <15000 2000000 805000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; &cam_cci1 { @@ -298,6 +375,7 @@ clock-rates = <24000000>; }; + /* Rear-aux (UW) */ qcom,cam-sensor2 { cell-index = <6>; compatible = "qcom,cam-sensor"; @@ -340,6 +418,7 @@ clock-rates = <24000000>; }; + /* Front */ qcom,cam-sensor3 { cell-index = <2>; compatible = "qcom,cam-sensor"; diff --git a/shima-camera-sensor-idps.dtsi b/shima-camera-sensor-idps.dtsi deleted file mode 100644 index 5922346607e5..000000000000 --- a/shima-camera-sensor-idps.dtsi +++ /dev/null @@ -1,382 +0,0 @@ -#include - -&soc { - led_flash_triple_rear: qcom,camera-flash@4 { - cell-index = <4>; - compatible = "qcom,camera-flash"; - flash-source = <&pm8350c_flash0 &pm8350c_flash1>; - torch-source = <&pm8350c_torch0 &pm8350c_torch1>; - switch-source = <&pm8350c_switch2>; - status = "ok"; - }; - - led_flash_triple_rear_aux: qcom,camera-flash@5 { - cell-index = <5>; - compatible = "qcom,camera-flash"; - flash-source = <&pm8350c_flash0 &pm8350c_flash1>; - torch-source = <&pm8350c_torch0 &pm8350c_torch1>; - switch-source = <&pm8350c_switch2>; - status = "ok"; - }; - - led_flash_triple_rear_aux2: qcom,camera-flash@6 { - cell-index = <6>; - compatible = "qcom,camera-flash"; - flash-source = <&pm8350c_flash0 &pm8350c_flash1>; - torch-source = <&pm8350c_torch0 &pm8350c_torch1>; - switch-source = <&pm8350c_switch2>; - status = "ok"; - }; - - qcom,cam-res-mgr { - compatible = "qcom,cam-res-mgr"; - status = "ok"; - }; -}; - -&cam_cci0 { - actuator_triple_wide: qcom,actuator0 { - cell-index = <4>; - compatible = "qcom,actuator"; - cci-master = <0>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - actuator_triple_tele: qcom,actuator1 { - cell-index = <5>; - compatible = "qcom,actuator"; - cci-master = <1>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - eeprom_triple_wide: qcom,eeprom0 { - cell-index = <4>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L3I>; - cam_vana1-supply = <&L5I>; - cam_vdig-supply = <&L1I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vana1", - "cam_vdig", "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; - rgltr-load-current = <5000 68000 74000 805000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_triple_tele: qcom,eeprom1 { - cell-index = <5>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L4I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <10000 52000 140000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_rst1>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_rst1>; - gpios = <&tlmm 101 0>, - <&tlmm 16 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor0 { - cell-index = <4>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <0>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - actuator-src = <&actuator_triple_wide>; - eeprom-src = <&eeprom_triple_wide>; - led-flash-src = <&led_flash_triple_rear>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L3I>; - cam_v_custom1-supply = <&L5I>; - cam_vdig-supply = <&L1I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", - "cam_vdig","cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; - rgltr-load-current = <5000 68000 74000 805000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor1 { - cell-index = <5>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <1>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_tele>; - actuator-src = <&actuator_triple_tele>; - led-flash-src = <&led_flash_triple_rear_aux>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L4I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_active - &cam_sensor_active_rst1>; - pinctrl-1 = <&cam_sensor_mclk1_suspend - &cam_sensor_suspend_rst1>; - gpios = <&tlmm 101 0>, - <&tlmm 16 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK1_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; -}; - -&cam_cci1 { - actuator_triple_uw: qcom,actuator2 { - cell-index = <6>; - compatible = "qcom,actuator"; - cci-master = <0>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; - rgltr-max-voltage = <3000000>; - rgltr-load-current = <103000>; - }; - - eeprom_triple_uw: qcom,eeprom2 { - cell-index = <6>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L6I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; - rgltr-load-current = <3000 52000 257000 0 103000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_active - &cam_sensor_active_rst2>; - pinctrl-1 = <&cam_sensor_mclk2_suspend - &cam_sensor_suspend_rst2>; - gpios = <&tlmm 102 0>, - <&tlmm 106 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK2_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - eeprom_front: qcom,eeprom3 { - cell-index = <2>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L5J>; - cam_vdig-supply = <&L1J>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0>; - rgltr-max-voltage = <1800000 2900000 1150000 0>; - rgltr-load-current = <5000 35000 301000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk3_active - &cam_sensor_active_rst3>; - pinctrl-1 = <&cam_sensor_mclk3_suspend - &cam_sensor_suspend_rst3>; - gpios = <&tlmm 103 0>, - <&tlmm 117 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK3_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor2 { - cell-index = <6>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <2>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_uw>; - actuator-src = <&actuator_triple_uw>; - led-flash-src = <&led_flash_triple_rear_aux2>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L6I>; - cam_vdig-supply = <&L2I>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <3000 52000 257000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_active - &cam_sensor_active_rst2>; - pinctrl-1 = <&cam_sensor_mclk2_suspend - &cam_sensor_suspend_rst2>; - gpios = <&tlmm 102 0>, - <&tlmm 106 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK2_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - qcom,cam-sensor3 { - cell-index = <2>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <3>; - sensor-position-roll = <270>; - sensor-position-pitch = <0>; - sensor-position-yaw = <0>; - eeprom-src = <&eeprom_front>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&L5J>; - cam_vdig-supply = <&L1J>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_bob"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <5000 35000 301000 0 2000000>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk3_active - &cam_sensor_active_rst3>; - pinctrl-1 = <&cam_sensor_mclk3_suspend - &cam_sensor_suspend_rst3>; - gpios = <&tlmm 103 0>, - <&tlmm 117 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK3", - "CAM_RESET3"; - cci-master = <1>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK3_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; -}; From c7509fb0e8ad44c48af0ecd4971e3af4fa2f1942 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Tue, 8 Sep 2020 13:48:22 +0530 Subject: [PATCH 109/190] ARM: dts: msm: Modify ubwc configuration for shima Modify currect ubwc configuration for shima target. CRs-Fixed: 2769152 Change-Id: Iaf72f0b056e62f1d3ecfc0334d4395f7683e26eb --- shima-camera.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 41cd2c6d4474..4c032deb14a8 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1178,9 +1178,9 @@ "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-ipe-fetch-cfg = <0x707b 0x7083>; - ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-ipe-write-cfg = <0x161cf 0x161ef>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; - ubwc-bps-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-write-cfg = <0x161cf 0x161ef>; status = "ok"; }; From 795e52718885fae2755fd61fea0288f0ff495e01 Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Sat, 12 Sep 2020 12:27:41 +0530 Subject: [PATCH 110/190] ARM: dts: msm: Update correct ubwc configuration for shima Update the correct ubwc configuration for shima target. CRs-Fixed: 1338269 Change-Id: I0f7d60faa476894f53ec646b77229a9c3ed37c3c --- shima-camera.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 4c032deb14a8..15c9292ff1f4 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -757,7 +757,7 @@ clock-names-option = "ife_dsp_clk"; clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; clock-rates-option = <720000000>; - ubwc-static-cfg = <0x1026 0x1036>; + ubwc-static-cfg = <0x1016 0x1026>; cam_hw_pid = < 28 4 16 8 >; status = "ok"; }; @@ -844,7 +844,7 @@ clock-names-option = "ife_dsp_clk"; clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; clock-rates-option = <720000000>; - ubwc-static-cfg = <0x1026 0x1036>; + ubwc-static-cfg = <0x1016 0x1026>; cam_hw_pid = < 29 5 17 9 >; status = "ok"; }; @@ -928,7 +928,7 @@ src-clock-name = "ife_clk_src"; scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; - ubwc-static-cfg = <0x1026 0x1036>; + ubwc-static-cfg = <0x1016 0x1026>; cam_hw_pid = < 23 6 18 10>; status = "ok"; }; @@ -1177,9 +1177,9 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; - ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-fetch-cfg = <0x7073 0x707b>; ubwc-ipe-write-cfg = <0x161cf 0x161ef>; - ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-fetch-cfg = <0x7073 0x707b>; ubwc-bps-write-cfg = <0x161cf 0x161ef>; status = "ok"; }; From 956f41d3916b9ecd5a5e6b35aae1fec584d17685 Mon Sep 17 00:00:00 2001 From: Salendarsingh Gaud Date: Sun, 13 Sep 2020 13:13:41 +0530 Subject: [PATCH 111/190] Revert "ARM: dts: msm: Modify ubwc configuration for shima" This reverts commit 3d86e6f3c66d81f701d6f97296a77a955c8c8dd3. Change-Id: Ia2cdf59bda64b42ed077731d22a5bb1c1eca2820 --- shima-camera.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 6cc9ff0c8f47..ad7f867f6cb7 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1178,9 +1178,9 @@ "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-ipe-fetch-cfg = <0x707b 0x7083>; - ubwc-ipe-write-cfg = <0x161cf 0x161ef>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; - ubwc-bps-write-cfg = <0x161cf 0x161ef>; + ubwc-bps-write-cfg = <0x161ef 0x1620f>; status = "ok"; }; From 516e447c3bc7a26346f672ef068b0a91910e693a Mon Sep 17 00:00:00 2001 From: Salendarsingh Gaud Date: Sun, 13 Sep 2020 13:13:54 +0530 Subject: [PATCH 112/190] Revert "ARM: dts: msm: Add MFHDR fuse bit" This reverts commit c42871bdcf5f01d0ca4df1ffedeb76d9a486d25b. Change-Id: I42eaecdc9e3ad7ef085b1a827c6497261ef5c6e0 --- shima-camera.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index ad7f867f6cb7..af2eda6c8f4a 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1317,7 +1317,6 @@ reg = <0xac40000 0x1000>, <0xac42000 0x8000>; reg-cam-base = <0x40000 0x42000>; - cam_hw_fuse = ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 7945aa5e21202f8ce340c330921f573533c8df19 Mon Sep 17 00:00:00 2001 From: Salendarsingh Gaud Date: Sun, 13 Sep 2020 13:13:25 +0530 Subject: [PATCH 113/190] Revert "ARM: dts: msm: Add non-default rear sensor DT node on shima" This reverts commit 81686757dce79d902f79805e5822d61b84c68d9e Change-Id: I756beb68ba11712f91fc2e57f0e020c8b41bfc7b --- shima-camera-sensor-idp.dtsi | 79 ------- shima-camera-sensor-idps.dtsi | 382 ++++++++++++++++++++++++++++++++++ 2 files changed, 382 insertions(+), 79 deletions(-) create mode 100644 shima-camera-sensor-idps.dtsi diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index ebc927d6d2b3..5922346607e5 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -130,41 +130,6 @@ clock-rates = <24000000>; }; - eeprom_triple_rear: qcom,eeprom4 { - cell-index = <0>; - compatible = "qcom,eeprom"; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&BOB>; - cam_vdig-supply = <&S9B>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - cam_vaf-supply = <&L7I>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 3200000 1000000 0>; - rgltr-max-voltage = <1800000 3960000 1200000 0>; - rgltr-load-current = <15000 2000000 805000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; - - /* Rear (W) */ qcom,cam-sensor0 { cell-index = <4>; compatible = "qcom,cam-sensor"; @@ -208,7 +173,6 @@ clock-rates = <24000000>; }; - /* Rear-aux (T) */ qcom,cam-sensor1 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -250,47 +214,6 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; - - /* Rear */ - qcom,cam-sensor4 { - cell-index = <0>; - compatible = "qcom,cam-sensor"; - csiphy-sd-index = <0>; - sensor-position-roll = <90>; - sensor-position-pitch = <0>; - sensor-position-yaw = <180>; - eeprom-src = <&eeprom_triple_rear>; - actuator-src = <&actuator_triple_wide>; - led-flash-src = <&led_flash_triple_rear>; - cam_vio-supply = <&L3J>; - cam_vana-supply = <&BOB>; - cam_vdig-supply = <&S9B>; - cam_clk-supply = <&cam_cc_titan_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; - rgltr-cntrl-support; - rgltr-min-voltage = <1800000 3200000 1000000 0>; - rgltr-max-voltage = <1800000 3960000 1200000 0>; - rgltr-load-current = <15000 2000000 805000 0>; - gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_active - &cam_sensor_active_rst0>; - pinctrl-1 = <&cam_sensor_mclk0_suspend - &cam_sensor_suspend_rst0>; - gpios = <&tlmm 100 0>, - <&tlmm 17 0>; - gpio-reset = <1>; - gpio-req-tbl-num = <0 1>; - gpio-req-tbl-flags = <1 0>; - gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0"; - cci-master = <0>; - status = "ok"; - clocks = <&camcc CAM_CC_MCLK0_CLK>; - clock-names = "cam_clk"; - clock-cntl-level = "nominal"; - clock-rates = <24000000>; - }; }; &cam_cci1 { @@ -375,7 +298,6 @@ clock-rates = <24000000>; }; - /* Rear-aux (UW) */ qcom,cam-sensor2 { cell-index = <6>; compatible = "qcom,cam-sensor"; @@ -418,7 +340,6 @@ clock-rates = <24000000>; }; - /* Front */ qcom,cam-sensor3 { cell-index = <2>; compatible = "qcom,cam-sensor"; diff --git a/shima-camera-sensor-idps.dtsi b/shima-camera-sensor-idps.dtsi new file mode 100644 index 000000000000..5922346607e5 --- /dev/null +++ b/shima-camera-sensor-idps.dtsi @@ -0,0 +1,382 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_wide: qcom,actuator0 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom0 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_vana1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom1 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2700000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor3 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From eb454fb41fe9aa83ef2570ef18a62741b569faf3 Mon Sep 17 00:00:00 2001 From: Ravikishore Pampana Date: Tue, 1 Sep 2020 20:07:08 +0530 Subject: [PATCH 114/190] ARM: dts: msm: camera: Add hw pid info to tfe nodes Each tfe hardware instance has unique pid values. Add pid values to each tfe node instance. These are used to find the tfe instance that caused page fault. Added pid values to all tfe based targets. CRs-Fixed: 2775154 Change-Id: I16b5253bd02c499899ca3c1c2d2e1a24bf62845d --- bengal-camera.dtsi | 3 +++ bindings/msm-cam-tfe.txt | 5 +++++ holi-camera.dtsi | 3 +++ scuba-camera.dtsi | 2 ++ 4 files changed, 13 insertions(+) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index 0c55ca288a4a..c1d49c349d03 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -650,6 +650,7 @@ src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + cam_hw_pid = <4>; status = "ok"; }; @@ -714,6 +715,7 @@ src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + cam_hw_pid = <5>; status = "ok"; }; @@ -778,6 +780,7 @@ src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + cam_hw_pid = <6>; status = "ok"; }; diff --git a/bindings/msm-cam-tfe.txt b/bindings/msm-cam-tfe.txt index 8f7c21b97765..f851784a73d7 100644 --- a/bindings/msm-cam-tfe.txt +++ b/bindings/msm-cam-tfe.txt @@ -112,6 +112,11 @@ Optional properties: Definition: Scalable clock names to identify which clocks needs to update along with source clock. +- cam_hw_pid: + Usage: optional + Value type: + Definition: HW unique Pid values + Example: cam_tfe0: qcom,tfe0@5c6e000{ cell-index = <0>; diff --git a/holi-camera.dtsi b/holi-camera.dtsi index b014237d6977..56f569ccd007 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -764,6 +764,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = <4>; status = "ok"; }; @@ -827,6 +828,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = <5>; status = "ok"; }; @@ -890,6 +892,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = <6>; status = "ok"; }; diff --git a/scuba-camera.dtsi b/scuba-camera.dtsi index 7981c781f161..f611cc488929 100644 --- a/scuba-camera.dtsi +++ b/scuba-camera.dtsi @@ -596,6 +596,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = <4>; status = "ok"; }; @@ -658,6 +659,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; + cam_hw_pid = <5>; status = "ok"; }; From 7d102743fa2fb3b030f2a92f21ec30a17fcfd2cb Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Sat, 12 Sep 2020 12:27:41 +0530 Subject: [PATCH 115/190] ARM: dts: msm: Update correct ubwc configuration for shima Update the correct ubwc configuration for shima target. CRs-Fixed: 1338269 Change-Id: I0f7d60faa476894f53ec646b77229a9c3ed37c3c --- shima-camera.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 4c032deb14a8..15c9292ff1f4 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -757,7 +757,7 @@ clock-names-option = "ife_dsp_clk"; clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; clock-rates-option = <720000000>; - ubwc-static-cfg = <0x1026 0x1036>; + ubwc-static-cfg = <0x1016 0x1026>; cam_hw_pid = < 28 4 16 8 >; status = "ok"; }; @@ -844,7 +844,7 @@ clock-names-option = "ife_dsp_clk"; clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; clock-rates-option = <720000000>; - ubwc-static-cfg = <0x1026 0x1036>; + ubwc-static-cfg = <0x1016 0x1026>; cam_hw_pid = < 29 5 17 9 >; status = "ok"; }; @@ -928,7 +928,7 @@ src-clock-name = "ife_clk_src"; scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; - ubwc-static-cfg = <0x1026 0x1036>; + ubwc-static-cfg = <0x1016 0x1026>; cam_hw_pid = < 23 6 18 10>; status = "ok"; }; @@ -1177,9 +1177,9 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; - ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-fetch-cfg = <0x7073 0x707b>; ubwc-ipe-write-cfg = <0x161cf 0x161ef>; - ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-fetch-cfg = <0x7073 0x707b>; ubwc-bps-write-cfg = <0x161cf 0x161ef>; status = "ok"; }; From 8b7085dc91193252026a116876fe661a07e9fa95 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Wed, 9 Sep 2020 21:43:26 -0700 Subject: [PATCH 116/190] dt-bindings: camera: Add pinctrl gpio support in res_mgr Add shared-pinctrl-gpio support string and other respective documentation. CRs-Fixed: 2758167 Change-Id: I7f43a8494498a5eb4016c676da4957e9318a18f0 --- bindings/msm-cam-cci.txt | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index d353e8b0bfd2..2a011daace41 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -254,10 +254,26 @@ sensor resource. Definition: should contain the gpios which are used by two or more cameras, and these cameras may be opened together. +- shared-pinctrl-gpios + Usage: optional + Value type: + Definition: should contain the pinctrl gpios which are used by two or more + cameras, and these cameras may be opened together. + +- shared-pctrl-gpio-names + Usage: optional + Value type: + Definition: List of names to assign the shared pinctrl gpio defined in + shared-pinctrl-gpios entry + e.g "mclk0", "xyz" + - pinctrl-names Usage: optional Value type: Definition: List of names to assign the shared pin state defined in pinctrl device node + string should follow the strict rule which needs to start with shared-pinctrl-gpio-names + and followed by "_active" and "_suspend" + e.g. "mclk0_active", "mclk0_suspend", "xyz_active", "xyz_suspend" - pinctrl-<0..n> Usage: optional @@ -758,9 +774,14 @@ Example: compatible = "qcom,cam-res-mgr"; status = "ok"; shared-gpios = <18 19>; - pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; - pinctrl-0 = <&cam_shared_clk_active &cam_res_mgr_active>; - pinctrl-1 = <&cam_shared_clk_suspend &cam_res_mgr_suspend>; + shared-pinctrl-gpios = <408 409>; + shared-pctrl-gpio-names = "mclk0", "mclk1"; + pinctrl-names = "mclk0_active", "mclk0_suspend", + "mclk1_active", "mclk1_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend>; + pintcrl-2 = <&cam_sensor_mclk1_active>; + pinctrl-3 = <&cam_sensor_mclk1_suspend>; }; qcom,cam-sensor0 { From 1a54dadbe1b6a57b2be2fda2935f6f3056e6dcd7 Mon Sep 17 00:00:00 2001 From: Jigar Agrawal Date: Mon, 14 Sep 2020 18:13:00 -0700 Subject: [PATCH 117/190] dt-bindings: camera: Update dt-bindings for Waipio Update the binding for IFE, CSID, CDM, TPG, CSIPHY, ICP, CCI for Waipio. Also, add bindings for SFE for waipio. CRs-fixed: 2784041 Change-Id: Ia20dd4c458385edb446ba12b160b9577faa1c619 --- bindings/msm-cam-cci.txt | 19 ++- bindings/msm-cam-cdm.txt | 38 ++++-- bindings/msm-cam-csiphy.txt | 137 ++++++++++++------- bindings/msm-cam-icp.txt | 241 +++++++++++++++++++++------------- bindings/msm-cam-ife-csid.txt | 94 +++++++------ bindings/msm-cam-sfe.txt | 132 +++++++++++++++++++ bindings/msm-cam-tpg.txt | 87 ++++++------ bindings/msm-cam-vfe.txt | 102 +++++++------- 8 files changed, 571 insertions(+), 279 deletions(-) create mode 100644 bindings/msm-cam-sfe.txt diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index d353e8b0bfd2..a0686cf6aa9d 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -15,6 +15,11 @@ i2c communication. First Level Node - CCI device ====================================== +- cell-index: cci hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + - compatible Usage: required Value type: @@ -22,11 +27,6 @@ First Level Node - CCI device In case of cci version 1.2, use "qcom,cci-v1.2". -- cell-index: cci hardware core index - Usage: required - Value type: - Definition: Should specify the Hardware index id. - - reg Usage: required Value type: @@ -40,16 +40,21 @@ First Level Node - CCI device Definition: Should specify relevant names to each reg property defined. -- interrupts +- reg-cam-base Usage: required Value type: - Definition: Interrupt associated with CCI HW. + Definition: List of bases. - interrupt-names Usage: required Value type: Definition: Name of the interrupt. +- interrupts + Usage: required + Value type: + Definition: Interrupt associated with CCI HW. + - gpios Usage: required Value type: diff --git a/bindings/msm-cam-cdm.txt b/bindings/msm-cam-cdm.txt index 783bc20bab53..9861be2f6c5b 100644 --- a/bindings/msm-cam-cdm.txt +++ b/bindings/msm-cam-cdm.txt @@ -57,13 +57,13 @@ to CDM interface node. Definition: Should be "qcom,cam170-cpas-cdm0", "qcom,cam480-cpas-cdm0", "qcom,cam480-cpas-cdm1", "qcom,cam480-cpas-cdm2", "qcom,cam-cpas-cdm1_0", "qcom,cam-cpas-cdm1_1", "qcom,cam-cpas-cdm1_2", "qcom,cam-ife-cdm1_2", - "qcom,cam-cpas-cdm2_0" or "qcom,cam-ope-cdm2_0", - "qcom,cam-cpas-cdm2_1" or "qcom,cam-ope-cdm2_1" + "qcom,cam-cpas-cdm2_0", "qcom,cam-ope-cdm2_0", "qcom,cam-cpas-cdm2_1", + "qcom,cam-rt-cdm2_1" or "qcom,cam-ope-cdm2_1" - label Usage: required Value type: - Definition: Should be "cpas-cdm". + Definition: Should be "cpas-cdm", "ife-cdm", or "rt-cdm". - reg-names Usage: required @@ -117,17 +117,34 @@ to CDM interface node. Value type: Definition: List of clocks rates. -- cdm-client-names - Usage: required - Value type: - Definition: List of Clients supported by CDM HW node. - - clock-cntl-level Usage: required Value type: Definition: List of strings corresponds clock-rates levels. Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. +- cdm-client-names + Usage: required + Value type: + Definition: List of Clients supported by CDM HW node. + +- config-fifo + Usage: required + Value type: + Definition: Flag to let driver know whether to load fifo depths + from property fifo-depths or not. + +- fifo-depths + Usage: required + Value type: + Definition: List of fifo depths supported by device. + +- single-context-cdm + Usage: required + Value type: + Definition: Flag to indicate that the CDM is being used in single + context mode. + Example: qcom,cpas-cdm0@ac48000 { cell-index = <0>; @@ -152,7 +169,10 @@ Example: <&clock_camcc CAM_CC_CPAS_AHB_CLK>, <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; qcom,clock-rates = <0 80000000 80000000 80000000 80000000 80000000>; - cdm-client-names = "ife"; clock-cntl-level = "turbo"; + cdm-client-names = "ife0"; + config-fifo; + fifo-depths = <64 0 0 0>; + single-context-cdm; status = "ok"; }; diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index 14b5052e075f..2ddc5e6a0b86 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -9,6 +9,10 @@ first level describe the overall CSIPHY node structure. ====================================== First Level Node - CSIPHY device ====================================== +- cell-index: csiphy hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. - compatible Usage: required @@ -19,11 +23,6 @@ First Level Node - CSIPHY device "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy-v2.1.0", "qcom,csiphy-v1.2.4", "qcom,csiphy-v1.2.5", "qcom,csiphy". -- cell-index: csiphy hardware core index - Usage: required - Value type: - Definition: Should specify the Hardware index id. - - reg Usage: required Value type: @@ -52,26 +51,6 @@ First Level Node - CSIPHY device Value type: Definition: Name of the interrupt. -- clock-names - Usage: required - Value type: - Definition: List of clock names required for CSIPHY HW. - -- clock-rates - Usage: required - Value type: - Definition: List of clock rates in Hz for CSIPHY HW. - -- clock-cntl-level - Usage: required - Value type: - Definition: All different clock level node can support. - -- clocks - Usage: required - Value type: - Definition: all clock phandle and source clocks. - - regulator-names Usage: required Value type: @@ -88,32 +67,96 @@ First Level Node - CSIPHY device Definition: should contain phandle for mipi-csi-vdd regulator used for CSIPHY device. +- csi-vdd-xxx-supply + Usage: required + Value type: + Definition: should contain phandles for csi-vdd-1p2 and csi-vdd-0p9 + regulators used for CSIPHY. + - csi-vdd-voltage Usage: required Value type: - Definition: should contain required voltage for csi-vdd supply for CSIPHY. + Definition: should contain required voltage for csi-vdd supply + for CSIPHY. + +- rgltr-cntrl-support + Usage: required + Value type: + Definition: Flag to indicate whether regulator control support is + enabled or not. + +- rgltr-min-voltage + Usage: required + Value type: + Definition: should contain required min voltage for gdsr, csi-vdd-1p2 + and csi-vdd-0p9 supply for CSIPHY. + +- rgltr-max-voltage + Usage: required + Value type: + Definition: should contain required max voltage for gdsr, csi-vdd-1p2 + and csi-vdd-0p9 supply for CSIPHY. + +- rgltr-load-current + Usage: required + Value type: + Definition: should contain peak current for gdsr, csi-vdd-1p2 + and csi-vdd-0p9 supply for CSIPHY. + +- clocks + Usage: required + Value type: + Definition: all clock phandle and source clocks. + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CSIPHY HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-rates + Usage: required + Value type: + Definition: List of clock rates in Hz for CSIPHY HW. Example: -qcom,csiphy@ac65000 { - cell-index = <0>; - compatible = "qcom,csiphy-v1.0", "qcom,csiphy"; - reg = <0xac65000 0x200>; - reg-cam-base = <0x65000>; - reg-names = "csiphy"; - interrupts = <0 477 0>; - interrupt-names = "csiphy"; - regulator-names = "gdscr", "refgen"; - mipi-csi-vdd-supply = <&pm8998_l1>; - csi-vdd-voltage = <1200000>; - gdscr-supply = <&titan_top_gdsc>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY0_CLK>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; - clock-names = "cphy_rx_clk_src", "csiphy0_clk", - "csi0phytimer_clk_src", "csi0phytimer_clk"; - clock-rates = <400000000 0 300000000 0>; - clock-cntl-level = "turbo"; - status = "ok"; +cam_csiphy0: qcom,csiphy0@ace4000 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = < 0x0ace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupts = ; + interrupt-names = "csiphy0"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; }; diff --git a/bindings/msm-cam-icp.txt b/bindings/msm-cam-icp.txt index e22e1f99f670..5848dd56dca3 100644 --- a/bindings/msm-cam-icp.txt +++ b/bindings/msm-cam-icp.txt @@ -2,7 +2,7 @@ The MSM camera ICP devices are implemented multiple device nodes. The root icp device node has properties defined to hint the driver -about the number of A5,IPE and BPS nodes available during the +about the number of A5, LX7, IPE and BPS nodes available during the probe sequence. Each node has multiple properties defined for interrupts, clocks and regulators. @@ -10,7 +10,7 @@ for interrupts, clocks and regulators. Required Node Structure ======================= ICP root interface node takes care of the handling account for number -of A5, IPE and BPS devices present on the hardware. +of A5, LX7, IPE and BPS devices present on the hardware. - compatible Usage: required @@ -20,12 +20,13 @@ of A5, IPE and BPS devices present on the hardware. - compat-hw-name Usage: required Value type: - Definition: Should be "qcom,a5" or "qcom,ipe0" or "qcom,ipe1" or "qcom,bps". + Definition: Should be "qcom,a5", "qcom,lx7", "qcom,ipe0", + "qcom,ipe1" or "qcom,bps". -- num-a5 +- num-a5 or num-lx7 Usage: required Value type: - Definition: Number of supported A5 processors. + Definition: Number of supported A5 or LX7 processors. - num-ipe Usage: required @@ -38,20 +39,21 @@ of A5, IPE and BPS devices present on the hardware. Definition: Number of supported BPS HW blocks. Example: - qcom,cam-icp { - compatible = "qcom,cam-icp"; - compat-hw-name = "qcom,a5", "qcom,ipe0", "qcom,ipe1", "qcom,bps"; - num-a5 = <1>; - num-ipe = <2>; - num-bps = <1>; - status = "ok"; - }; +qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", "qcom,lx7", "qcom,ipe0", + "qcom,ipe0", "qcom,bps"; + num-a5 = <1>; or num-lx7 = <1>; + num-ipe = <2>; + num-bps = <1>; + status = "ok"; +}; ======================= Required Node Structure ======================= -A5/IPE/BPS Node's provides interface for Image Control Processor driver -about the A5 register map, interrupt map, clocks, regulators +A5/LX7/IPE/BPS Node's provides interface for Image Control Processor driver +about the A5/LX7 register map, interrupt map, clocks, regulators and name of firmware image. - cell-index @@ -62,7 +64,8 @@ and name of firmware image. - compatible Usage: required Value type: - Definition: Should be "qcom,cam-a5" or "qcom,cam-ipe" or "qcom,cam-bps". + Definition: Should be "qcom,cam-a5", "qcom,cam-lx7", + "qcom,cam-ipe" or "qcom,cam-bps". - reg-names Usage: optional @@ -87,23 +90,23 @@ and name of firmware image. - interrupts Usage: optional Value type: - Definition: Interrupt associated with CDM HW. + Definition: Interrupt associated with ICP HW. - regulator-names Usage: required Value type: - Definition: Name of the regulator resources for CDM HW. + Definition: Name of the regulator resources for ICP HW. - camss-supply Usage: required Value type: Definition: Regulator reference corresponding to the names listed - in "regulator-names". + in "regulator-names". - clock-names Usage: required Value type: - Definition: List of clock names required for CDM HW. + Definition: List of clock names required for ICP HW. - src-clock-name Usage: required @@ -118,7 +121,7 @@ and name of firmware image. - clocks Usage: required Value type: - Definition: List of clocks used for CDM HW. + Definition: List of clocks used for ICP HW. - clock-cntl-level Usage: required @@ -163,75 +166,123 @@ and name of firmware image. ipe/bps ubwc properties are not used. Examples: -a5: qcom,a5@ac00000 { +cam_a5: qcom,a5 { cell-index = <0>; compatible = "qcom,cam-a5"; reg = <0xac00000 0x6000>, <0xac10000 0x8000>, <0xac18000 0x3000>; reg-names = "a5_qgic", "a5_sierra", "a5_csr"; - interrupts = <0 463 0>; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; interrupt-names = "a5"; regulator-names = "camss-vdd"; - camss-vdd-supply = <&titan_top_gdsc>; - clock-names = "gcc_cam_ahb_clk", - "gcc_cam_axi_clk", - "soc_ahb_clk", - "cpas_ahb_clk", - "camnoc_axi_clk", - "icp_apb_clk", - "icp_atb_clk", - "icp_clk", + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", "icp_clk_src", - "icp_cti_clk", - "icp_ts_clk"; - clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, - <&clock_gcc GCC_CAMERA_AXI_CLK>, - <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_ICP_APB_CLK>, - <&clock_camcc CAM_CC_ICP_ATB_CLK>, - <&clock_camcc CAM_CC_ICP_CLK>, - <&clock_camcc CAM_CC_ICP_CLK_SRC>, - <&clock_camcc CAM_CC_ICP_CTI_CLK>, - <&clock_camcc CAM_CC_ICP_TS_CLK>; + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_AHB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; - clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>; - clock-cntl-level = "turbo"; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 600000000 0>, + <0 0 600000000 0>, + <0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; fw_name = "CAMERA_ICP.elf"; - /* "ubwc-cfg" is not used, even if defined the new property - tags will be priortized. If the new properties are not used - please specify "ubwc-cfg" in that case */ ubwc-ipe-fetch-cfg = <0x707b 0x7083>; ubwc-ipe-write-cfg = <0x161ef 0x1620f>; - ubwc-bps-fetch-cfg = <0x707b 0x7083> + ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; +}; -qcom,ipe0 { +cam_lx7: qcom,lx7 { + cell-index = <0>; + compatible = "qcom,cam-lx7"; + reg = <0xac01000 0x400>, + <0xac01800 0x400>; + reg-names = "lx7_csr", "lx7_cirq"; + reg-cam-base = <0x1000 0x1800>; + interrupts = ; + interrupt-names = "lx7"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_slow_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_AHB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; + + clock-rates = + <80000000 0 400000000 0>, + <80000000 0 480000000 0>, + <80000000 0 600000000 0>, + <80000000 0 600000000 0>, + <80000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + fw_name = "CAMERA_ICP.elf"; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; +}; + +cam_ipe0: qcom,ipe0@ac42000 { cell-index = <0>; compatible = "qcom,cam-ipe"; + reg = <0xac42000 0x18000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x42000>; regulator-names = "ipe0-vdd"; - ipe0-vdd-supply = <&ipe_0_gdsc>; - clock-names = "ipe_0_ahb_clk", - "ipe_0_areg_clk", - "ipe_0_axi_clk", - "ipe_0_clk", - "ipe_0_clk_src"; - src-clock-name = "ipe_0_clk_src"; - clocks = <&clock_camcc CAM_CC_IPE_0_AHB_CLK>, - <&clock_camcc CAM_CC_IPE_0_AREG_CLK>, - <&clock_camcc CAM_CC_IPE_0_AXI_CLK>, - <&clock_camcc CAM_CC_IPE_0_CLK>, - <&clock_camcc CAM_CC_IPE_0_CLK_SRC>; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "ipe_nps_ahb_clk_src", + "ipe_nps_ahb_clk", + "ipe_fast_ahb_clk_src", + "ipe_nps_fast_ahb_clk", + "ipe_pps_fast_ahb_clk", + "ipe_nps_clk_src", + "ipe_nps_clk"; + "ipe_pps_clk"; + src-clock-name = "ipe_nps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_PPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_NPS_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_CLK>, + <&clock_camcc CAM_CC_IPE_PPS_CLK>; - clock-rates = <0 0 0 0 240000000>, - <0 0 0 0 404000000>, - <0 0 0 0 480000000>, - <0 0 0 0 538000000>, - <0 0 0 0 600000000>; - clock-cntl-level = "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + clock-rates = + <80000000 0 100000000 0 0 364000000 0 0>, + <80000000 0 200000000 0 0 500000000 0 0>, + <80000000 0 300000000 0 0 600000000 0 0>, + <80000000 0 400000000 0 0 700000000 0 0>, + <80000000 0 400000000 0 0 700000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; }; qcom,ipe1 { @@ -260,28 +311,38 @@ qcom,ipe1 { "svs_l1", "nominal", "turbo"; }; -bps: qcom,bps { +cam_bps: qcom,bps@ac2c000 { cell-index = <0>; compatible = "qcom,cam-bps"; + reg = <0xac2c000 0xB000>; + reg-names = "bps_top"; + reg-cam-base = <0x2c000>; regulator-names = "bps-vdd"; - bps-vdd-supply = <&bps_gdsc>; - clock-names = "bps_ahb_clk", - "bps_areg_clk", - "bps_axi_clk", - "bps_clk", - "bps_clk_src"; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = + "bps_ahb_clk_src", + "bps_ahb_clk", + "bps_fast_ahb_clk_src", + "bps_fast_ahb_clk", + "bps_clk_src", + "bps_clk"; src-clock-name = "bps_clk_src"; - clocks = <&clock_camcc CAM_CC_BPS_AHB_CLK>, - <&clock_camcc CAM_CC_BPS_AREG_CLK>, - <&clock_camcc CAM_CC_BPS_AXI_CLK>, - <&clock_camcc CAM_CC_BPS_CLK>, - <&clock_camcc CAM_CC_BPS_CLK_SRC>; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_BPS_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_CLK>; - clock-rates = <0 0 0 0 200000000>, - <0 0 0 0 404000000>, - <0 0 0 0 480000000>, - <0 0 0 0 600000000>, - <0 0 0 0 600000000>; - clock-cntl-level = "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + clock-rates = + <80000000 0 100000000 0 200000000 0>, + <80000000 0 200000000 0 400000000 0>, + <80000000 0 300000000 0 480000000 0>, + <80000000 0 400000000 0 600000000 0>, + <80000000 0 400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; }; diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index 5da5a5ad57d0..3230682d84b9 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -12,21 +12,20 @@ The IFE CSID device is described in one level of the device node. ====================================== First Level Node - CAM IFE CSID device ====================================== -- compatible - Usage: required - Value type: - - Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", "qcom,csid175_200", - "qcom,csid480", "qcom,csid580", "qcom,csid680", "qcom,csid-lite170", - "qcom,csid-lite175", "qcom,csid-lite480" or "qcom,csid-custom480", - "qcom,csid-lite580" or "qcom,csid-custom580", - "qcom,csid-lite680". - - cell-index Usage: required Value type: Definition: Should specify the hardware index id. +- compatible + Usage: required + Value type: + Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", + "qcom,csid175_200", "qcom,csid480", "qcom,csid580", "qcom,csid680", + "qcom,csid-lite170", "qcom,csid-lite175", "qcom,csid-lite480", + "qcom,csid-custom480", "qcom,csid-lite580", "qcom,csid-custom580", + "qcom,csid-lite680" or "qcom,csid-custom680". + - reg-names Usage: required Value type: @@ -37,6 +36,11 @@ First Level Node - CAM IFE CSID device Value type: Definition: Register values. +- reg-cam-base + Usage: required + Value type: + Definition: List of bases. + - interrupt-names Usage: Required Value type: @@ -90,35 +94,41 @@ First Level Node - CAM IFE CSID device Example: - qcom,csid0@acb3000 { - cell-index = <0>; - compatible = "qcom,csid580"; - reg = <0xacb3000 0x1000>; - reg-names = "csid"; - interrupts = <0 464 0>; - interrupt-names = "csid"; - vdd-names = "camss", "ife0"; - camss-supply = <&titan_top_gdsc>; - ife0-supply = <&ife_0_gdsc>; - clock-names = "soc_ahb_clk", - "cpas_ahb_clk", - "slow_ahb_clk_src", - "ife_clk", - "ife_clk_src", - "ife_csid_clk", - "ife_csid_clk_src", - "ife_cphy_rx_clk", - "cphy_rx_clk_src"; - clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CLK>, - <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, - <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>; - clock-rates = <0 0 80000000 0 320000000 0 384000000 0 384000000>; - src-clock-name = "ife_csid_clk_src"; - status = "ok"; - }; +cam_csid0: qcom,csid0@acb7000 { + cell-index = <0>; + compatible = "qcom,csid680"; + reg-names = "csid", "csid_top", "rt_wrapper"; + reg = <0xacb7000 0xd00>, + <0xacb6000 0x1000>, + <0xac62000 0x64000>; + reg-cam-base = <0xb7000 0xb6000 0x62000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "csid_clk_src", + "csid_clk", + "cphy_rx_clk_src", + "csiphy_rx_clk", + "cpas_fast_ahb_src", + "cpas_fast_ahb"; + clocks = + <&clock_camcc CAM_CC_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_FAST_AHB_CLK>; + clock-rates = + <400000000 0 400000000 0 100000000 0>, + <480000000 0 480000000 0 200000000 0>, + <480000000 0 480000000 0 300000000 0>, + <480000000 0 480000000 0 400000000 0>, + <480000000 0 480000000 0 400000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; +}; diff --git a/bindings/msm-cam-sfe.txt b/bindings/msm-cam-sfe.txt new file mode 100644 index 000000000000..5942a5eb8518 --- /dev/null +++ b/bindings/msm-cam-sfe.txt @@ -0,0 +1,132 @@ +* Qualcomm Technologies, Inc. MSM Camera SFE + +Camera SFE device provides the definitions for enabling +the SFE hardware. It also provides the functions for the client +to control the SFE hardware. + +======================= +Required Node Structure +======================= +The SFE device is described in one level of the device node. + +====================================== +First Level Node - CAM SFE device +====================================== +Required properties: +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- compatible + Usage: required + Value type: + Definition: Should specify the compatibility string for matching the + + driver. e.g. "qcom,sfe680". + +- reg-names + Usage: required + Value type: + Definition: Should specify the name of the register block. + +- reg + Usage: required + Value type: + Definition: Register values. + +- reg-cam-base + Usage: required + Value type: + Definition: List of bases. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with SFE HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for SFE HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for SFE HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for SFE HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- scl-clk-names + Usage: required + Value type: + Definition: Source clock name for register write. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +Example: +cam_sfe0: qcom,sfe0@ac9e000 { + cell-index = <0>; + compatible = "qcom,sfe680"; + reg-names = "sfe0", "rt_wrapper"; + reg = <0xac9e000 0x8000>, + <0xac62000 0x64000>; + reg-cam-base = <0x9e000 0x62000>; + interrupt-names = "sfe"; + interrupts = ; + regulator-names = "camss", "sfe0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + sfe0-supply = <&cam_cc_sfe_0_gdsc>; + clock-names = + "sfe_0_ahb", + "sfe_clk_src", + "sfe_clk"; + clocks = + <&clock_camcc CAM_CC_SFE_0_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_SFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_SFE_0_CLK>; + clock-rates = + <100000000 432000000 0>, + <200000000 594000000 0>, + <300000000 675000000 0>, + <400000000 785000000 0>, + <400000000 785000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "sfe_clk_src"; + scl-clk-names = "sfe_0_ahb"; + clock-control-debugfs = "true"; + status = "ok"; +}; diff --git a/bindings/msm-cam-tpg.txt b/bindings/msm-cam-tpg.txt index f25fa9ae98be..6880125061b4 100644 --- a/bindings/msm-cam-tpg.txt +++ b/bindings/msm-cam-tpg.txt @@ -13,17 +13,17 @@ The TPG device is described in one level of the device node. First Level Node - CAM TPG device ====================================== Required properties: +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + - compatible Usage: required Value type: Definition: Should specify the compatibility string for matching the driver. e.g. "qcom,tpg101", "qcom,tpg102", "qcom,tpgv1", "qcom,tpg103" -- cell-index - Usage: required - Value type: - Definition: Should specify the hardware index id. - - reg-names Usage: required Value type: @@ -34,15 +34,10 @@ Required properties: Value type: Definition: Register values. -- interrupt-names - Usage: Required - Value type: - Definition: Name of the interrupt. - -- interrupts - Usage: Required +- reg-cam-base + Usage: required Value type: - Definition: Interrupt associated with TFE HW. + Definition: List of bases. - regulator-names Usage: required @@ -55,6 +50,16 @@ Required properties: Definition: Regulator reference corresponding to the names listed in "regulator-names". +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with TFE HW. + - clock-names Usage: required Value type: @@ -70,6 +75,11 @@ Required properties: Value type: Definition: List of clocks rates. +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + - src-clock-name Usage: required Value type: @@ -87,27 +97,30 @@ Required properties: along with source clock. Example: - cam_tfe_tpg0: qcom,tpg0@5c66000 { - cell-index = <0>; - compatible = "qcom,tpg101"; - reg-names = "tpg0", "top"; - reg = <0x5c66000 0x400>, - <0x5c11000 0x1000>; - reg-cam-base = <0x66000 0x11000>; - regulator-names = "camss"; - camss-supply = <&gcc_camss_top_gdsc>; - clock-names = - "cphy_rx_clk_src", - "tfe_0_cphy_rx_clk"; - clocks = - <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>; - clock-rates = - <240000000 240000000>, - <341333333 341333333>, - <384000000 384000000>; - clock-cntl-level = "svs", "svs_l1", "turbo"; - src-clock-name = "cphy_rx_clk_src"; - clock-control-debugfs = "false"; - status = "ok"; - }; +cam_csiphy_tpg0: qcom,tpg0@acf6000 { + cell-index = <0>; + compatible = "qcom,tpg103"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xacf6000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf6000 0x13000>; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg0"; + interrupts = ; + clock-names = + "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-rates = + <480000000 0 400000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "csi0phytimer_clk_src"; + status = "ok"; +}; diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index 85dc19873b16..3689327e26fb 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -13,19 +13,20 @@ The VFE device is described in one level of the device node. First Level Node - CAM VFE device ====================================== Required properties: +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + - compatible Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", - "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe-lite580", "qcom,vfe-lite480", - "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". - -- cell-index - Usage: required - Value type: - Definition: Should specify the hardware index id. + driver. e.g. "qcom,vfe680", "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", + "qcom,vfe170", "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe-lite680", + "qcom,vfe-lite580", "qcom,vfe-lite480", "qcom,vfe-lite175", + "qcom,vfe-lite175_130" or "qcom,vfe-lite170". - reg-names Usage: required @@ -37,6 +38,11 @@ Required properties: Value type: Definition: Register values. + - reg-cam-base + Usage: required + Value type: + Definition: List of bases. + - interrupt-names Usage: Required Value type: @@ -121,42 +127,44 @@ Optional properties: Definition: HW unique Pid values Example: - qcom,vfe0@acaf000 { - cell-index = <0>; - compatible = "qcom,vfe580"; - reg-names = "ife"; - reg = <0xacaf000 0x4000>; - interrupts = <0 465 0>; - interrupt-names = "ife"; - vdd-names = "camss-vdd", "ife0-vdd"; - camss-vdd-supply = <&titan_top_gdsc>; - ife0-vdd-supply = <&ife_0_gdsc>; - clock-names = "soc_ahb_clk", - "cpas_ahb_clk", - "slow_ahb_clk_src", - "ife_clk", - "ife_clk_src", - "ife_csid_clk", - "ife_csid_clk_src", - "camnoc_axi_clk", - "ife_axi_clk", - clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CLK>, - <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, - clock-rates = <0 0 80000000 0 320000000 0 384000000 0 0 0>; - src-clock-name = "ife_clk_src"; - clock-names-option = "ife_dsp_clk"; - clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; - clock-rates-option = <600000000>; - scl-clk-en; - scl-clk-names = "ife_axi_clk"; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>; - cam_hw_pid = < 28 4 16 8 >; - status = "ok"; - }; +cam_vfe0: qcom,ife0@ac62000 { + cell-index = <0>; + compatible = "qcom,vfe680"; + reg-names = "ife", "cam_camnoc", "rt_wrapper"; + reg = <0xac62000 0xF000>, + <0xac19000 0x9000>, + <0xac62000 0x64000>; + reg-cam-base = <0x62000 0x19000 0x62000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_0_ahb_src", + "ife_0_ahb", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>; + clock-rates = + <100000000 0 432000000 0>, + <200000000 0 594000000 0>, + <300000000 0 675000000 0>, + <400000000 0 785000000 0>, + <400000000 0 785000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_0_ahb"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <594000000>; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <16 28 20 8>; + status = "ok"; +}; From 059fc6cc8bf99e54b8ba5684946f56c4622acc9a Mon Sep 17 00:00:00 2001 From: Vishal Verma Date: Tue, 15 Sep 2020 12:31:40 +0530 Subject: [PATCH 118/190] ARM: dts: msm: Add tpg node to holi device tree The tpg node is added with mandatory parameters to holi device tree to be probed as different camera ID. CRs-Fixed: 2789855 External Impact: No Change-Id: I52e9f400612c84c18b28d7396e78c03dd457a628 --- holi-camera-sensor-mtp.dtsi | 47 +++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/holi-camera-sensor-mtp.dtsi b/holi-camera-sensor-mtp.dtsi index 9b77eeab3b35..28ff2eb2567f 100644 --- a/holi-camera-sensor-mtp.dtsi +++ b/holi-camera-sensor-mtp.dtsi @@ -206,6 +206,53 @@ clock-cntl-level = "turbo"; clock-rates = <19200000>; }; + + /*TPG0*/ + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG1*/ + qcom,cam-tpg1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + }; &cam_cci1 { From 4d51dd69ee6e05196ecd8065fef0eaef221aca29 Mon Sep 17 00:00:00 2001 From: Wyes Karny Date: Mon, 21 Sep 2020 19:34:46 +0530 Subject: [PATCH 119/190] ARM: dts: msm: Refactor cam_hw_fuse entry For adding more information for cam_hw_fuse refactor existing entries. Also add support for mp limit fuse. CRs-Fixed: 2785460 Change-Id: I116adfd57663be967ed5cc55237cc0e971b226bd --- bindings/msm-cam-cpas.txt | 12 +++++++++--- lito-camera.dtsi | 4 ++-- shima-camera.dtsi | 3 ++- 3 files changed, 13 insertions(+), 6 deletions(-) diff --git a/bindings/msm-cam-cpas.txt b/bindings/msm-cam-cpas.txt index 068edb5e0996..1295a5627060 100644 --- a/bindings/msm-cam-cpas.txt +++ b/bindings/msm-cam-cpas.txt @@ -67,9 +67,15 @@ First Level Node - CAM CPAS device - cam_hw_fuse Usage: optional - Value type: - Definition: List of fuse based features and respective - fuse info. + Value type: + Definition: List of fuse based features and respective fuse info. + fuse_id: fuse id for each features + fuse_address: fuse register io address + fuse_mask: fuse mask for the fuse registers + fuse_type: fuse feature is enable, disable or value type + hw_map: Hw map of the feature, set bit positions which HWs are + supported for that feature. Use 0xFF if all HWs supported + - interrupt-names Usage: optional diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 5d3771df46b7..0031a93f7349 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -1039,8 +1039,8 @@ reg = <0xac40000 0x1000>, <0xac42000 0x6000>; reg-cam-base = <0x40000 0x42000>; - cam_hw_fuse = , - ; + cam_hw_fuse = , + ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 15c9292ff1f4..53451b41a269 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1317,7 +1317,8 @@ reg = <0xac40000 0x1000>, <0xac42000 0x8000>; reg-cam-base = <0x40000 0x42000>; - cam_hw_fuse = ; + cam_hw_fuse = , + ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 6bf04acf7594b430d94167912c20e2ac3b21c188 Mon Sep 17 00:00:00 2001 From: Ashwini Muduganti Date: Tue, 6 Oct 2020 13:37:49 -0700 Subject: [PATCH 120/190] Revert "ARM: dts: msm: Update correct ubwc configuration for shima" This reverts commit 7d102743fa2fb3b030f2a92f21ec30a17fcfd2cb. Change-Id: I6c3aa953aa745db96e7e332b6f7cd67383657b5c --- shima-camera.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 15c9292ff1f4..4c032deb14a8 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -757,7 +757,7 @@ clock-names-option = "ife_dsp_clk"; clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; clock-rates-option = <720000000>; - ubwc-static-cfg = <0x1016 0x1026>; + ubwc-static-cfg = <0x1026 0x1036>; cam_hw_pid = < 28 4 16 8 >; status = "ok"; }; @@ -844,7 +844,7 @@ clock-names-option = "ife_dsp_clk"; clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; clock-rates-option = <720000000>; - ubwc-static-cfg = <0x1016 0x1026>; + ubwc-static-cfg = <0x1026 0x1036>; cam_hw_pid = < 29 5 17 9 >; status = "ok"; }; @@ -928,7 +928,7 @@ src-clock-name = "ife_clk_src"; scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; - ubwc-static-cfg = <0x1016 0x1026>; + ubwc-static-cfg = <0x1026 0x1036>; cam_hw_pid = < 23 6 18 10>; status = "ok"; }; @@ -1177,9 +1177,9 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; - ubwc-ipe-fetch-cfg = <0x7073 0x707b>; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; ubwc-ipe-write-cfg = <0x161cf 0x161ef>; - ubwc-bps-fetch-cfg = <0x7073 0x707b>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161cf 0x161ef>; status = "ok"; }; From 0e1a4200b248432ac11423e917613e7ecbf675bb Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Tue, 29 Sep 2020 14:57:20 +0530 Subject: [PATCH 121/190] ARM: dts: msm: Update cphy_rx_clk_src LOWSVS corner for shima - Update the cphy_rx_clk LOWSVS corner values (from 320MHz to 266.67MHz) in the CSIPHY DT nodes for shima. - Zero out the rx_clk values in the CSID nodes to ensure the clk is only set by PHY. CRs-Fixed: 2792275 Change-Id: Ic39c0123bb04b5b7e449f95823303ca026fa81be --- shima-camera.dtsi | 42 +++++++++++++++++++++--------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 53451b41a269..86038b5a5e5d 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -40,7 +40,7 @@ src-clock-name = "csi0phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs"; clock-rates = - <320000000 0 300000000 0>, + <266666667 0 300000000 0>, <400000000 0 300000000 0>; status = "ok"; }; @@ -74,7 +74,7 @@ src-clock-name = "csi1phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs"; clock-rates = - <320000000 0 300000000 0>, + <266666667 0 300000000 0>, <400000000 0 300000000 0>; status = "ok"; }; @@ -108,7 +108,7 @@ src-clock-name = "csi2phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs"; clock-rates = - <320000000 0 300000000 0>, + <266666667 0 300000000 0>, <400000000 0 300000000 0>; status = "ok"; }; @@ -142,7 +142,7 @@ src-clock-name = "csi3phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs"; clock-rates = - <320000000 0 300000000 0>, + <266666667 0 300000000 0>, <400000000 0 300000000 0>; status = "ok"; }; @@ -176,7 +176,7 @@ src-clock-name = "csi4phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs"; clock-rates = - <320000000 0 300000000 0>, + <266666667 0 300000000 0>, <400000000 0 300000000 0>; status = "ok"; }; @@ -210,7 +210,7 @@ src-clock-name = "csi5phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs"; clock-rates = - <320000000 0 300000000 0>, + <266666667 0 300000000 0>, <400000000 0 300000000 0>; status = "ok"; }; @@ -707,11 +707,11 @@ <&camcc CAM_CC_IFE_0_AHB_CLK>, <&camcc CAM_CC_IFE_0_AXI_CLK>; clock-rates = - <400000000 0 320000000 0 338000000 0 100000000 0 0>, - <400000000 0 400000000 0 475000000 0 200000000 0 0>, - <400000000 0 400000000 0 600000000 0 300000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>; + <400000000 0 0 0 338000000 0 100000000 0 0>, + <400000000 0 0 0 475000000 0 200000000 0 0>, + <400000000 0 0 0 600000000 0 300000000 0 0>, + <400000000 0 0 0 720000000 0 400000000 0 0>, + <400000000 0 0 0 720000000 0 400000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_csid_clk_src"; @@ -794,11 +794,11 @@ <&camcc CAM_CC_IFE_1_AHB_CLK>, <&camcc CAM_CC_IFE_1_AXI_CLK>; clock-rates = - <400000000 0 320000000 0 338000000 0 100000000 0 0>, - <400000000 0 400000000 0 475000000 0 200000000 0 0>, - <400000000 0 400000000 0 600000000 0 300000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>; + <400000000 0 0 0 338000000 0 100000000 0 0>, + <400000000 0 0 0 475000000 0 200000000 0 0>, + <400000000 0 0 0 600000000 0 300000000 0 0>, + <400000000 0 0 0 720000000 0 400000000 0 0>, + <400000000 0 0 0 720000000 0 400000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_csid_clk_src"; @@ -881,11 +881,11 @@ <&camcc CAM_CC_IFE_2_AHB_CLK>, <&camcc CAM_CC_IFE_2_AXI_CLK>; clock-rates = - <400000000 0 320000000 0 338000000 0 100000000 0 0>, - <400000000 0 400000000 0 475000000 0 200000000 0 0>, - <400000000 0 400000000 0 600000000 0 300000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>, - <400000000 0 400000000 0 720000000 0 400000000 0 0>; + <400000000 0 0 0 338000000 0 100000000 0 0>, + <400000000 0 0 0 475000000 0 200000000 0 0>, + <400000000 0 0 0 600000000 0 300000000 0 0>, + <400000000 0 0 0 720000000 0 400000000 0 0>, + <400000000 0 0 0 720000000 0 400000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_csid_clk_src"; From b9e729fca7ca57a9b79a567ba7b306811674c44e Mon Sep 17 00:00:00 2001 From: Chandan Kumar Jha Date: Tue, 29 Sep 2020 22:12:11 +0530 Subject: [PATCH 122/190] ARM: dts: msm: Add rpmh bcm register map for shima Add rpmh bcm register space mapping to help read bcm status registers whenever IFE overflow happens. This helps in getting ddr, mnoc clock frequencies along with other camcc clock frequencies to understand the overflow scenario. CRs-Fixed: 2787956 Change-Id: Ic6ae399a7000974d6f6e33197dc287707a4f2c2e --- bindings/msm-cam-cpas.txt | 10 ++++++++++ shima-camera.dtsi | 8 +++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/bindings/msm-cam-cpas.txt b/bindings/msm-cam-cpas.txt index 1295a5627060..52a2ebf66d3e 100644 --- a/bindings/msm-cam-cpas.txt +++ b/bindings/msm-cam-cpas.txt @@ -156,6 +156,16 @@ First Level Node - CAM CPAS device Definition: Percentage value to be added to camnoc bw while calculating camnoc axi clock frequency. +- rpmh-bcm-info + Usage: optional + Value type: + Definition: Rpmh bcm register map + idx: Total number of BCMs + bcm_fe: First BCM FE (front-end) register offset. + bcm_be: First BCM BE (back-end) register offset. + ddr_idx: DDR BCM index + mmnoc_idx: MMNOC BCM index + - qcom,msm-bus,name - qcom,msm-bus,num-cases - qcom,msm-bus,num-paths diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 53451b41a269..65cb1b01d8e6 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1313,10 +1313,11 @@ label = "cpas"; arch-compat = "cpas_top"; status = "ok"; - reg-names = "cam_cpas_top", "cam_camnoc"; + reg-names = "cam_cpas_top", "cam_camnoc", "cam_rpmh"; reg = <0xac40000 0x1000>, - <0xac42000 0x8000>; - reg-cam-base = <0x40000 0x42000>; + <0xac42000 0x8000>, + <0xbbf0000 0x1F00>; + reg-cam-base = <0x40000 0x42000 0x0BBF0000>; cam_hw_fuse = , ; interrupt-names = "cpas_camnoc"; @@ -1367,6 +1368,7 @@ interconnect-names = "cam_ahb"; interconnects =<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_CAMERA_CFG>; + rpmh-bcm-info = <12 0x4 0x800 0 4>; cam-ahb-num-cases = <8>; cam-ahb-bw-KBps = <0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>, From 82ab87e4a45e59f5f5c71bdbb9cded8a89f11d63 Mon Sep 17 00:00:00 2001 From: Tejas Prajapati Date: Fri, 9 Oct 2020 13:55:16 +0530 Subject: [PATCH 123/190] ARM: dts: msm: Remove secure SID from the camera dtsi Removes stage 2 SIDs for icp context bank from camera dtsi. CRs-Fixed: 2794191 Change-Id: I4de6e1d68da8a21b21d2d915e9b488a8b0d686bc --- lahaina-camera.dtsi | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index f93caf72dd21..d76bc927aa67 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -444,17 +444,11 @@ iommus = <&apps_smmu 0x20E2 0x400>, <&apps_smmu 0x24E2 0x400>, <&apps_smmu 0x2000 0x400>, - <&apps_smmu 0x2001 0xc60>, <&apps_smmu 0x2400 0x400>, - <&apps_smmu 0x2401 0xc60>, <&apps_smmu 0x2060 0x400>, - <&apps_smmu 0x2061 0xc60>, <&apps_smmu 0x2460 0x400>, - <&apps_smmu 0x2461 0xc60>, <&apps_smmu 0x2020 0x400>, - <&apps_smmu 0x2021 0xc60>, - <&apps_smmu 0x2420 0x400>, - <&apps_smmu 0x2421 0xc60>; + <&apps_smmu 0x2420 0x400>; cam-smmu-label = "icp"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; iova-region-discard = <0xdff00000 0x300000>; From 0534c80e0b715b1c8491e1b37a0442ff04086182 Mon Sep 17 00:00:00 2001 From: Vishal Verma Date: Mon, 12 Oct 2020 10:55:00 +0530 Subject: [PATCH 124/190] dt-bindings: camera: Add dt bindings information for TPG DT bindings information is added for dummy sensor TPG node CRs-Fixed: 2813101 Change-Id: I9b104349805e82193e402deee296d392f9f00367 --- bindings/msm-cam-cci.txt | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index d353e8b0bfd2..7896b6e08858 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -266,9 +266,9 @@ sensor resource. controller. These pin configurations are installed in the pinctrl device node. -============================= -CAMERA IMAGE SENSOR MODULE -============================= +============================== +CAMERA IMAGE SENSOR/TPG MODULE +============================== Image sensor node contains properties of camera image sensor - compatible @@ -816,4 +816,26 @@ Example: clock-cntl-leveli = "turbo"; clock-rates = <24000000>; }; + + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; }; From a7503b7ef9106ddd5ffe9c06d850cf244f383440 Mon Sep 17 00:00:00 2001 From: Ravikishore Pampana Date: Tue, 6 Oct 2020 16:51:52 +0530 Subject: [PATCH 125/190] ARM: dts: msm: camera: remove cphy clock entry from tfe csid tfe csid node does not need to have cphy clock values. csid node need to set only default clock. Required clock value will be set by the phy driver. CRs-Fixed: 2796075 Change-Id: Ide1b2b2e0e124357ed20589e0f2bb0431b579009 --- bengal-camera.dtsi | 18 +++++++++--------- holi-camera.dtsi | 18 +++++++++--------- scuba-camera.dtsi | 6 +++--- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index c1d49c349d03..bb5675351112 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -616,9 +616,9 @@ <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <240000000 0 240000000 0 256000000 0>, - <384000000 0 341333333 0 460800000 0>, - <426400000 0 384000000 0 576000000 0>; + <240000000 0 0 0 256000000 0>, + <384000000 0 0 0 460800000 0>, + <426400000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; @@ -681,9 +681,9 @@ <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <240000000 0 240000000 0 256000000 0>, - <384000000 0 341333333 0 460800000 0>, - <426400000 0 384000000 0 576000000 0>; + <240000000 0 0 0 256000000 0>, + <384000000 0 0 0 460800000 0>, + <426400000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; @@ -746,9 +746,9 @@ <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, <&gcc GCC_CAMSS_TFE_2_CLK>; clock-rates = - <240000000 0 240000000 0 256000000 0>, - <384000000 0 341333333 0 460800000 0>, - <426400000 0 384000000 0 576000000 0>; + <240000000 0 0 0 256000000 0>, + <384000000 0 0 0 460800000 0>, + <426400000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 56f569ccd007..71058be5ad19 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -731,9 +731,9 @@ <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <300000000 0 240000000 0 300000000 0>, - <426400000 0 341333333 0 460800000 0>, - <466500000 0 384000000 0 576000000 0>; + <300000000 0 0 0 300000000 0>, + <426400000 0 0 0 460800000 0>, + <466500000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; @@ -795,9 +795,9 @@ <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <300000000 0 240000000 0 300000000 0>, - <426400000 0 341333333 0 460800000 0>, - <466500000 0 384000000 0 576000000 0>; + <300000000 0 0 0 300000000 0>, + <426400000 0 0 0 460800000 0>, + <466500000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; @@ -859,9 +859,9 @@ <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, <&gcc GCC_CAMSS_TFE_2_CLK>; clock-rates = - <300000000 0 240000000 0 300000000 0>, - <426400000 0 341333333 0 460800000 0>, - <466500000 0 384000000 0 576000000 0>; + <300000000 0 0 0 300000000 0>, + <426400000 0 0 0 460800000 0>, + <466500000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; diff --git a/scuba-camera.dtsi b/scuba-camera.dtsi index f611cc488929..8fd5fc199820 100644 --- a/scuba-camera.dtsi +++ b/scuba-camera.dtsi @@ -564,9 +564,9 @@ <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <240000000 0 240000000 0 256000000 0>, - <384000000 0 341333333 0 460800000 0>, - <426400000 0 384000000 0 576000000 0>; + <240000000 0 0 0 256000000 0>, + <384000000 0 0 0 460800000 0>, + <426400000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; From ed1187f306ed84e8f09dd8b2b59e88ac98db941e Mon Sep 17 00:00:00 2001 From: Yulei Yao Date: Fri, 25 Sep 2020 11:45:53 +0800 Subject: [PATCH 126/190] ARM: dts: msm: Update AVDD for Rear Main Camera on Holi QRD Change rear main camera's AVDD from 2800000 to 2880000 on Holi QRD only in order to decrease AVDD noise. CRs-Fixed: 2774064 External Impact: No. Change-Id: Ia2d9b98bbfe1439920ac69dd227b70a6815381f6 --- holi-camera-sensor-qrd.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/holi-camera-sensor-qrd.dtsi b/holi-camera-sensor-qrd.dtsi index f0214071d8bf..da670ed5d64d 100644 --- a/holi-camera-sensor-qrd.dtsi +++ b/holi-camera-sensor-qrd.dtsi @@ -59,8 +59,8 @@ "cam_clk", "cam_vaf"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; - rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-min-voltage = <1800000 2880000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2880000 1056000 0 2800000>; rgltr-load-current = <120000 80000 1200000 0 100000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -139,8 +139,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-min-voltage = <1800000 2880000 1056000 0>; + rgltr-max-voltage = <1800000 2880000 1056000 0>; rgltr-load-current = <120000 80000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; From 6954d06cac107b0530c8dd124d881990d9af5cf8 Mon Sep 17 00:00:00 2001 From: Depeng Shao Date: Wed, 21 Oct 2020 09:17:04 +0800 Subject: [PATCH 127/190] ARM: dts: msm: Increase ICP shared region to 261MB To support more IPE/BPS instances, increase ICP shared region to 261MB. CRs-Fixed: 2799865 Change-Id: I1085f19440f495dcee65b561ce78f25cbee11c9d --- lahaina-camera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index f93caf72dd21..3142a93e7de6 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -470,10 +470,10 @@ }; iova-mem-region-shared { - /* Shared region is 150MB long */ + /* Shared region is 261MB long */ iova-region-name = "shared"; - iova-region-start = <0x7400000>; - iova-region-len = <0x9600000>; + iova-region-start = <0x500000>; + iova-region-len = <0x10500000>; iova-region-id = <0x1>; status = "ok"; }; From 07d15a5e0ccbe749d61cdfd104be7b5f241c8de4 Mon Sep 17 00:00:00 2001 From: Jigar Agrawal Date: Wed, 2 Sep 2020 17:01:49 -0700 Subject: [PATCH 128/190] ARM: dts: msm: Add camera device tree for Waipio Add device tree changes for memory, regulators, clock and interrupt information for CCI, CSIPHY, CPAS, LX7, CDM, TPG, VFE, CSID, IPE, BPS, JPEG, VFE-LITE and CSID-LITE nodes. Update SMMU Node. Add new SFE Nodes. Updated cdp and mtp dtsi files. Update to move camera pinctrl to sensor cdp and mtp files. CRs-Fixed: 2784041 Change-Id: I015a17dcea5ba82e8048138ead93281ec69ef5f5 --- waipio-camera-sensor-cdp.dtsi | 597 ++++++++ waipio-camera-sensor-mtp.dtsi | 597 ++++++++ waipio-camera.dtsi | 2719 +++++++++++++++++++++++++++++++++ 3 files changed, 3913 insertions(+) create mode 100644 waipio-camera-sensor-cdp.dtsi create mode 100644 waipio-camera-sensor-mtp.dtsi create mode 100644 waipio-camera.dtsi diff --git a/waipio-camera-sensor-cdp.dtsi b/waipio-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..0f63ffd41bb8 --- /dev/null +++ b/waipio-camera-sensor-cdp.dtsi @@ -0,0 +1,597 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@3 { + cell-index = <3>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_uw: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2704000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2704000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_tof1: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_v_custom1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1256000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 1256000 0 2800000 3304000>; + rgltr-load-current = <5000 680000 0 35000 15000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 25 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_triple_uw: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 2704000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_triple_tele: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 2704000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 120 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor0 { + cell-index = <7>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_v_custom1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1256000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 1256000 0 2800000 3304000>; + rgltr-load-current = <5000 680000 0 35000 15000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 25 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor1 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 3008000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor3 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 3008000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 120 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; +}; + +&cam_cci1 { + actuator_triple_wide: qcom,actuator2 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2704000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008j_l4>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 1704000 1000000 0 2704000>; + rgltr-max-voltage = <1800000 3000000 1896000 1200000 0 3000000>; + rgltr-load-current = <4000 96000 88000 872000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_tof2: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 119 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0>; + rgltr-max-voltage = <1800000 2896000 1144000 0>; + rgltr-load-current = <3000 52000 257000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 118 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_aon: qcom,eeprom6 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8008j_l5>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l2>; + regulator-names = "cam_vio", "cam_vdig","cam_clk", "cam_vana"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 0 952000>; + rgltr-max-voltage = <1800000 2896000 0 1144000>; + rgltr-load-current = <1120 14700 0 23800>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk6_active + &cam_sensor_active_rst6>; + pinctrl-1 = <&cam_sensor_mclk6_suspend + &cam_sensor_suspend_rst6>; + gpios = <&tlmm 106 0>, + <&tlmm 108 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK6_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor2 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008j_l4>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 1704000 1000000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1896000 1200000 0 3960000>; + rgltr-load-current = <4000 96000 88000 872000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor4 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + eeprom-src = <&eeprom_tof2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 119 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 3008000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 118 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor6 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_aon>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8008j_l5>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l2>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", + "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 0 952000 3008000>; + rgltr-max-voltage = <1800000 2896000 0 1144000 3960000>; + rgltr-load-current = <1120 14700 0 23800 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk6_active + &cam_sensor_active_rst6>; + pinctrl-1 = <&cam_sensor_mclk6_suspend + &cam_sensor_suspend_rst6>; + gpios = <&tlmm 106 0>, + <&tlmm 108 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK6_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; +}; diff --git a/waipio-camera-sensor-mtp.dtsi b/waipio-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..0f63ffd41bb8 --- /dev/null +++ b/waipio-camera-sensor-mtp.dtsi @@ -0,0 +1,597 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@3 { + cell-index = <3>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_uw: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2704000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2704000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_tof1: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_v_custom1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1256000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 1256000 0 2800000 3304000>; + rgltr-load-current = <5000 680000 0 35000 15000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 25 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_triple_uw: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 2704000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_triple_tele: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 2704000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 120 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor0 { + cell-index = <7>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8350_s12>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l6>; + cam_v_custom1-supply = <&pm8008j_l7>; + regulator-names = "cam_vio", "cam_vdig", + "cam_clk", "cam_vana", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1256000 0 2800000 3000000>; + rgltr-max-voltage = <1800000 1256000 0 2800000 3304000>; + rgltr-load-current = <5000 680000 0 35000 15000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 25 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor1 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 3008000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 24 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor3 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 3008000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 120 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; +}; + +&cam_cci1 { + actuator_triple_wide: qcom,actuator2 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2704000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008j_l4>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&pm8008i_l7>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 1704000 1000000 0 2704000>; + rgltr-max-voltage = <1800000 3000000 1896000 1200000 0 3000000>; + rgltr-load-current = <4000 96000 88000 872000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_tof2: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 119 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0>; + rgltr-max-voltage = <1800000 2896000 1144000 0>; + rgltr-load-current = <3000 52000 257000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 118 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + eeprom_aon: qcom,eeprom6 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8008j_l5>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l2>; + regulator-names = "cam_vio", "cam_vdig","cam_clk", "cam_vana"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 0 952000>; + rgltr-max-voltage = <1800000 2896000 0 1144000>; + rgltr-load-current = <1120 14700 0 23800>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk6_active + &cam_sensor_active_rst6>; + pinctrl-1 = <&cam_sensor_mclk6_suspend + &cam_sensor_suspend_rst6>; + gpios = <&tlmm 106 0>, + <&tlmm 108 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK6_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor2 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_vana1-supply = <&pm8008j_l4>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 1704000 1000000 0 3008000>; + rgltr-max-voltage = <1800000 3000000 1896000 1200000 0 3960000>; + rgltr-load-current = <4000 96000 88000 872000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 117 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor4 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + eeprom-src = <&eeprom_tof2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + cam_vio-supply = <&pm8008j_l3>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <185000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk4_active + &cam_sensor_active_rst4>; + pinctrl-1 = <&cam_sensor_mclk4_suspend + &cam_sensor_suspend_rst4>; + gpios = <&tlmm 104 0>, + <&tlmm 119 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK4_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 952000 0 3008000>; + rgltr-max-voltage = <1800000 2896000 1144000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 118 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + qcom,cam-sensor6 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_aon>; + cam_vio-supply = <&pm8008j_l3>; + cam_vdig-supply = <&pm8008j_l5>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&pm8008j_l2>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", + "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2704000 0 952000 3008000>; + rgltr-max-voltage = <1800000 2896000 0 1144000 3960000>; + rgltr-load-current = <1120 14700 0 23800 7100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk6_active + &cam_sensor_active_rst6>; + pinctrl-1 = <&cam_sensor_mclk6_suspend + &cam_sensor_suspend_rst6>; + gpios = <&tlmm 106 0>, + <&tlmm 108 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK6", + "CAM_RESET6"; + cci-master = <1>; + clocks = <&clock_camcc CAM_CC_MCLK6_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; +}; diff --git a/waipio-camera.dtsi b/waipio-camera.dtsi new file mode 100644 index 000000000000..4d7025515784 --- /dev/null +++ b/waipio-camera.dtsi @@ -0,0 +1,2719 @@ +#include + +&tlmm { + cci0_active: cci0_active { + mux { + /* CLK, DATA */ + pins = "gpio110","gpio111"; // Only 2 + function = "cci_i2c"; + }; + + config { + pins = "gpio110","gpio111"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci0_suspend: cci0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio110","gpio111"; + function = "cci_i2c"; + }; + + config { + pins = "gpio110","gpio111"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci1_active: cci1_active { + mux { + /* CLK, DATA */ + pins = "gpio112","gpio113"; + function = "cci_i2c"; + }; + + config { + pins = "gpio112","gpio113"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci1_suspend: cci1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio112","gpio113"; + function = "cci_i2c"; + }; + + config { + pins = "gpio112","gpio113"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci2_active: cci2_active { + mux { + /* CLK, DATA */ + pins = "gpio114","gpio115"; + function = "cci_i2c"; + }; + + config { + pins = "gpio114","gpio115"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci2_suspend: cci2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio114","gpio115"; + function = "cci_i2c"; + }; + + config { + pins = "gpio114","gpio115"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci3_active: cci3_active { + mux { + /* CLK, DATA */ + pins = "gpio208","gpio209"; + function = "cci_i2c"; + }; + + config { + pins = "gpio208","gpio209"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci3_suspend: cci3_suspend { + mux { + /* CLK, DATA */ + pins = "gpio208","gpio209"; + function = "cci_i2c"; + }; + + config { + pins = "gpio208","gpio209"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + + }; + + cam_sensor_mclk0_active: cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_active: cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio101"; + function = "cam_mclk"; + }; + + config { + pins = "gpio101"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio101"; + function = "cam_mclk"; + }; + + config { + pins = "gpio101"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_active: cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio102"; + function = "cam_mclk"; + }; + + config { + pins = "gpio102"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio102"; + function = "cam_mclk"; + }; + + config { + pins = "gpio102"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_active: cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio103"; + function = "cam_mclk"; + }; + + config { + pins = "gpio103"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio103"; + function = "cam_mclk"; + }; + + config { + pins = "gpio103"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk4_active: cam_sensor_mclk4_active { + /* MCLK4 */ + mux { + pins = "gpio104"; + function = "cam_mclk"; + }; + + config { + pins = "gpio104"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk4_suspend: cam_sensor_mclk4_suspend { + /* MCLK4 */ + mux { + pins = "gpio104"; + function = "cam_mclk"; + }; + + config { + pins = "gpio104"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk5_active: cam_sensor_mclk5_active { + /* MCLK5 */ + mux { + pins = "gpio105"; + function = "cam_mclk"; + }; + + config { + pins = "gpio105"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk5_suspend: cam_sensor_mclk5_suspend { + /* MCLK5 */ + mux { + pins = "gpio105"; + function = "cam_mclk"; + }; + + config { + pins = "gpio105"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk6_active: cam_sensor_mclk6_active { + /* MCLK6 */ + mux { + pins = "gpio106"; + function = "cam_mclk"; + }; + + config { + pins = "gpio106"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk6_suspend: cam_sensor_mclk6_suspend { + /* MCLK6 */ + mux { + pins = "gpio106"; + function = "cam_mclk"; + }; + + config { + pins = "gpio106"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_active_rst0: cam_sensor_active_rst0 { + /* RESET REAR */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst0: cam_sensor_suspend_rst0 { + /* RESET REAR */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst1: cam_sensor_active_rst1 { + /* RESET REARAUX */ + mux { + pins = "gpio24"; + function = "gpio"; + }; + + config { + pins = "gpio24"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst1: cam_sensor_suspend_rst1 { + /* RESET REARAUX */ + mux { + pins = "gpio24"; + function = "gpio"; + }; + + config { + pins = "gpio24"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst2: cam_sensor_active_rst2 { + /* RESET 2 */ + mux { + pins = "gpio117"; + function = "gpio"; + }; + + config { + pins = "gpio117"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 { + /* RESET 2 */ + mux { + pins = "gpio117"; + function = "gpio"; + }; + + config { + pins = "gpio117"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst3: cam_sensor_active_rst3 { + /* RESET 3 */ + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 { + /* RESET 3 */ + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst4: cam_sensor_active_rst4 { + /* RESET 4 */ + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst4: cam_sensor_suspend_rst4 { + /* RESET 4 */ + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst5: cam_sensor_active_rst5 { + /* RESET 5 */ + mux { + pins = "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio118"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst5: cam_sensor_suspend_rst5 { + /* RESET 5 */ + mux { + pins = "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst6: cam_sensor_active_rst6 { + /* RESET 6 */ + mux { + pins = "gpio108"; + function = "gpio"; + }; + + config { + pins = "gpio108"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst6: cam_sensor_suspend_rst6 { + /* RESET 6 */ + mux { + pins = "gpio108"; + function = "gpio"; + }; + + config { + pins = "gpio108"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; +}; + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + + cam_csiphy0: qcom,csiphy0@ace4000 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = < 0x0ace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupt-names = "CSIPHY0"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1@ace6000 { + cell-index = <1>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = <0xace6000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe6000>; + interrupt-names = "CSIPHY1"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2@ace8000 { + cell-index = <2>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = <0xace8000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe8000>; + interrupt-names = "CSIPHY2"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3@acea000 { + cell-index = <3>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = <0xacea000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xea000>; + interrupt-names = "CSIPHY3"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy4@acec000 { + cell-index = <4>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = <0xacec000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xec000>; + interrupt-names = "CSIPHY4"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clock-names = "cphy_rx_clk_src", + "csiphy4_clk", + "csi4phytimer_clk_src", + "csi4phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY4_CLK>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>; + src-clock-name = "csi4phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy5: qcom,csiphy5@acee000 { + cell-index = <5>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = <0xacee000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xee000>; + interrupt-names = "CSIPHY5"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clock-names = "cphy_rx_clk_src", + "csiphy5_clk", + "csi5phytimer_clk_src", + "csi5phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY5_CLK>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK>; + src-clock-name = "csi5phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0@ac15000 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac15000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x15000>; + interrupt-names = "cci0"; + interrupts = ; + regulator-names = "gdscr"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + clocks = <&clock_camcc CAM_CC_CCI_0_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_0_CLK>; + clock-rates = <37500000 0>; + clock-cntl-level = "lowsvs"; + src-clock-name = "cci_0_clk_src"; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 110 0>, + <&tlmm 111 0>, + <&tlmm 112 0>, + <&tlmm 113 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + status = "ok"; + }; + + cam_cci1: qcom,cci1@ac16000 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac16000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x16000>; + interrupt-names = "cci1"; + interrupts = ; + regulator-names = "gdscr"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + clocks = <&clock_camcc CAM_CC_CCI_1_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_1_CLK>; + clock-rates = <37500000 0>; + clock-cntl-level = "lowsvs"; + src-clock-name = "cci_1_clk_src"; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active &cci3_active>; + pinctrl-1 = <&cci2_suspend &cci3_suspend>; + gpios = <&tlmm 114 0>, + <&tlmm 115 0>, + <&tlmm 208 0>, + <&tlmm 209 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2", + "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + status = "ok"; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x460>, + <&apps_smmu 0x820 0x460>, + <&apps_smmu 0xC00 0x460>, + <&apps_smmu 0xC20 0x460>, + <&apps_smmu 0x840 0x460>, + <&apps_smmu 0x860 0x460>, + <&apps_smmu 0xC40 0x460>, + <&apps_smmu 0xC60 0x460>; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; + cam-smmu-label = "ife", "sfe"; + multiple-client-devices; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 4.0 GB */ + iova-mem-region-io { + iova-region-name = "io"; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20E0 0x400>, + <&apps_smmu 0x24E0 0x400>; + cam-smmu-label = "jpeg"; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 4.0 GB */ + iova-mem-region-io { + iova-region-name = "io"; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2020 0x420>, + <&apps_smmu 0x2000 0x420>, + <&apps_smmu 0x2420 0x420>, + <&apps_smmu 0x2400 0x420>, + <&apps_smmu 0x2040 0x420>, + <&apps_smmu 0x2060 0x420>, + <&apps_smmu 0x2440 0x420>, + <&apps_smmu 0x2460 0x420>, + <&apps_smmu 0x2101 0x400>, + <&apps_smmu 0x2501 0x400>, + <&apps_smmu 0x2080 0x400>, + <&apps_smmu 0x2480 0x400>, + <&apps_smmu 0x2120 0x420>, + <&apps_smmu 0x2520 0x420>; + cam-smmu-label = "icp"; + qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + iova-region-discard = <0xe0000000 0x800000>; + dma-coherent-hint-cached; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-shared { + /* Shared region is 261MB long */ + iova-region-name = "shared"; + iova-region-start = <0x500000>; + iova-region-len = <0x10500000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10a00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.8 GB */ + iova-region-name = "io"; + iova-region-start = <0x10c00000>; + iova-region-len = <0xee300000>; + iova-region-id = <0x3>; + iova-region-discard = <0xe0000000 0x800000>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10b00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20C0 0x0400>, + <&apps_smmu 0x24C0 0x0400>, + <&apps_smmu 0x20A0 0x0400>, + <&apps_smmu 0x24A0 0x0400>; + cam-smmu-label = "cpas-cdm"; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 4.0 GB */ + iova-region-name = "io"; + /* 1 MB pad for start */ + iova-region-start = <0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + cam-smmu-label = "cam-secure"; + qcom,secure-cb; + }; + }; + + qcom,cam-cpas@ac13000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + reg-names = "cam_cpas_top", "cam_camnoc", "cam_rpmh"; + reg = <0xac13000 0x1000>, + <0xac19000 0x9000>, + <0xbbf0000 0x1F00>; + reg-cam-base = <0x13000 0x19000 0x0bbf0000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_hf_clk", + "gcc_axi_sf_clk", + "cam_cc_slow_ahb_clk_src", + "cpas_ahb_clk", + "cpas_core_ahb_clk", + "cam_cc_fast_ahb_clk_src", + "cam_cc_cpas_fast_ahb_clk", + "camnoc_axi_clk_src", + "camnoc_axi_clk"; + clocks = + <&clock_gcc GCC_CAMERA_AHB_CLK>, + <&clock_gcc GCC_CAMERA_HF_AXI_CLK>, + <&clock_gcc GCC_CAMERA_SF_AXI_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CORE_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, + <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; + clock-rates = + <0 0 0 0 0 0 0 0 0 0>, + <0 0 0 80000000 0 0 100000000 0 300000000 0>, + <0 0 0 80000000 0 0 200000000 0 400000000 0>, + <0 0 0 80000000 0 0 300000000 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0 400000000 0>, + <0 0 0 80000000 0 0 400000000 0 400000000 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", + "nominal", "nominal_l1", "turbo"; + src-clock-name = "camnoc_axi_clk_src"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_CAMERA_CFG>; + rpmh-bcm-info = <12 0x4 0x800 0 4>; + cam-ahb-num-cases = <8>; + cam-ahb-bw-KBps = + <0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", + "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", "csiphy5", + "cci0", "cci1", "csid0", "csid1", "csid2", "csid3", "csid4", + "csid5", "csid6", "csid7", "ife0", "ife1", "ife2", "ife3", "ife4", + "ife5", "ife6", "ife7", "sfe0", "sfe1", "custom0", "custom1", + "ipe0", "cpas-cdm0", "rt-cdm0", "rt-cdm1", "rt-cdm2", + "cam-cdm-intf0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", "tpg0", + "tpg1", "tpg2"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_rd_wr_sum: level3-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_HF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_SF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt1_rd_wr_sum: level3-nrt1-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = + "cam_sf_icp"; + interconnects = + <&mmss_noc MASTER_CAMNOC_ICP + &mc_virt SLAVE_EBI1>; + }; + }; + }; + + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt0_wr: level2-rt0-wr { + cell-index = <3>; + node-name = "level2-rt0-wr"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt0_rd: level2-rt0-rd { + cell-index = <4>; + node-name = "level2-rt0-rd"; + parent-node = <&level3_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_wr: level2-nrt0-wr { + cell-index = <5>; + node-name = "level2-nrt0-wr"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_rd: level2-nrt0-rd { + cell-index = <6>; + node-name = "level2-nrt0-rd"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_rd: level2-nrt1-rd { + cell-index = <7>; + node-name = "level2-nrt1-rd"; + parent-node = <&level3_nrt1_rd_wr_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr0: level1-rt0-wr0 { + cell-index = <8>; + node-name = "level1-rt0-wr0"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr1: level1-rt0-wr1 { + cell-index = <9>; + node-name = "level1-rt0-wr1"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr2: level1-rt0-wr2 { + cell-index = <10>; + node-name = "level1-rt0-wr2"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr3: level1-rt0-wr3 { + cell-index = <11>; + node-name = "level1-rt0-wr3"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_wr4: level1-rt0-wr4 { + cell-index = <12>; + node-name = "level1-rt0-wr4"; + parent-node = <&level2_rt0_wr>; + traffic-merge-type = + ; + }; + + level1_rt0_rd0: level1-rt0-rd0 { + cell-index = <13>; + node-name = "level1-rt0-rd0"; + parent-node = <&level2_rt0_rd>; + traffic-merge-type = + ; + }; + + level1_nrt0_wr0: level1-nrt0-wr0 { + cell-index = <14>; + node-name = "level1-nrt0-wr0"; + parent-node = <&level2_nrt0_wr>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd0: level1-nrt0-rd0 { + cell-index = <15>; + node-name = "level1-nrt0-rd0"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd1: level1-nrt0-rd1 { + cell-index = <16>; + node-name = "level1-nrt0-rd1"; + parent-node = <&level2_nrt0_rd>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ife0_ubwc_wr: ife0-ubwc-wr { + cell-index = <17>; + node-name = "ife0-ubwc-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife1_ubwc_wr: ife1-ubwc-wr { + cell-index = <18>; + node-name = "ife1-ubwc-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife2_ubwc_wr: ife2-ubwc-wr { + cell-index = <19>; + node-name = "ife2-ubwc-wr"; + client-name = "ife2"; + traffic-data = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr0>; + }; + + ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { + cell-index = <20>; + node-name = "ife0-rdi-pixel-raw-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { + cell-index = <21>; + node-name = "ife1-rdi-pixel-raw-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife2_rdi_pixel_raw_wr: ife2-rdi-pixel-raw-wr { + cell-index = <22>; + node-name = "ife2-rdi-pixel-raw-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + sfe0_rdi_stats_nrdi_wr: sfe0-rdi-stats-nrdi-wr { + cell-index = <23>; + node-name = "sfe0-rdi-stats-nrdi-wr"; + client-name = "sfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + sfe1_rdi_stats_nrdi_wr: sfe1-rdi-stats-nrdi-wr { + cell-index = <24>; + node-name = "sfe1-rdi-stats-nrdi-wr"; + client-name = "sfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr1>; + }; + + custom0_wr: custom0-wr { + cell-index = <25>; + node-name = "custom0-wr"; + client-name = "custom0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr1>; + }; + + ife0_pdaf_wr: ife0-pdaf-wr { + cell-index = <26>; + node-name = "ife0-pdaf-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife1_pdaf_wr: ife1-pdaf-wr { + cell-index = <27>; + node-name = "ife1-pdaf-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife2_pdaf_wr: ife2-pdaf-wr { + cell-index = <28>; + node-name = "ife2-pdaf-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr2>; + }; + + ife0_linear_stats_wr: ife0-linear-stats-wr { + cell-index = <29>; + node-name = "ife0-linear-stats-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr3>; + }; + + ife1_linear_stats_wr: ife1-linear-stats-wr { + cell-index = <30>; + node-name = "ife1-linear-stats-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr3>; + }; + + ife2_linear_stats_wr: ife2-linear-stats-wr { + cell-index = <31>; + node-name = "ife2-linear-stats-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level2_rt0_wr>; + }; + + custom1_wr: custom1-wr { + cell-index = <32>; + node-name = "custom1-wr"; + client-name = "custom1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_wr4>; + }; + + ife7_rdi_stats_pixel_raw_wr: ife7-rdi-stats-pixel-raw-wr { + cell-index = <33>; + node-name = "ife7-rdi-stats-pixel-raw-wr"; + client-name = "ife7"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr4>; + }; + + ife6_rdi_stats_pixel_raw_wr: ife6-rdi-stats-pixel-raw-wr { + cell-index = <34>; + node-name = "ife6-rdi-stats-pixel-raw-wr"; + client-name = "ife6"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr4>; + }; + + ife5_rdi_stats_pixel_raw_wr: ife5-rdi-stats-pixel-raw-wr { + cell-index = <35>; + node-name = "ife5-rdi-stats-pixel-raw-wr"; + client-name = "ife5"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr4>; + }; + + ife4_rdi_stats_pixel_raw_wr: ife4-rdi-stats-pixel-raw-wr { + cell-index = <36>; + node-name = "ife4-rdi-stats-pixel-raw-wr"; + client-name = "ife4"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr4>; + }; + + ife3_rdi_stats_pixel_raw_wr: ife3-rdi-stats-pixel-raw-wr { + cell-index = <37>; + node-name = "ife3-rdi-stats-pixel-raw-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr4>; + }; + + sfe0_all_rd: sfe0-all-rd { + cell-index = <38>; + node-name = "sfe0-all-rd"; + client-name = "sfe0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + sfe1_all_rd: sfe1-all-rd { + cell-index = <39>; + node-name = "sfe1-all-rd"; + client-name = "sfe1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_rd0>; + }; + + custom0_rd: custom0-rd { + cell-index = <40>; + node-name = "custom0-rd"; + client-name = "custom0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd0>; + }; + + custom1_rd: custom1-rd { + cell-index = <41>; + node-name = "custom1-rd"; + client-name = "custom1"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd0>; + }; + + ipe0_all_wr: ipe0-all-wr { + cell-index = <42>; + node-name = "ipe0-all-wr"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level2_nrt0_wr>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <43>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_wr>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <44>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + jpeg_enc0_all_rd: jpeg-enc0-all-rd { + cell-index = <45>; + node-name = "jpeg-enc0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + jpeg_dma0_all_rd: jpeg-dma0-all-rd { + cell-index = <46>; + node-name = "jpeg-dma0-all-rd"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd0>; + }; + + jpeg_enc0_all_wr: jpeg-enc0-all-wr { + cell-index = <47>; + node-name = "jpeg-enc0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + jpeg_dma0_all_wr: jpeg-dma0-all-wr { + cell-index = <48>; + node-name = "jpeg-dma0-all-wr"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_wr0>; + }; + + ipe0_ref_rd: ipe0-ref-rd { + cell-index = <49>; + node-name = "ipe0-ref-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + ipe0_in_rd: ipe0-in-rd { + cell-index = <50>; + node-name = "ipe0-in-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_rd>; + }; + + rt_cdm0_all_rd: rt-cdm0-all-rd { + cell-index = <51>; + node-name = "rt-cdm0-all-rd"; + client-name = "rt-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + rt_cdm1_all_rd: rt-cdm1-all-rd { + cell-index = <52>; + node-name = "rt-cdm1-all-rd"; + client-name = "rt-cdm1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + rt_cdm2_all_rd: rt-cdm2-all-rd { + cell-index = <53>; + node-name = "rt-cdm2-all-rd"; + client-name = "rt-cdm2"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <54>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + ipe0_cdm_all_rd: ipe0-cdm-all-rd { + cell-index = <55>; + node-name = "ipe0-cdm-all-rd"; + client-name = "ipe0-cdm"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + bps0_cdm_all_rd: bps0-cdm-all-rd { + cell-index = <56>; + node-name = "bps0-cdm-all-rd"; + client-name = "bps0-cdm"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd1>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <57>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_rd>; + }; + }; + }; + + status = "ok"; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc"; + status = "ok"; + }; + + qcom,cpas-cdm0@ac24000 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm2_1"; + label = "cpas-cdm"; + reg = <0xac24000 0x400>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x24000>; + interrupt-names = "cpas-cdm"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cam_cc_slow_ahb_clk_src", + "cam_cc_cpas_ahb_clk"; + clocks = <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <80000000 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife3", "ife4", "ife5", "ife6", "ife7"; + config-fifo; + fifo-depths = <64 0 0 0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm0@ac25000 { + cell-index = <0>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac25000 0x400>; + reg-names = "rt-cdm0"; + reg-cam-base = <0x25000>; + interrupt-names = "rt-cdm0"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "cam_cc_cpas_ahb_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <80000000 0>, + <80000000 0>, + <80000000 0>, + <80000000 0>, + <80000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; + cdm-client-names = "ife0", "dualife0"; + config-fifo; + fifo-depths = <64 0 0 0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm1@ac26000 { + cell-index = <1>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac26000 0x400>; + reg-names = "rt-cdm1"; + reg-cam-base = <0x26000>; + interrupt-names = "rt-cdm1"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "cam_cc_cpas_ahb_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <80000000 0>, + <80000000 0>, + <80000000 0>, + <80000000 0>, + <80000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; + cdm-client-names = "ife1", "dualife1"; + config-fifo; + fifo-depths = <64 0 0 0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm2@ac27000 { + cell-index = <2>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac27000 0x400>; + reg-names = "rt-cdm2"; + reg-cam-base = <0x27000>; + interrupt-names = "rt-cdm2"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "cam_cc_cpas_ahb_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = + <80000000 0>, + <80000000 0>, + <80000000 0>, + <80000000 0>, + <80000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; + cdm-client-names = "ife2", "dualife2"; + config-fifo; + fifo-depths = <64 0 0 0>; + single-context-cdm; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_sfe0: qcom,sfe0@ac9e000 { + cell-index = <0>; + compatible = "qcom,sfe680"; + reg-names = "sfe0", "rt_wrapper"; + reg = <0xac9e000 0x8000>, + <0xac62000 0x64000>; + reg-cam-base = <0x9e000 0x62000>; + interrupt-names = "sfe"; + interrupts = ; + regulator-names = "gdsc", "sfe0"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + sfe0-supply = <&cam_cc_sfe_0_gdsc>; + clock-names = + "cam_cc_fast_ahb_clk_src", + "sfe_0_fast_ahb", + "sfe_0_clk_src", + "sfe_0_clk", + "cam_cc_cpas_sfe_0_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_SFE_0_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_SFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_SFE_0_CLK>, + <&clock_camcc CAM_CC_CPAS_SFE_0_CLK>; + clock-rates = + <100000000 0 432000000 0 0>, + <200000000 0 594000000 0 0>, + <300000000 0 675000000 0 0>, + <400000000 0 785000000 0 0>, + <400000000 0 785000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "sfe_0_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_sfe1: qcom,sfe1@aca6000 { + cell-index = <1>; + compatible = "qcom,sfe680"; + reg-names = "sfe1", "rt_wrapper"; + reg = <0xaca6000 0x8000>, + <0xac62000 0x64000>; + reg-cam-base = <0xa6000 0x62000>; + interrupt-names = "sfe"; + interrupts = ; + regulator-names = "gdsc", "sfe1"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + sfe1-supply = <&cam_cc_sfe_1_gdsc>; + clock-names = + "cam_cc_fast_ahb_clk_src", + "sfe_1_fast_ahb", + "sfe_1_clk_src", + "sfe_1_clk", + "cam_cc_cpas_sfe_1_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_SFE_1_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_SFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_SFE_1_CLK>, + <&clock_camcc CAM_CC_CPAS_SFE_1_CLK>; + clock-rates = + <100000000 0 432000000 0 0>, + <200000000 0 594000000 0 0>, + <300000000 0 675000000 0 0>, + <400000000 0 785000000 0 0>, + <400000000 0 785000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "sfe_1_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_csid0: qcom,csid0@acb7000 { + cell-index = <0>; + compatible = "qcom,csid680"; + reg-names = "csid", "csid_top", "rt_wrapper"; + reg = <0xacb7000 0xd00>, + <0xacb6000 0x1000>, + <0xac62000 0x64000>; + reg-cam-base = <0xb7000 0xb6000 0x62000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "csid_clk_src", + "csid_clk", + "cphy_rx_clk_src", + "csiphy_rx_clk", + "cam_cc_fast_ahb_clk_src", + "cpas_fast_ahb"; + clocks = + <&clock_camcc CAM_CC_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,ife0@ac62000 { + cell-index = <0>; + compatible = "qcom,vfe680"; + reg-names = "ife", "cam_camnoc", "rt_wrapper"; + reg = <0xac62000 0xf000>, + <0xac19000 0x9000>, + <0xac62000 0x64000>; + reg-cam-base = <0x62000 0x19000 0x62000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "gdsc", "ife0"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "cam_cc_fast_ahb_clk_src", + "ife_0_fast_ahb", + "ife_0_clk_src", + "ife_0_clk", + "cam_cc_cpas_ife_0_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_0_CLK>; + clock-rates = + <100000000 0 432000000 0 0>, + <200000000 0 594000000 0 0>, + <300000000 0 675000000 0 0>, + <400000000 0 785000000 0 0>, + <400000000 0 785000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_0_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <594000000>; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <16 28 20 8>; + status = "ok"; + }; + + cam_csid1: qcom,csid1@acb9000 { + cell-index = <1>; + compatible = "qcom,csid680"; + reg-names = "csid", "csid_top", "rt_wrapper"; + reg = <0xacb9000 0xd00>, + <0xacb6000 0x1000>, + <0xac62000 0x64000>; + reg-cam-base = <0xb9000 0xb6000 0x62000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "csid_clk_src", + "csid_clk", + "cphy_rx_clk_src", + "csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,ife1@ac71000 { + cell-index = <1>; + compatible = "qcom,vfe680"; + reg-names = "ife", "cam_camnoc", "rt_wrapper"; + reg = <0xac71000 0xf000>, + <0xac19000 0x9000>, + <0xac62000 0x64000>; + reg-cam-base = <0x71000 0x19000 0x62000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "gdsc", "ife1"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "cam_cc_fast_ahb_clk_src", + "ife_1_fast_ahb", + "ife_1_clk_src", + "ife_1_clk", + "cam_cc_cpas_ife_1_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_1_CLK>; + clock-rates = + <100000000 0 432000000 0 0>, + <200000000 0 594000000 0 0>, + <300000000 0 675000000 0 0>, + <400000000 0 785000000 0 0>, + <400000000 0 785000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_1_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <594000000>; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <17 29 21 9>; + status = "ok"; + }; + + cam_csid2: qcom,csid2@acbb000 { + cell-index = <2>; + compatible = "qcom,csid680"; + reg-names = "csid", "csid_top", "rt_wrapper"; + reg = <0xacbb000 0xd00>, + <0xacb6000 0x1000>, + <0xac62000 0x64000>; + reg-cam-base = <0xbb000 0xb6000 0x62000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "csid_clk_src", + "csid_clk", + "cphy_rx_clk_src", + "csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>, + <480000000 0 480000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe2: qcom,ife2@ac80000 { + cell-index = <2>; + compatible = "qcom,vfe680"; + reg-names = "ife", "cam_camnoc", "rt_wrapper"; + reg = <0xac80000 0xf000>, + <0xac19000 0x9000>, + <0xac62000 0x64000>; + reg-cam-base = <0x80000 0x19000 0x62000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "gdsc", "ife2"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "cam_cc_fast_ahb_clk_src", + "ife_2_fast_ahb", + "ife_2_clk_src", + "ife_2_clk", + "cam_cc_cpas_ife_2_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_2_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_2_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_2_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_2_CLK>; + clock-rates = + <100000000 432000000 0 0>, + <200000000 594000000 0 0>, + <300000000 675000000 0 0>, + <400000000 785000000 0 0>, + <400000000 785000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_2_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_2_DSP_CLK>; + clock-rates-option = <594000000>; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <18 30 22 10>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0@acc6000 { + cell-index = <3>; + compatible = "qcom,csid-lite680"; + reg-names = "csid-lite"; + reg = <0xacc6000 0xa00>; + reg-cam-base = <0xc6000>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "ife_lite_ahb", + "ife_lite_csid_clk_src", + "ife_lite_csid_clk", + "ife_lite_cphy_rx_clk_src", + "ife_lite_cphy_rx_clk", + "ife_lite_clk_src", + "ife_lite_clk", + "cam_cc_cpas_ife_lite_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_LITE_CLK>; + clock-rates = + <80000000 0 400000000 0 400000000 0 400000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_lite_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,ife-lite0@acc6000 { + cell-index = <3>; + compatible = "qcom,vfe-lite680"; + reg-names = "ife-lite"; + reg = <0xacc6000 0x2800>; + reg-cam-base = <0xc6000>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "ife_lite_ahb", + "ife_lite_csid_clk_src", + "ife_lite_csid_clk", + "ife_lite_cphy_rx_clk_src", + "ife_lite_cphy_rx_clk", + "ife_lite_clk_src", + "ife_lite_clk", + "cam_cc_cpas_ife_lite_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_LITE_CLK>; + clock-rates = + <80000000 0 400000000 0 400000000 0 400000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_lite_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <0>; + status = "ok"; + }; + + cam_csid_lite1: qcom,csid-lite1@acca000 { + cell-index = <4>; + compatible = "qcom,csid-lite680"; + reg-names = "csid-lite"; + reg = <0xacca000 0xa00>; + reg-cam-base = <0xca000>; + interrupt-names = "csid-lite"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "ife_lite_ahb", + "ife_lite_csid_clk_src", + "ife_lite_csid_clk", + "ife_lite_cphy_rx_clk_src", + "ife_lite_cphy_rx_clk", + "ife_lite_clk_src", + "ife_lite_clk", + "cam_cc_cpas_ife_lite_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_LITE_CLK>; + clock-rates = + <80000000 0 400000000 0 400000000 0 400000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_lite_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite1: qcom,ife-lite1@acca000 { + cell-index = <4>; + compatible = "qcom,vfe-lite680"; + reg-names = "ife-lite"; + reg = <0xacca000 0x2800>; + reg-cam-base = <0xca000>; + interrupt-names = "ife-lite"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "ife_lite_ahb", + "ife_lite_csid_clk_src", + "ife_lite_csid_clk", + "ife_lite_cphy_rx_clk_src", + "ife_lite_cphy_rx_clk", + "ife_lite_clk_src", + "ife_lite_clk", + "cam_cc_cpas_ife_lite_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>, + <&clock_camcc CAM_CC_CPAS_IFE_LITE_CLK>; + clock-rates = + <80000000 0 400000000 0 400000000 0 400000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>, + <80000000 0 480000000 0 480000000 0 480000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_lite_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <1>; + status = "ok"; + }; + + cam_csiphy_tpg0: qcom,tpg0@acf6000 { + cell-index = <0>; + compatible = "qcom,tpg103"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xacf6000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf6000 0x13000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg0"; + interrupts = ; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <480000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg1: qcom,tpg1@acf7000 { + cell-index = <1>; + compatible = "qcom,tpg103"; + reg-names = "tpg1", "cam_cpas_top"; + reg = <0xacf7000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf7000 0x13000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg1"; + interrupts = ; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <480000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg2: qcom,tpg2@acf8000 { + cell-index = <2>; + compatible = "qcom,tpg103"; + reg-names = "tpg2", "cam_cpas_top"; + reg = <0xacf8000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf8000 0x13000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg2"; + interrupts = ; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <480000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,lx7", + "qcom,ipe0", + "qcom,bps"; + num-lx7 = <1>; + num-ipe = <1>; + num-bps = <1>; + status = "ok"; + icp_pc_en; + ipe_bps_pc_en; + }; + + cam_lx7: qcom,lx7 { + cell-index = <0>; + compatible = "qcom,cam-lx7"; + reg = <0xac01000 0x400>, + <0xac01800 0x400>; + reg-names = "lx7_csr", "lx7_cirq"; + reg-cam-base = <0x1000 0x1800>; + interrupt-names = "lx7"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "icp_clk_src", + "icp_clk"; + clocks = + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; + clock-rates = + <400000000 0>, + <480000000 0>, + <600000000 0>, + <600000000 0>, + <600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "icp_clk_src"; + fw_name = "CAMERA_ICP.elf"; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + /* TO-DO write cfg redundant for BUS 2.0 architecture*/ + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; + /* TO-DO write cfg redundant for BUS 2.0 architecture*/ + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; + }; + + cam_ipe0: qcom,ipe0@ac42000 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac42000 0x16000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x42000>; + regulator-names = "gdsc", "ipe0-vdd"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "ipe_nps_ahb_clk", + "cam_cc_fast_ahb_clk_src", + "ipe_nps_fast_ahb_clk", + "ipe_pps_fast_ahb_clk", + "ipe_nps_clk_src", + "ipe_nps_clk"; + "ipe_pps_clk", + "cam_cc_cpas_ipe_nps_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_PPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_NPS_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_CLK>, + <&clock_camcc CAM_CC_IPE_PPS_CLK>, + <&clock_camcc CAM_CC_CPAS_IPE_NPS_CLK>; + + clock-rates = + <80000000 0 100000000 0 0 364000000 0 0 0>, + <80000000 0 200000000 0 0 500000000 0 0 0>, + <80000000 0 300000000 0 0 600000000 0 0 0>, + <80000000 0 400000000 0 0 700000000 0 0 0>, + <80000000 0 400000000 0 0 700000000 0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ipe_nps_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_bps: qcom,bps@ac2c000 { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac2c000 0x7800>; + reg-names = "bps_top"; + reg-cam-base = <0x2c000>; + regulator-names = "gdsc", "bps-vdd"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = + "cam_cc_slow_ahb_clk_src", + "bps_ahb_clk", + "cam_cc_fast_ahb_clk_src", + "bps_fast_ahb_clk", + "bps_clk_src", + "bps_clk", + "cam_cc_cpas_bps_clk"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_BPS_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_CLK>, + <&clock_camcc CAM_CC_CPAS_BPS_CLK>; + + clock-rates = + <80000000 0 100000000 0 200000000 0 0>, + <80000000 0 200000000 0 400000000 0 0>, + <80000000 0 300000000 0 480000000 0 0>, + <80000000 0 400000000 0 600000000 0 0>, + <80000000 0 400000000 0 600000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "bps_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc@ac2a000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac2a000 0x1000>; + reg-cam-base = <0x2a000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + clock-rates = <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma@ac2b000 { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac2b000 0x1000>; + reg-cam-base = <0x2b000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&clock_camcc CAM_CC_JPEG_CLK_SRC>, + <&clock_camcc CAM_CC_JPEG_CLK>; + clock-rates = <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; +}; From 3741580c6cf83e5895bbd1f5fd29de1040d05172 Mon Sep 17 00:00:00 2001 From: Jigarkumar Zala Date: Wed, 21 Oct 2020 17:30:24 -0700 Subject: [PATCH 129/190] dt-bindings: camera: Update dt string for res-mgr node Update the res-mgr dtsi string shared-gpios and shared-pinctrl-gpios to gpios-shared and gpios-shared-pinctrl to avoid predefined format. CRs-Fixed: 2804449 Change-Id: Ib6314481950307260c138c3874ba848b02e02fd8 --- bindings/msm-cam-cci.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index 1bac43461489..2219b5b8a2a3 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -253,13 +253,13 @@ sensor resource. Value type: Definition: Should be "qcom,cam-res-mgr". -- shared-gpios +- gpios-shared Usage: optional Value type: Definition: should contain the gpios which are used by two or more cameras, and these cameras may be opened together. -- shared-pinctrl-gpios +- gpios-shared-pinctrl Usage: optional Value type: Definition: should contain the pinctrl gpios which are used by two or more @@ -778,8 +778,8 @@ Example: qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; - shared-gpios = <18 19>; - shared-pinctrl-gpios = <408 409>; + gpios-shared = <18 19>; + gpios-shared-pinctrl = <408 409>; shared-pctrl-gpio-names = "mclk0", "mclk1"; pinctrl-names = "mclk0_active", "mclk0_suspend", "mclk1_active", "mclk1_suspend"; From fc59e78b053b67d9b514b46ebbb7dc6df7210c61 Mon Sep 17 00:00:00 2001 From: Vishal Verma Date: Wed, 14 Oct 2020 19:59:48 +0530 Subject: [PATCH 130/190] ARM: dts: msm: Add TPG2 to holi devicetree A separate dt node is added in holi devicetree for additional camera ID of different resolution. CRs-Fixed: 2810963 Change-Id: I6b10cb1c8d4874a57598bdc75554ab17efc753e9 --- holi-camera-sensor-mtp.dtsi | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/holi-camera-sensor-mtp.dtsi b/holi-camera-sensor-mtp.dtsi index 28ff2eb2567f..37fa0f292290 100644 --- a/holi-camera-sensor-mtp.dtsi +++ b/holi-camera-sensor-mtp.dtsi @@ -207,7 +207,7 @@ clock-rates = <19200000>; }; - /*TPG0*/ + /*TPG0*/ qcom,cam-tpg0 { cell-index = <4>; compatible = "qcom,cam-sensor"; @@ -230,7 +230,7 @@ clock-rates = <19200000>; }; - /*TPG1*/ + /*TPG1*/ qcom,cam-tpg1 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -253,6 +253,29 @@ clock-rates = <19200000>; }; + /*TPG2*/ + qcom,cam-tpg2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <6>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + }; &cam_cci1 { From 9fcadacc1fa0c01049043bd77bfa75dea086971b Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Tue, 20 Oct 2020 17:00:13 +0530 Subject: [PATCH 131/190] ARM: dts: msm: TPG DTSI changes for shima Add DTSI nodes to shima sensor DT to support TPG usecases. CRs-Fixed: 2819432 Change-Id: I16bd008c74369d53beaa36b78ffc7121b1482312 --- shima-camera-sensor-idp.dtsi | 84 ++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index ebc927d6d2b3..15e7cc5c1dbb 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -291,6 +291,90 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + /* TPG */ + qcom,cam-tpg0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* TPG */ + qcom,cam-tpg1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* TPG */ + qcom,cam-tpg2 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; }; &cam_cci1 { From 6197af3c9e97c7981a6bffc34ef4255eb15364b7 Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Fri, 6 Nov 2020 11:28:54 +0800 Subject: [PATCH 132/190] ARM: dts: msm: change roll angle for sensor node Need rotate all camera angle for lahaina HDK platform. Change-Id: I4cf2c2a864cc945c1439af83019210535f3331d0 CRs-Fixed: 2813829 --- lahaina-camera-sensor-hdk.dtsi | 176 +++++++++++++++++++++++++++++++++ 1 file changed, 176 insertions(+) create mode 100644 lahaina-camera-sensor-hdk.dtsi diff --git a/lahaina-camera-sensor-hdk.dtsi b/lahaina-camera-sensor-hdk.dtsi new file mode 100644 index 000000000000..4e52cd8ddfe0 --- /dev/null +++ b/lahaina-camera-sensor-hdk.dtsi @@ -0,0 +1,176 @@ +&cam_cci0 { +/delete-node/ qcom,cam-sensor0; +/delete-node/ qcom,cam-sensor1; + + qcom,cam-sensor0 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <0>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l4>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor1 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <0>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l3>; + cam_v_custom1-supply = <&pm8008i_l5>; + cam_vdig-supply = <&pm8008i_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1050000 0 3200000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 16 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { +/delete-node/ qcom,cam-sensor2; +/delete-node/ qcom,cam-sensor5; + + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <0>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008i_l6>; + cam_vdig-supply = <&pm8008i_l2>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 102 0>, + <&tlmm 106 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <0>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From 3f07278d9a4ef9de237800f6b965dac63f116d06 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Fri, 23 Oct 2020 17:41:10 +0530 Subject: [PATCH 133/190] ARM: dts: msm: Remove cci3 gpios for holi This change removes cci3 gpios from holi camera as now cci3 GPIOs are general purpose. CRs-Fixed: 2814109 Change-Id: Ie61ff9f3ec1d685b9722de076b55c3f566ca0e15 --- holi-camera.dtsi | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/holi-camera.dtsi b/holi-camera.dtsi index 71058be5ad19..5efce1f64315 100644 --- a/holi-camera.dtsi +++ b/holi-camera.dtsi @@ -258,18 +258,14 @@ clock-cntl-level = "svs"; clock-rates = <0 37500000>; pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cci2_active &cci3_active>; - pinctrl-1 = <&cci2_suspend &cci3_suspend>; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; gpios = <&tlmm 43 0>, - <&tlmm 44 0>, - <&tlmm 2 0>, - <&tlmm 3 0>; - gpio-req-tbl-num = <0 1 2 3>; - gpio-req-tbl-flags = <1 1 1 1>; + <&tlmm 44 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; gpio-req-tbl-label = "CCI_I2C_DATA2", - "CCI_I2C_CLK2", - "CCI_I2C_DATA3", - "CCI_I2C_CLK3"; + "CCI_I2C_CLK2"; i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { hw-thigh = <201>; From 27ef9cd6ac85348b53e7fe882328979e618ac183 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 12 Nov 2020 12:42:07 +0530 Subject: [PATCH 134/190] ARM: dts: msm: Add Vaf in sensor node for target holi This change adds VAF support in holi camera devicetree as VAF is now added as part of 3p9 sensor powerup sequence. CRs-Fixed: 2800060 External Impact: No Change-Id: I28ce62a003897285367746425c4354b27be8a61b --- holi-camera-sensor-cdp.dtsi | 9 +++++---- holi-camera-sensor-mtp.dtsi | 9 +++++---- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/holi-camera-sensor-cdp.dtsi b/holi-camera-sensor-cdp.dtsi index 9b77eeab3b35..3ec4cef49bd1 100644 --- a/holi-camera-sensor-cdp.dtsi +++ b/holi-camera-sensor-cdp.dtsi @@ -133,15 +133,16 @@ eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; cam_vdig-supply = <&L2P>; cam_clk-supply = <&gcc_camss_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; - rgltr-load-current = <120000 80000 1200000 0>; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active diff --git a/holi-camera-sensor-mtp.dtsi b/holi-camera-sensor-mtp.dtsi index 37fa0f292290..39c9f5cdbdc2 100644 --- a/holi-camera-sensor-mtp.dtsi +++ b/holi-camera-sensor-mtp.dtsi @@ -133,15 +133,16 @@ eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; cam_vdig-supply = <&L2P>; cam_clk-supply = <&gcc_camss_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; - rgltr-load-current = <120000 80000 1200000 0>; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active From ea307b42500a2b241665ad19d3bfd2ad778d5281 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Tue, 24 Nov 2020 15:00:35 +0530 Subject: [PATCH 135/190] dt-bindings: camera: Add compatible string for VFE165 and CSID165 Add bindings support for CSID165 and VFE165. CRs-Fixed: 2824629 Change-Id: I2453c2594856ebe298d6532bef7d40fc79b5dec5 --- bindings/msm-cam-ife-csid.txt | 7 ++++--- bindings/msm-cam-vfe.txt | 7 ++++--- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index 3230682d84b9..4fb11f4325ca 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -22,9 +22,10 @@ First Level Node - CAM IFE CSID device Value type: Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", "qcom,csid175_200", "qcom,csid480", "qcom,csid580", "qcom,csid680", - "qcom,csid-lite170", "qcom,csid-lite175", "qcom,csid-lite480", - "qcom,csid-custom480", "qcom,csid-lite580", "qcom,csid-custom580", - "qcom,csid-lite680" or "qcom,csid-custom680". + "qcom,csid165_204", "qcom,csid-lite170", "qcom,csid-lite175", + "qcom,csid-lite480", "qcom,csid-custom480", "qcom,csid-lite580", + "qcom,csid-custom580", "qcom,csid-lite680" or "qcom,csid-custom680", + "qcom,csid-lite165". - reg-names Usage: required diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index 3689327e26fb..5ddac8b02dec 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -24,9 +24,10 @@ Required properties: Definition: Should specify the compatibility string for matching the driver. e.g. "qcom,vfe680", "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", - "qcom,vfe170", "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe-lite680", - "qcom,vfe-lite580", "qcom,vfe-lite480", "qcom,vfe-lite175", - "qcom,vfe-lite175_130" or "qcom,vfe-lite170". + "qcom,vfe170", "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe165_160", + "qcom,vfe-lite680", "qcom,vfe-lite580", "qcom,vfe-lite480", + "qcom,vfe-lite175", "qcom,vfe-lite175_130" or "qcom,vfe-lite170", + "qcom,vfe-lite165". - reg-names Usage: required From de902159cd123f9f847c575475778ef71000d8a7 Mon Sep 17 00:00:00 2001 From: Yulei Yao Date: Thu, 19 Nov 2020 15:06:02 +0800 Subject: [PATCH 136/190] ARM: dts: msm: Add Vaf in sensor node 3p9 for QRD This change adds VAF support in holi QRD camera devicetree as VAF is now added as part of 3p9 sensor powerup sequence. CRs-Fixed: 2819611 External Impact: No. Change-Id: I38db15079470579820016fc5aafddf6e6cf07aec --- holi-camera-sensor-qrd.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/holi-camera-sensor-qrd.dtsi b/holi-camera-sensor-qrd.dtsi index da670ed5d64d..d30410adfd32 100644 --- a/holi-camera-sensor-qrd.dtsi +++ b/holi-camera-sensor-qrd.dtsi @@ -133,15 +133,16 @@ eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; cam_vdig-supply = <&L2P>; cam_clk-supply = <&gcc_camss_top_gdsc>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2880000 1056000 0>; - rgltr-max-voltage = <1800000 2880000 1056000 0>; - rgltr-load-current = <120000 80000 1200000 0>; + rgltr-min-voltage = <1800000 2880000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2880000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active From 0cfd04994ff23b62fdefba93aff90840e1b09077 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Mon, 16 Nov 2020 02:19:49 +0530 Subject: [PATCH 137/190] ARM: dts: msm: Add camera device tree support for Yupik camera Add ICP, IPE, BPS, CDM, SMMU, JPEG, IFE, CSID, LRME and CPAS nodes for Yupik camera. CRs-Fixed: 2824629 Change-Id: I003e892f7348d40542ebefec1ddd2205c57cc9dc --- yupik-camera.dtsi | 1279 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1279 insertions(+) create mode 100644 yupik-camera.dtsi diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi new file mode 100644 index 000000000000..95230cd8ae4e --- /dev/null +++ b/yupik-camera.dtsi @@ -0,0 +1,1279 @@ +#include + +&soc { + + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + } + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x4E0>, + <&apps_smmu 0x820 0x4E0>, + <&apps_smmu 0x840 0x4E0>, + <&apps_smmu 0x860 0x4E0>, + <&apps_smmu 0x880 0x4E0>, + <&apps_smmu 0x8A0 0x4E0>, + <&apps_smmu 0x8C0 0x4E0>, + <&apps_smmu 0x8E0 0x4E0>, + <&apps_smmu 0xC00 0x4E0>, + <&apps_smmu 0xC20 0x4E0>, + <&apps_smmu 0xC40 0x4E0>, + <&apps_smmu 0xC60 0x4E0>, + <&apps_smmu 0xC80 0x4E0>, + <&apps_smmu 0xCA0 0x4E0>, + <&apps_smmu 0xCC0 0x4E0>, + <&apps_smmu 0xCE0 0x4E0>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + cam-smmu-label = "ife"; + multiple-client-devices; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x100000>; + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_jpeg { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x20C0 0x20>, + <&apps_smmu 0x20E0 0x20>; + cam-smmu-label = "jpeg"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + jpeg_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x100000>; + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_icp_fw { + compatible = "qcom,msm-cam-smmu-fw-dev"; + label="icp"; + memory-region = <&pil_camera_mem>; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2000 0x20>, + <&apps_smmu 0x2020 0x20>, + <&apps_smmu 0x2062 0x0>, + <&apps_smmu 0x2080 0x20>, + <&apps_smmu 0x20A0 0x20>, + <&apps_smmu 0x2140 0x0>; + cam-smmu-label = "icp"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + iova-region-discard = <0xdff00000 0x300000>; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-firmware { + /* Firmware region is 5MB */ + iova-region-name = "firmware"; + iova-region-start = <0x0>; + iova-region-len = <0x500000>; + iova-region-id = <0x0>; + status = "ok"; + }; + + iova-mem-region-shared { + /* Shared region is 150MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x9600000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-secondary-heap { + /* Secondary heap region is 1MB long */ + iova-region-name = "secheap"; + iova-region-start = <0x10a00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x4>; + status = "ok"; + }; + + iova-mem-region-io { + /* IO region is approximately 3.7 GB */ + iova-region-name = "io"; + iova-region-start = <0x10c00000>; + iova-region-len = <0xee300000>; + iova-region-id = <0x3>; + iova-region-discard = <0xdff00000 0x300000>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + iova-region-start = <0x10b00000>; + iova-region-len = <0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2040 0x0>; + cam-smmu-label = "cpas-cdm"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x100000>; + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + cam-smmu-label = "cam-secure"; + qcom,secure-cb; + }; + + msm_cam_smmu_lrme { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x2100 0x20>, + <&apps_smmu 0x2120 0x20>; + cam-smmu-label = "lrme"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + lrme_iova_mem_map: iova-mem-map { + iova-mem-region-shared { + /* Shared region is 100MB long */ + iova-region-name = "shared"; + iova-region-start = <0x7400000>; + iova-region-len = <0x6400000>; + iova-region-id = <0x1>; + status = "ok"; + }; + /* IO region is approximately 3.3 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x100000>; + iova-region-len = <0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc", + "lrmecdm"; + status = "ok"; + }; + + qcom,cpas-cdm0 { + cell-index = <0>; + compatible = "qcom,cam170-cpas-cdm0"; + label = "cpas-cdm"; + reg = <0xac48000 0x1000>; + reg-names = "cpas-cdm"; + reg-cam-base = <0x48000>; + interrupts = ; + interrupt-names = "cpas-cdm"; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cam_cc_cpas_slow_ahb_clk", + "cam_cc_cpas_ahb_clk"; + clocks = <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>; + clock-rates = <0 0>; + clock-cntl-level = "svs"; + cdm-client-names = "ife3", "ife4", "dualife"; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_csid0: qcom,csid0 { + cell-index = <0>; + compatible = "qcom,csid165_204"; + reg-names = "csid"; + reg = <0xacb3000 0x1000>; + reg-cam-base = <0xb3000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <300000000 0 0 0 380000000 0 0>, + <400000000 0 0 0 510000000 0 0>, + <400000000 0 0 0 637000000 0 0>, + <400000000 0 0 0 760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,vfe0 { + cell-index = <0>; + compatible = "qcom,vfe165_160"; + reg-names = "ife"; + reg = <0xacaf000 0x5200>; + reg-cam-base = <0xaf000>; + interrupt-names = "ife0"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>; + clock-rates = + <380000000 0 0>, + <510000000 0 0>, + <637000000 0 0>, + <760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <760000000>; + cam_hw_pid = <24 8>; + status = "ok"; + }; + + cam_csid1: qcom,csid1 { + cell-index = <1>; + compatible = "qcom,csid165_204"; + reg-names = "csid"; + reg = <0xacba000 0x1000>; + reg-cam-base = <0xba000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <300000000 0 0 0 380000000 0 0>, + <400000000 0 0 0 510000000 0 0>, + <400000000 0 0 0 637000000 0 0>, + <400000000 0 0 0 760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,vfe1 { + cell-index = <1>; + compatible = "qcom,vfe165_160"; + reg-names = "ife"; + reg = <0xacb6000 0x5200>; + reg-cam-base = <0xb6000>; + interrupt-names = "ife1"; + interrupts = ; + regulator-names = "camss", "ife1"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife1-supply = <&cam_cc_ife_1_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>; + clock-rates = + <380000000 0 0>, + <510000000 0 0>, + <637000000 0 0>, + <760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_1_DSP_CLK>; + clock-rates-option = <760000000>; + cam_hw_pid = <25 9>; + status = "ok"; + }; + + cam_csid2: qcom,csid2 { + cell-index = <2>; + compatible = "qcom,csid165_204"; + reg-names = "csid"; + reg = <0x0acc1000 0x1000>; + reg-cam-base = <0xc1000>; + interrupt-names = "csid2"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_2_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_2_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <300000000 0 0 0 380000000 0 0>, + <400000000 0 0 0 510000000 0 0>, + <400000000 0 0 0 637000000 0 0>, + <400000000 0 0 0 760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe2: qcom,vfe2 { + cell-index = <2>; + compatible = "qcom,vfe165_160"; + reg-names = "ife"; + reg = <0x0acbd000 0x5200>; + reg-cam-base = <0xbd000>; + interrupt-names = "ife2"; + interrupts = ; + regulator-names = "camss", "ife2"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk", + "ife_axi_clk"; + clocks = + <&camcc CAM_CC_IFE_2_CLK_SRC>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_AXI_CLK>; + clock-rates = + <380000000 0 0>, + <510000000 0 0>, + <637000000 0 0>, + <760000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&camcc CAM_CC_IFE_2_DSP_CLK>; + clock-rates-option = <760000000>; + cam_hw_pid = <3 10>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0 { + cell-index = <3>; + compatible = "qcom,csid-lite165"; + reg-names = "csid-lite"; + reg = <0xacc8000 0x1000>; + reg-cam-base = <0xc8000>; + interrupt-names = "csid-lite0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_0_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_0_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_0_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0>, + <400000000 0 0 0 400000000 0>, + <400000000 0 0 0 480000000 0>, + <400000000 0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,vfe-lite0 { + cell-index = <3>; + compatible = "qcom,vfe-lite165"; + reg-names = "ife-lite"; + reg = <0xacc4000 0x5000>; + reg-cam-base = <0xc4000>; + interrupt-names = "ife-lite0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_0_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_0_CLK>; + clock-rates = + <320000000 0>, + <400000000 0>, + <480000000 0>, + <600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <11>; + status = "ok"; + }; + + cam_csid_lite1: qcom,csid-lite1 { + cell-index = <4>; + compatible = "qcom,csid-lite165"; + reg-names = "csid-lite"; + reg = <0x0accf000 0x1000>; + reg-cam-base = <0xcf000>; + interrupt-names = "csid-lite1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_csid_clk_src", + "ife_csid_clk", + "cphy_rx_clk_src", + "ife_cphy_rx_clk", + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_1_CSID_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_1_CSID_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_1_CLK>; + clock-rates = + <300000000 0 0 0 320000000 0>, + <400000000 0 0 0 400000000 0>, + <400000000 0 0 0 480000000 0>, + <400000000 0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite1: qcom,vfe-lite1 { + cell-index = <4>; + compatible = "qcom,vfe-lite165"; + reg-names = "ife-lite"; + reg = <0x0accb000 0x5000>; + reg-cam-base = <0xcb000>; + interrupt-names = "ife-lite1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "ife_clk_src", + "ife_clk"; + clocks = + <&camcc CAM_CC_IFE_LITE_1_CLK_SRC>, + <&camcc CAM_CC_IFE_LITE_1_CLK>; + clock-rates = + <320000000 0>, + <400000000 0>, + <480000000 0>, + <600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + src-clock-name = "ife_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <12>; + status = "ok"; + }; + + qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", + "qcom,ipe", + "qcom,bps"; + num-a5 = <1>; + num-ipe = <1>; + num-bps = <1>; + icp_pc_en; + status = "ok"; + }; + + cam_a5: qcom,a5 { + cell-index = <0>; + compatible = "qcom,cam-a5"; + reg = <0xac00000 0x6000>, + <0xac10000 0x8000>, + <0xac18000 0x3000>; + reg-names = "a5_qgic", "a5_sierra", "a5_csr"; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; + interrupt-names = "a5"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_ICP_CLK_SRC>, + <&camcc CAM_CC_ICP_CLK>; + clock-rates = + <100000000 0 400000000 0>, + <200000000 0 400000000 0>, + <300000000 0 600000000 0>, + <400000000 0 600000000 0>, + <400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + fw_name = "CAMERA_ICP_170.elf"; + ubwc-ipe-fetch-cfg = <0x7073 0x707b>; + ubwc-ipe-write-cfg = <0x161cf 0x161ef>; + ubwc-bps-fetch-cfg = <0x7073 0x707b>; + ubwc-bps-write-cfg = <0x161cf 0x161ef>; + /* qos-val = <0x00000A0A> */ + status = "ok"; + }; + + cam_ipe: qcom,ipe0 { + cell-index = <0>; + compatible = "qcom,cam-ipe"; + reg = <0xac87000 0xa000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x87000>; + regulator-names = "ipe0-vdd"; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "ipe_0_ahb_clk", + "ipe_0_areg_clk", + "ipe_0_axi_clk", + "ipe_0_clk_src", + "ipe_0_clk"; + src-clock-name = "ipe_0_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_IPE_0_AHB_CLK>, + <&camcc CAM_CC_IPE_0_AREG_CLK>, + <&camcc CAM_CC_IPE_0_AXI_CLK>, + <&camcc CAM_CC_IPE_0_CLK_SRC>, + <&camcc CAM_CC_IPE_0_CLK>; + + clock-rates = + <0 0 0 300000000 0>, + <0 0 0 430000000 0>, + <0 0 0 520000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + cam_bps: qcom,bps { + cell-index = <0>; + compatible = "qcom,cam-bps"; + reg = <0xac6f000 0x8000>; + reg-names = "bps_top"; + reg-cam-base = <0x6f000>; + regulator-names = "bps-vdd"; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = + "bps_ahb_clk", + "bps_areg_clk", + "bps_axi_clk", + "bps_clk_src", + "bps_clk"; + src-clock-name = "bps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&camcc CAM_CC_BPS_AHB_CLK>, + <&camcc CAM_CC_BPS_AREG_CLK>, + <&camcc CAM_CC_BPS_AXI_CLK>, + <&camcc CAM_CC_BPS_CLK_SRC>, + <&camcc CAM_CC_BPS_CLK>; + + clock-rates = + <0 0 0 200000000 0>, + <0 0 0 400000000 0>, + <0 0 0 480000000 0>, + <0 0 0 600000000 0>, + <0 0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; + status = "ok"; + }; + + qcom,cam-jpeg { + compatible = "qcom,cam-jpeg"; + compat-hw-name = "qcom,jpegenc", + "qcom,jpegdma"; + num-jpeg-enc = <1>; + num-jpeg-dma = <1>; + status = "ok"; + }; + + cam_jpeg_enc: qcom,jpegenc { + cell-index = <0>; + compatible = "qcom,cam_jpeg_enc"; + reg-names = "jpege_hw"; + reg = <0xac4e000 0x4000>; + reg-cam-base = <0x4e000>; + interrupt-names = "jpeg"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegenc_clk_src", + "jpegenc_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegenc_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + cam_jpeg_dma: qcom,jpegdma { + cell-index = <0>; + compatible = "qcom,cam_jpeg_dma"; + reg-names = "jpegdma_hw"; + reg = <0xac52000 0x4000>; + reg-cam-base = <0x52000>; + interrupt-names = "jpegdma"; + interrupts = ; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "jpegdma_clk_src", + "jpegdma_clk"; + clocks = + <&camcc CAM_CC_JPEG_CLK_SRC>, + <&camcc CAM_CC_JPEG_CLK>; + + clock-rates = <600000000 0>; + src-clock-name = "jpegdma_clk_src"; + clock-cntl-level = "nominal"; + status = "ok"; + }; + + qcom,cam-lrme { + compatible = "qcom,cam-lrme"; + arch-compat = "lrme"; + status = "ok"; + }; + + cam_lrme: qcom,lrme { + cell-index = <0>; + compatible = "qcom,lrme"; + reg-names = "lrme"; + reg = <0xac6b000 0x1000>; + reg-cam-base = <0x6b000>; + interrupt-names = "lrme"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "lrme_clk_src", + "lrme_clk"; + clocks = <&camcc CAM_CC_LRME_CLK_SRC>, + <&camcc CAM_CC_LRME_CLK>; + clock-rates = <240000000 240000000>, + <300000000 300000000>, + <320000000 320000000>, + <400000000 400000000>, + <400000000 400000000>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "lrme_clk_src"; + status = "ok"; + }; + + qcom,cam-cpas { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0x0ac40000 0x1000>, + <0x0ac9f000 0x10000>; + reg-cam-base = <0x40000 0x9f000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "gcc_ahb_clk", + "gcc_axi_hf_clk", + "gcc_axi_sf_clk", + "slow_ahb_clk_src", + "cpas_ahb_clk", + "camnoc_axi_clk_src", + "camnoc_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>; + src-clock-name = "camnoc_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0>, + <0 0 0 80000000 0 150000000 0>, + <0 0 0 80000000 0 240000000 0>, + <0 0 0 80000000 0 320000000 0>, + <0 0 0 80000000 0 400000000 0>, + <0 0 0 80000000 0 480000000 0>, + <0 0 0 80000000 0 480000000 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", + "svs_l1", "nominal", "turbo", "turbo_l1"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_CAMERA_CFG>; + cam-ahb-num-cases = <7>; + cam-ahb-bw-KBps = + <0 0>, <0 76800>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", + "lowsvs", "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo_l1"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", + "csid0", "csid1", "csid2", "csid3", "csid4", + "ife0", "ife1", "ife2", "ife3", "ife4", + "ipe0", "cam-cdm-intf0", "cpas-cdm0", + "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", + "lrmecpas0"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt0_wr_sum: level3-rt0-wr-sum { + cell-index = <0>; + node-name = "level3-rt0-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_HF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmss_noc MASTER_CAMNOC_SF + &mc_virt SLAVE_EBI1>; + }; + }; + + level3_nrt1_rd_sum: level3-nrt1-rd-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_icp"; + interconnects = + <&mmss_noc MASTER_CAMNOC_ICP + &mc_virt SLAVE_EBI1>; + }; + }; + }; + + level2-nodes { + level-index = <3>; + camnoc-max-needed; + level2_rt0_write0: level2-rt0-write0 { + cell-index = <3>; + node-name = "level2-rt0-write0"; + parent-node = <&level3_rt0_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt1_write0: level2-rt1-write0 { + cell-index = <4>; + node-name = "level2-rt1-write0"; + parent-node = <&level3_rt0_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_write0: level2-nrt0-write0 { + cell-index = <5>; + node-name = "level2-nrt0-write0"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt0_read0: level2-nrt0-read0 { + cell-index = <6>; + node-name = "level2-nrt0-read0"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt1_read0: level2-nrt1-read0 { + cell-index = <7>; + node-name = "level2-nrt1-read0"; + parent-node = <&level3_nrt1_rd_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_write0: level1-rt0-write0 { + cell-index = <8>; + node-name = "level1-rt0-write0"; + parent-node = <&level2_rt0_write0>; + traffic-merge-type = + ; + }; + + level1_rt1_write0: level1-rt1-write0 { + cell-index = <9>; + node-name = "level1-rt1-write0"; + parent-node = <&level2_rt1_write0>; + traffic-merge-type = + ; + }; + + level1_rt1_write1: level1-rt1-write1 { + cell-index = <10>; + node-name = "level1-rt1-write1"; + parent-node = <&level2_rt1_write0>; + traffic-merge-type = + ; + }; + + level1_nrt0_write0: level1-nrt0-write0 { + cell-index = <11>; + node-name = "level1-nrt0-write0"; + parent-node = <&level2_nrt0_write0>; + traffic-merge-type = + ; + }; + + level1_nrt0_read0: level1-nrt0-read0 { + cell-index = <12>; + node-name = "level1-nrt0-read0"; + parent-node = <&level2_nrt0_read0>; + traffic-merge-type = + ; + }; + + level1_nrt1_write0: level1-nrt1-write0 { + cell-index = <13>; + node-name = "level1-nrt1-write0"; + parent-node = <&level2_nrt0_write0>; + traffic-merge-type = + ; + }; + + level1_nrt1_read0: level1-nrt1-read0 { + cell-index = <14>; + node-name = "level1-nrt1-read0"; + parent-node = <&level2_nrt0_read0>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ife0_rdi_wr: ife0-rdi-wr { + cell-index = <16>; + node-name = "ife0-rdi-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife1_rdi_wr: ife1-rdi-wr { + cell-index = <17>; + node-name = "ife1-rdi-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife2_rdi_wr: ife2-rdi-wr { + cell-index = <18>; + node-name = "ife2-rdi-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife3_rdi_wr: ife3-rdi-wr { + cell-index = <19>; + node-name = "ife3-rdi-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife4_rdi_wr: ife4-rdi-wr { + cell-index = <20>; + node-name = "ife4-rdi-wr"; + client-name = "ife4"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_write0>; + }; + + ife0_pixelall_wr: ife0-pixelall-wr { + cell-index = <21>; + node-name = "ife0-pixelall-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_write0>; + }; + + ife1_pixelall_wr: ife1-pixelall-wr { + cell-index = <22>; + node-name = "ife1-pixelall-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_write0>; + }; + + ife2_pixelall_wr: ife2-pixelall-wr { + cell-index = <23>; + node-name = "ife2-pixelall-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt1_write1>; + }; + + ipe0_ref_wr: ipe0-ref-wr { + cell-index = <24>; + node-name = "ipe0-ref-wr"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <25>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + lrme0_all_wr: lrme0-all-wr { + cell-index = <26>; + node-name = "lrme0-all-wr"; + client-name = "lrmecpas0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_write0>; + }; + + ipe0_viddisp_wr: ipe0-viddisp-wr { + cell-index = <27>; + node-name = "ipe0-viddisp-wr"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_write0>; + }; + + ipe0_all_rd: ipe0-all-rd { + cell-index = <28>; + node-name = "ipe0-all-rd"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_read0>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <29>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_read0>; + }; + + lrme0_all_rd: lrme0-all-rd { + cell-index = <30>; + node-name = "lrme0-all-rd"; + client-name = "lrmecpas0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_read0>; + }; + + jpeg_enc0_all_wr: jpeg-enc0-all-wr { + cell-index = <31>; + node-name = "jpeg-enc0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_write0>; + }; + + jpeg_enc0_all_rd: jpeg-enc0-all-rd { + cell-index = <32>; + node-name = "jpeg-enc0-all-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_read0>; + }; + + jpeg_dma0_all_wr: jpeg-dma0-all-wr { + cell-index = <33>; + node-name = "jpeg-dma0-all-wr"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_write0>; + }; + + jpeg_dma0_all_rd: jpeg-dma0-all-rd { + cell-index = <34>; + node-name = "jpeg-dma0-all-rd"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_read0>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <35>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt0_read0>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <36>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt1_read0>; + }; + }; + }; + }; +}; From b1e880aad55173bbda5e93ddaaba18243d4d950e Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Mon, 7 Dec 2020 12:50:20 -0800 Subject: [PATCH 138/190] ARM: dts: msm: Update a5 QoS settings for Lahaina/Kona Configure the recommended bus access priorities for a5 core. CRs-Fixed: 2834780 Change-Id: I7b2a64873204e01b8b5a621f2de8de5e903b6388 --- kona-camera.dtsi | 1 + lahaina-camera.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index e0b496a0d8cd..e69dc26d740e 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1577,6 +1577,7 @@ ubwc-ipe-write-cfg = <0x161ef 0x1620f>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161ef 0x1620f>; + qos-val = <0x00000A0A>; status = "ok"; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 2d9e7599b366..5c273a422233 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1798,6 +1798,7 @@ ubwc-ipe-write-cfg = <0x161ef 0x1620f>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161ef 0x1620f>; + qos-val = <0x00000A0A>; status = "ok"; }; From 363b0f066e09cc8335ce243c08270c97e436e05e Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Wed, 9 Dec 2020 00:11:20 +0530 Subject: [PATCH 139/190] ARM: dts: msm: Fix compilation error and remove clk Fix compilation error. Remove abh clk. Add qos entry. Correct interconnect destination port. CRs-Fixed: 2824629 Change-Id: I04f5b594225ec698edd975aefd4a61b01917c419 --- yupik-camera.dtsi | 31 ++++++++++++++----------------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 95230cd8ae4e..90a1bf9230ea 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -10,7 +10,7 @@ qcom,cam-sync { compatible = "qcom,cam-sync"; status = "ok"; - } + }; qcom,cam_smmu { compatible = "qcom,msm-cam-smmu", "simple-bus"; @@ -573,7 +573,7 @@ qcom,cam-icp { compatible = "qcom,cam-icp"; compat-hw-name = "qcom,a5", - "qcom,ipe", + "qcom,ipe0", "qcom,bps"; num-a5 = <1>; num-ipe = <1>; @@ -618,11 +618,11 @@ ubwc-ipe-write-cfg = <0x161cf 0x161ef>; ubwc-bps-fetch-cfg = <0x7073 0x707b>; ubwc-bps-write-cfg = <0x161cf 0x161ef>; - /* qos-val = <0x00000A0A> */ + qos-val = <0x00000A0A>; status = "ok"; }; - cam_ipe: qcom,ipe0 { + cam_ipe0: qcom,ipe0 { cell-index = <0>; compatible = "qcom,cam-ipe"; reg = <0xac87000 0xa000>; @@ -759,7 +759,7 @@ reg-cam-base = <0x6b000>; interrupt-names = "lrme"; interrupts = ; - regulator-names = "camss"; + regulator-names = "camss-vdd"; camss-supply = <&cam_cc_titan_top_gdsc>; clock-names = "lrme_clk_src", "lrme_clk"; @@ -792,7 +792,6 @@ regulator-names = "camss-vdd"; camss-vdd-supply = <&cam_cc_titan_top_gdsc>; clock-names = - "gcc_ahb_clk", "gcc_axi_hf_clk", "gcc_axi_sf_clk", "slow_ahb_clk_src", @@ -800,7 +799,6 @@ "camnoc_axi_clk_src", "camnoc_axi_clk"; clocks = - <&gcc GCC_CAMERA_AHB_CLK>, <&gcc GCC_CAMERA_HF_AXI_CLK>, <&gcc GCC_CAMERA_SF_AXI_CLK>, <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, @@ -809,21 +807,20 @@ <&camcc CAM_CC_CAMNOC_AXI_CLK>; src-clock-name = "camnoc_axi_clk_src"; clock-rates = - <0 0 0 0 0 0 0>, - <0 0 0 80000000 0 150000000 0>, - <0 0 0 80000000 0 240000000 0>, - <0 0 0 80000000 0 320000000 0>, - <0 0 0 80000000 0 400000000 0>, - <0 0 0 80000000 0 480000000 0>, - <0 0 0 80000000 0 480000000 0>; + <0 0 0 0 0 0>, + <0 0 80000000 0 150000000 0>, + <0 0 80000000 0 240000000 0>, + <0 0 80000000 0 320000000 0>, + <0 0 80000000 0 400000000 0>, + <0 0 80000000 0 480000000 0>; clock-cntl-level = "suspend", "lowsvs", "svs", - "svs_l1", "nominal", "turbo", "turbo_l1"; + "svs_l1", "nominal", "turbo"; control-camnoc-axi-clk; camnoc-bus-width = <32>; camnoc-axi-clk-bw-margin-perc = <20>; interconnect-names = "cam_ahb"; interconnects =<&gem_noc MASTER_APPSS_PROC - &config_noc SLAVE_CAMERA_CFG>; + &cnoc2 SLAVE_CAMERA_CFG>; cam-ahb-num-cases = <7>; cam-ahb-bw-KBps = <0 0>, <0 76800>, <0 150000>, <0 150000>, @@ -841,7 +838,7 @@ vdd-corner-ahb-mapping = "suspend", "lowsvs", "lowsvs", "svs", "svs_l1", "nominal", "nominal", "nominal", - "turbo", "turbo_l1"; + "turbo", "turbo"; client-id-based; client-names = "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", From bd9968e7cdfefd42aad0393e1099db178ea5109c Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Tue, 8 Dec 2020 23:57:48 +0530 Subject: [PATCH 140/190] ARM: dts: msm: Add feature support fuse for Yupik camera Add fuse to check ife and ife lite and shdr and qcfa support availability. CRs-Fixed: 2824629 Change-Id: Ica55a038c1b6158caebd21c5925fb3677b9751f7 --- yupik-camera.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 95230cd8ae4e..c1f0f63891b0 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -786,6 +786,10 @@ reg = <0x0ac40000 0x1000>, <0x0ac9f000 0x10000>; reg-cam-base = <0x40000 0x9f000>; + cam_hw_fuse = , + , + , + ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 65b2c79b2aab97fdeb3c1ea097b1a77a096dee4c Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Mon, 7 Dec 2020 12:50:20 -0800 Subject: [PATCH 141/190] ARM: dts: msm: Update a5 QoS settings for Lahaina/Kona Configure the recommended bus access priorities for a5 core. CRs-Fixed: 2834780 Change-Id: I7b2a64873204e01b8b5a621f2de8de5e903b6388 --- kona-camera.dtsi | 1 + lahaina-camera.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/kona-camera.dtsi b/kona-camera.dtsi index e0b496a0d8cd..e69dc26d740e 100644 --- a/kona-camera.dtsi +++ b/kona-camera.dtsi @@ -1577,6 +1577,7 @@ ubwc-ipe-write-cfg = <0x161ef 0x1620f>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161ef 0x1620f>; + qos-val = <0x00000A0A>; status = "ok"; }; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 2d9e7599b366..5c273a422233 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1798,6 +1798,7 @@ ubwc-ipe-write-cfg = <0x161ef 0x1620f>; ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161ef 0x1620f>; + qos-val = <0x00000A0A>; status = "ok"; }; From abce3960f1fdc3395988355923c4163551303e6d Mon Sep 17 00:00:00 2001 From: Wyes Karny Date: Wed, 2 Dec 2020 14:40:22 +0530 Subject: [PATCH 142/190] ARM: dts: msm: fix wrong IRQ type for TFE IRQ type 0 is not allowed in the kernel, therefore change IRQ type to IRQ_TYPE_EDGE_RISING. CRs-Fixed: 2830228 Change-Id: I844e738ff9adfc9aeeada1b5f76e307ec597146c --- bengal-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bengal-camera.dtsi b/bengal-camera.dtsi index bb5675351112..32e146f7d05c 100644 --- a/bengal-camera.dtsi +++ b/bengal-camera.dtsi @@ -698,7 +698,7 @@ reg = <0x5c75000 0x5000>; reg-cam-base = <0x75000>; interrupt-names = "tfe1"; - interrupts = <0 213 0>; + interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; clock-names = From 2af55cce36ca83c6b888f49756bf958bdc641837 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Wed, 11 Nov 2020 19:44:52 +0530 Subject: [PATCH 143/190] ARM: dts: msm: Align regulator votes to shima power grid Set the minimum regulator values voted for in all the camera sensor DTSI nodes on shima to the power grid/typical spec values instead of the minimum spec values to leave room for PCB voltage drops. CRs-Fixed: 2845333 Change-Id: Ia1594a9ff045cbcb68b6282e5c496a5f3a147df1 --- shima-camera-sensor-idp.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index 15e7cc5c1dbb..ca5552bc945e 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -42,7 +42,7 @@ cam_vaf-supply = <&L7I>; regulator-names = "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; + rgltr-min-voltage = <2960000>; rgltr-max-voltage = <3000000>; rgltr-load-current = <103000>; }; @@ -54,7 +54,7 @@ cam_vaf-supply = <&L7I>; regulator-names = "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; + rgltr-min-voltage = <2960000>; rgltr-max-voltage = <3000000>; rgltr-load-current = <103000>; }; @@ -71,7 +71,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vana1", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 2960000>; rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; rgltr-load-current = <5000 68000 74000 805000 0 103000>; gpio-no-mux = <0>; @@ -106,7 +106,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2960000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; rgltr-load-current = <10000 52000 140000 0 103000>; gpio-no-mux = <0>; @@ -184,7 +184,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 3296000>; rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; rgltr-load-current = <5000 68000 74000 805000 0 2000000>; gpio-no-mux = <0>; @@ -227,7 +227,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <10000 52000 140000 0 2000000>; gpio-no-mux = <0>; @@ -385,7 +385,7 @@ cam_vaf-supply = <&L7I>; regulator-names = "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <2700000>; + rgltr-min-voltage = <2960000>; rgltr-max-voltage = <3000000>; rgltr-load-current = <103000>; }; @@ -401,7 +401,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 2700000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 2960000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; rgltr-load-current = <3000 52000 257000 0 103000>; gpio-no-mux = <0>; @@ -435,7 +435,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0>; + rgltr-min-voltage = <1800000 2800000 1056000 0>; rgltr-max-voltage = <1800000 2900000 1150000 0>; rgltr-load-current = <5000 35000 301000 0>; gpio-no-mux = <0>; @@ -478,7 +478,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <3000 52000 257000 0 2000000>; gpio-no-mux = <0>; @@ -519,7 +519,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2700000 950000 0 3200000>; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; rgltr-load-current = <5000 35000 301000 0 2000000>; gpio-no-mux = <0>; From 8768c8c63c9507e96735175d2578594376b38839 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Mon, 4 Jan 2021 14:58:34 +0530 Subject: [PATCH 144/190] ARM: dts: msm: Change SHDR fuse id for Yupik camera This change is to add correct SHDR change for Yupik camera. CRs-Fixed: 2824629 Change-Id: I72617371034b1163836b190e798813ce66d8c158 --- yupik-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 6ebe1df8d463..297a17433c77 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -788,7 +788,7 @@ reg-cam-base = <0x40000 0x9f000>; cam_hw_fuse = , , - , + , ; interrupt-names = "cpas_camnoc"; interrupts = ; From 71e79bb63f489a95bcab530586b0f7c5ccb987aa Mon Sep 17 00:00:00 2001 From: Anil Kumar Kanakanti Date: Tue, 5 Jan 2021 16:25:17 +0530 Subject: [PATCH 145/190] ARM: dts: msm: Add support for Yupik camera sensor Add Wide, Ultra Wide and Tele camera sensor module nodes. CRs-Fixed: 2837508 Change-Id: I2189a4380e56727a2ac560d84c2186019f8f9668 --- yupik-camera-sensor-idp.dtsi | 386 +++++++++++++++++++++++++++++++++++ 1 file changed, 386 insertions(+) create mode 100644 yupik-camera-sensor-idp.dtsi diff --git a/yupik-camera-sensor-idp.dtsi b/yupik-camera-sensor-idp.dtsi new file mode 100644 index 000000000000..38412647ba8d --- /dev/null +++ b/yupik-camera-sensor-idp.dtsi @@ -0,0 +1,386 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_wide: qcom,actuator0 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2960000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_tele: qcom,actuator1 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2960000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom0 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_vana1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vana1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 2960000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3000000>; + rgltr-load-current = <5000 68000 74000 805000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 64 0>, + <&tlmm 20 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom1 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2960000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 65 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear (W) */ + qcom,cam-sensor0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 3296000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 64 0>, + <&tlmm 20 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear-aux (T) */ + qcom,cam-sensor1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 65 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_uw: qcom,actuator2 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2960000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2960000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <3000 52000 257000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 66 0>, + <&tlmm 77 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 67 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear-aux (UW) */ + qcom,cam-sensor2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 66 0>, + <&tlmm 77 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Front */ + qcom,cam-sensor3 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 67 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From c900f985872c84cd147fefb5c2fd720d430b3144 Mon Sep 17 00:00:00 2001 From: Anil Kumar Kanakanti Date: Tue, 5 Jan 2021 19:42:19 +0530 Subject: [PATCH 146/190] ARM: dts: msm: Add CCI and PHY devicetree nodes to Yupik camera Add CCI and CSIPHY devicetree nodes to Yupik camera. Change-Id: I1e62cd7ddb7d4fda2afa5dae5b650d7a26b9a622 --- yupik-camera.dtsi | 410 ++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 378 insertions(+), 32 deletions(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 6ebe1df8d463..d9740d77813d 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -1,7 +1,6 @@ #include &soc { - qcom,cam-req-mgr { compatible = "qcom,cam-req-mgr"; status = "ok"; @@ -12,6 +11,362 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0x0ace0000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe0000>; + interrupts = ; + interrupt-names = "csiphy0"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <300000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xace2000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe2000>; + interrupts = ; + interrupt-names = "csiphy1"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <300000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupts = ; + interrupt-names = "csiphy2"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <300000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xace6000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe6000>; + interrupts = ; + interrupt-names = "csiphy3"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <300000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy4 { + cell-index = <4>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0xace8000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe8000>; + interrupts = ; + interrupt-names = "csiphy4"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + refgen-supply = <&refgen>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L10C>; + regulator-names = "gdscr", "refgen", "csi-vdd-1p2", + "csi-vdd-0p9"; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 1200000 880000>; + rgltr-max-voltage = <0 0 1260000 1050000>; + rgltr-load-current = <0 0 54000 96400>; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy4_clk", + "csi4phytimer_clk_src", + "csi4phytimer_clk"; + src-clock-name = "csi4phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs"; + clock-rates = + <300000000 0 300000000 0>, + <400000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac4a000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4a000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>, + <&camcc CAM_CC_CCI_0_CLK>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 69 0>, + <&tlmm 70 0>, + <&tlmm 71 0>, + <&tlmm 72 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac4b000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x4b000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>, + <&camcc CAM_CC_CCI_1_CLK>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "lowsvs"; + clock-rates = <37500000 0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active &cci3_active>; + pinctrl-1 = <&cci2_suspend &cci3_suspend>; + gpios = <&tlmm 73 0>, + <&tlmm 74 0>, + <&tlmm 75 0>, + <&tlmm 76 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2", + "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam_smmu { compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; @@ -242,7 +597,6 @@ clock-names = "ife_csid_clk_src", "ife_csid_clk", - "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_clk", @@ -250,16 +604,15 @@ clocks = <&camcc CAM_CC_IFE_0_CSID_CLK_SRC>, <&camcc CAM_CC_IFE_0_CSID_CLK>, - <&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, <&camcc CAM_CC_IFE_0_CLK_SRC>, <&camcc CAM_CC_IFE_0_CLK>, <&camcc CAM_CC_IFE_0_AXI_CLK>; clock-rates = - <300000000 0 0 0 380000000 0 0>, - <400000000 0 0 0 510000000 0 0>, - <400000000 0 0 0 637000000 0 0>, - <400000000 0 0 0 760000000 0 0>; + <300000000 0 0 380000000 0 0>, + <400000000 0 0 510000000 0 0>, + <400000000 0 0 637000000 0 0>, + <400000000 0 0 760000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; @@ -314,7 +667,6 @@ clock-names = "ife_csid_clk_src", "ife_csid_clk", - "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_clk", @@ -322,16 +674,15 @@ clocks = <&camcc CAM_CC_IFE_1_CSID_CLK_SRC>, <&camcc CAM_CC_IFE_1_CSID_CLK>, - <&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, <&camcc CAM_CC_IFE_1_CLK_SRC>, <&camcc CAM_CC_IFE_1_CLK>, <&camcc CAM_CC_IFE_1_AXI_CLK>; clock-rates = - <300000000 0 0 0 380000000 0 0>, - <400000000 0 0 0 510000000 0 0>, - <400000000 0 0 0 637000000 0 0>, - <400000000 0 0 0 760000000 0 0>; + <300000000 0 0 380000000 0 0>, + <400000000 0 0 510000000 0 0>, + <400000000 0 0 637000000 0 0>, + <400000000 0 0 760000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; @@ -386,7 +737,6 @@ clock-names = "ife_csid_clk_src", "ife_csid_clk", - "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_clk", @@ -394,16 +744,15 @@ clocks = <&camcc CAM_CC_IFE_2_CSID_CLK_SRC>, <&camcc CAM_CC_IFE_2_CSID_CLK>, - <&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>, <&camcc CAM_CC_IFE_2_CLK_SRC>, <&camcc CAM_CC_IFE_2_CLK>, <&camcc CAM_CC_IFE_2_AXI_CLK>; clock-rates = - <300000000 0 0 0 380000000 0 0>, - <400000000 0 0 0 510000000 0 0>, - <400000000 0 0 0 637000000 0 0>, - <400000000 0 0 0 760000000 0 0>; + <300000000 0 0 380000000 0 0>, + <400000000 0 0 510000000 0 0>, + <400000000 0 0 637000000 0 0>, + <400000000 0 0 760000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; @@ -457,22 +806,20 @@ clock-names = "ife_csid_clk_src", "ife_csid_clk", - "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_clk"; clocks = <&camcc CAM_CC_IFE_LITE_0_CSID_CLK_SRC>, <&camcc CAM_CC_IFE_LITE_0_CSID_CLK>, - <&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>, <&camcc CAM_CC_IFE_LITE_0_CLK_SRC>, <&camcc CAM_CC_IFE_LITE_0_CLK>; clock-rates = - <300000000 0 0 0 320000000 0>, - <400000000 0 0 0 400000000 0>, - <400000000 0 0 0 480000000 0>, - <400000000 0 0 0 600000000 0>; + <300000000 0 0 320000000 0>, + <400000000 0 0 400000000 0>, + <400000000 0 0 480000000 0>, + <400000000 0 0 600000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; @@ -520,22 +867,20 @@ clock-names = "ife_csid_clk_src", "ife_csid_clk", - "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_clk"; clocks = <&camcc CAM_CC_IFE_LITE_1_CSID_CLK_SRC>, <&camcc CAM_CC_IFE_LITE_1_CSID_CLK>, - <&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>, <&camcc CAM_CC_IFE_LITE_1_CLK_SRC>, <&camcc CAM_CC_IFE_LITE_1_CLK>; clock-rates = - <300000000 0 0 0 320000000 0>, - <400000000 0 0 0 400000000 0>, - <400000000 0 0 0 480000000 0>, - <400000000 0 0 0 600000000 0>; + <300000000 0 0 320000000 0>, + <400000000 0 0 400000000 0>, + <400000000 0 0 480000000 0>, + <400000000 0 0 600000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; @@ -845,7 +1190,8 @@ "turbo", "turbo"; client-id-based; client-names = - "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "cci0", "cci1", "csid0", "csid1", "csid2", "csid3", "csid4", "ife0", "ife1", "ife2", "ife3", "ife4", "ipe0", "cam-cdm-intf0", "cpas-cdm0", From 8b266459e6db07d8b72738c64bc2b51ba6c2a8b7 Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Mon, 11 Jan 2021 14:15:03 +0800 Subject: [PATCH 147/190] ARM: dts: msm: Add support for Yupik camera sensor on QRD Add Wide, Ultra Wide and Tele camera sensor module nodes. CRs-Fixed: 2852072 Change-Id: I4b00f588b2394b26488f6758020f2c80cfdd7199 --- yupik-camera-sensor-qrd.dtsi | 387 +++++++++++++++++++++++++++++++++++ 1 file changed, 387 insertions(+) create mode 100644 yupik-camera-sensor-qrd.dtsi diff --git a/yupik-camera-sensor-qrd.dtsi b/yupik-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..5704d78ed245 --- /dev/null +++ b/yupik-camera-sensor-qrd.dtsi @@ -0,0 +1,387 @@ +#include + +&soc { + led_flash_triple_rear: qcom,camera-flash@4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux: qcom,camera-flash@5 { + cell-index = <5>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_aux2: qcom,camera-flash@6 { + cell-index = <6>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8350c_flash0 &pm8350c_flash1>; + torch-source = <&pm8350c_torch0 &pm8350c_torch1>; + switch-source = <&pm8350c_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_tele: qcom,actuator1 { + cell-index = <5>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2960000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_front: qcom,eeprom3 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 64 0>, + <&tlmm 20 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_tele: qcom,eeprom1 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 2960000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3000000>; + rgltr-load-current = <10000 52000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 65 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Front */ + qcom,cam-sensor0 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L5J>; + cam_vdig-supply = <&L1J>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 64 0>, + <&tlmm 20 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear-aux (T) */ + qcom,cam-sensor1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 65 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; + +&cam_cci1 { + actuator_triple_wide: qcom,actuator0 { + cell-index = <4>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2960000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + actuator_triple_uw: qcom,actuator2 { + cell-index = <6>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2960000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + }; + + eeprom_triple_wide: qcom,eeprom0 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 3296000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 66 0>, + <&tlmm 77 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + eeprom_triple_uw: qcom,eeprom2 { + cell-index = <6>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 67 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear (W) */ + qcom,cam-sensor2 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_triple_wide>; + eeprom-src = <&eeprom_triple_wide>; + led-flash-src = <&led_flash_triple_rear>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L3I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig","cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 3296000>; + rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 66 0>, + <&tlmm 77 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; + + /* Rear-aux (UW) */ + qcom,cam-sensor3 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_aux2>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&BOB>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 257000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 67 0>, + <&tlmm 78 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = <1>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + }; +}; From af0fb94dd0e69c45738805b6dcd8a2f409f8e185 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Tue, 12 Jan 2021 22:07:08 +0530 Subject: [PATCH 148/190] ARM: dts: msm: Change cdm client for Yupik camera This change is to correct cdm client for Yupik camera. CRs-Fixed: 2824629 Change-Id: If53fd01e0a3b71b3e17d8735a9d7f5b837e034e6 --- yupik-camera.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 297a17433c77..3b4321cfcf8d 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -218,7 +218,8 @@ <&camcc CAM_CC_CPAS_AHB_CLK>; clock-rates = <0 0>; clock-cntl-level = "svs"; - cdm-client-names = "ife3", "ife4", "dualife"; + cdm-client-names = "ife0", "ife1", "ife2", + "ife3", "ife4", "dualife"; status = "ok"; }; From 5472fbe69d2f1e3c87eb319dd4512a1b2fb47db0 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Fri, 22 Jan 2021 04:46:17 +0530 Subject: [PATCH 149/190] ARM: dts: msm: Add required clock to cpas node This change is to add required code to cpas node CRs-Fixed: 2824629 Change-Id: I9e1dddf219d5a10383e2af59b7ac3cca58779fd0 --- yupik-camera.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 8cefde346c5c..310657effcff 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -1147,22 +1147,26 @@ "slow_ahb_clk_src", "cpas_ahb_clk", "camnoc_axi_clk_src", - "camnoc_axi_clk"; + "camnoc_axi_clk", + "icp_ahb_clk", + "icp_clk"; clocks = <&gcc GCC_CAMERA_HF_AXI_CLK>, <&gcc GCC_CAMERA_SF_AXI_CLK>, <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, <&camcc CAM_CC_CPAS_AHB_CLK>, <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, - <&camcc CAM_CC_CAMNOC_AXI_CLK>; + <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_ICP_CLK>; src-clock-name = "camnoc_axi_clk_src"; clock-rates = - <0 0 0 0 0 0>, - <0 0 80000000 0 150000000 0>, - <0 0 80000000 0 240000000 0>, - <0 0 80000000 0 320000000 0>, - <0 0 80000000 0 400000000 0>, - <0 0 80000000 0 480000000 0>; + <0 0 0 0 0 0 0 0>, + <0 0 80000000 0 150000000 0 0 0>, + <0 0 80000000 0 240000000 0 0 0>, + <0 0 80000000 0 320000000 0 0 0>, + <0 0 80000000 0 400000000 0 0 0>, + <0 0 80000000 0 480000000 0 0 0>; clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", "nominal", "turbo"; control-camnoc-axi-clk; From 0958033f599b8970114638de62a98cd1b1fa7f31 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Mon, 25 Jan 2021 03:36:21 +0530 Subject: [PATCH 150/190] ARM: dts: msm: Change hw index in IFE LITE fuse This change is to corect hw index in IFE LITE fuse for Yupik camera. If IFE LITE fuse is blown then 2 IFE LITE is supported otherwise one. CRs-Fixed: 2824629 Change-Id: I819be0e8f86eeb6318719238618ed5c17e33abb6 --- yupik-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 310657effcff..299b098a04c0 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -1133,7 +1133,7 @@ <0x0ac9f000 0x10000>; reg-cam-base = <0x40000 0x9f000>; cam_hw_fuse = , - , + , , ; interrupt-names = "cpas_camnoc"; From cb72baf68d97ec0a07d8a93e4d8d6e701beb0e84 Mon Sep 17 00:00:00 2001 From: Jing Li Date: Thu, 7 Jan 2021 11:10:32 +0800 Subject: [PATCH 151/190] ARM: dts: msm: Add new node for HHG camera device Override existing nodes for lahaina as MCLK and Voltage changed for HHG platform. Change-Id: I337e137a883b643d8501ef39cbb62e3d38a67c89 CRs-Fixed: 2853048 --- lahaina-camera-sensor-hhg.dtsi | 78 ++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 lahaina-camera-sensor-hhg.dtsi diff --git a/lahaina-camera-sensor-hhg.dtsi b/lahaina-camera-sensor-hhg.dtsi new file mode 100644 index 000000000000..52fbf46d4e32 --- /dev/null +++ b/lahaina-camera-sensor-hhg.dtsi @@ -0,0 +1,78 @@ +&cam_cci1 { +/delete-node/ qcom,eeprom5; +/delete-node/ qcom,cam-sensor5; + + qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1100000 0>; + rgltr-max-voltage = <1800000 2800000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1100000 0 3200000>; + rgltr-max-voltage = <1800000 2800000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <19200000>; + }; +}; From 51b49a304bf73637ea234cc574fdbb2f1dbb7c8d Mon Sep 17 00:00:00 2001 From: Jing Li Date: Thu, 7 Jan 2021 11:10:32 +0800 Subject: [PATCH 152/190] ARM: dts: msm: Add new node for HHG camera device Override existing nodes for lahaina as MCLK and Voltage changed for HHG platform. Change-Id: I337e137a883b643d8501ef39cbb62e3d38a67c89 CRs-Fixed: 2853048 --- lahaina-camera-sensor-hhg.dtsi | 78 ++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 lahaina-camera-sensor-hhg.dtsi diff --git a/lahaina-camera-sensor-hhg.dtsi b/lahaina-camera-sensor-hhg.dtsi new file mode 100644 index 000000000000..52fbf46d4e32 --- /dev/null +++ b/lahaina-camera-sensor-hhg.dtsi @@ -0,0 +1,78 @@ +&cam_cci1 { +/delete-node/ qcom,eeprom5; +/delete-node/ qcom,cam-sensor5; + + qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1100000 0>; + rgltr-max-voltage = <1800000 2800000 1150000 0>; + rgltr-load-current = <5000 35000 301000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor5 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8008j_l3>; + cam_vana-supply = <&pm8008j_l5>; + cam_vdig-supply = <&pm8008j_l1>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_bob-supply = <&pm8350c_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1100000 0 3200000>; + rgltr-max-voltage = <1800000 2800000 1150000 0 3960000>; + rgltr-load-current = <5000 35000 301000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 115 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK5_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <19200000>; + }; +}; From 9d5548f7b69fc9a85e3433188a147f03c99b2741 Mon Sep 17 00:00:00 2001 From: Tejas Prajapati Date: Wed, 3 Feb 2021 17:15:13 +0530 Subject: [PATCH 153/190] ARM: dts: msm: Update correct PID for the IFE2 For IFE2 the correct PID is 30. CRs-Fixed: 2872016 Change-Id: I5d90effc6166e725a80af2ae963992492c96d4c7 --- shima-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 3b923c783d9e..269ed5d32abb 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -929,7 +929,7 @@ scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; ubwc-static-cfg = <0x1016 0x1026>; - cam_hw_pid = < 23 6 18 10>; + cam_hw_pid = < 30 6 18 10>; status = "ok"; }; From 0526e1b18045baba3c7a10a7b024fe1ec428ed75 Mon Sep 17 00:00:00 2001 From: Tejas Prajapati Date: Wed, 3 Feb 2021 17:15:13 +0530 Subject: [PATCH 154/190] ARM: dts: msm: Update correct PID for the IFE2 For IFE2 the correct PID is 30. CRs-Fixed: 2872016 Change-Id: I8c3d19196b6398ad6399b7f98934695e134b2a0a --- shima-camera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 3b923c783d9e..269ed5d32abb 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -929,7 +929,7 @@ scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; ubwc-static-cfg = <0x1016 0x1026>; - cam_hw_pid = < 23 6 18 10>; + cam_hw_pid = < 30 6 18 10>; status = "ok"; }; From 120ad4aa0d59cb89b8554184cfd072c175d5a88b Mon Sep 17 00:00:00 2001 From: Alok Pandey Date: Wed, 10 Feb 2021 11:09:39 +0530 Subject: [PATCH 155/190] ARM: dts: msm: Enable io-coherency for camera devices on Shima Enable io-coherency to avoid cache flush operations when a buffer generated by CPU module is given to a HW as input. CRs-Fixed: 2882101 Change-Id: Ibbc89c10ab8e2f89d1af1568478bafd979f42d7d --- shima-camera.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 3b923c783d9e..c7957c3b07f6 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -412,6 +412,7 @@ <&apps_smmu 0x1400 0x440>, <&apps_smmu 0x1440 0x440>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + dma-coherent-hint-cached; cam-smmu-label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { @@ -432,6 +433,7 @@ <&apps_smmu 0x2C40 0x400>; cam-smmu-label = "jpeg"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -461,6 +463,7 @@ <&apps_smmu 0x2820 0x400>, <&apps_smmu 0x2C20 0x400>; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + dma-coherent-hint-cached; iova-region-discard = <0xdff00000 0x300000>; cam-smmu-label = "icp"; icp_iova_mem_map: iova-mem-map { @@ -519,6 +522,7 @@ <&apps_smmu 0x2CC0 0x400>; cam-smmu-label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 3.4 GB */ From a51ff49cbf4a22746c64f280448f50bf4945822b Mon Sep 17 00:00:00 2001 From: Anil Kumar Kanakanti Date: Mon, 14 Dec 2020 19:08:10 +0530 Subject: [PATCH 156/190] ARM: dts: msm: Add support for CSI PHY SW fuse Add support for enabling CSIPHY fuse for yupik platform. CRs-Fixed: 2869783 Change-Id: I3e91c1a963e239b32237c44fc40d3557cd8487f9 --- yupik-camera.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 297a17433c77..b7fe50cbc3d2 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -789,7 +789,8 @@ cam_hw_fuse = , , , - ; + , + ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 3a102dd6c96376b6b663d2a5edf192cfea673a9a Mon Sep 17 00:00:00 2001 From: Anil Kumar Kanakanti Date: Wed, 27 Jan 2021 21:43:59 +0530 Subject: [PATCH 157/190] ARM: dts: msm: Add support for JD1 sensor for yupik Add support for JD1 sensor for yupik using JD1+GC630 camera DC. CRs-Fixed: 2869700 Change-Id: Iffcdf5062dbf2fcbccdb3cb29848956485339cfc --- yupik-camera-sensor-idp.dtsi | 44 ++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/yupik-camera-sensor-idp.dtsi b/yupik-camera-sensor-idp.dtsi index 38412647ba8d..f4ed67f88ad1 100644 --- a/yupik-camera-sensor-idp.dtsi +++ b/yupik-camera-sensor-idp.dtsi @@ -383,4 +383,48 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + /* Rear */ + qcom,cam-sensor4 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_triple_uw>; + actuator-src = <&actuator_triple_uw>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L6I>; + cam_vdig-supply = <&L2I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2900000 1150000 0>; + rgltr-load-current = <3000 52000 257000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend", "cam_mux"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2 + &cam_sensor_active_mux>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2 + &cam_sensor_suspend_mux>; + gpios = <&tlmm 66 0>, + <&tlmm 77 0>, + <&tlmm 1 0>; + gpio-reset = <1>; + gpio-custom1 = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_MUX"; + cci-master = <0>; + status = "ok"; + clocks = <&camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; }; From e03188b3f20cfd762f1021d9255e3624255b3607 Mon Sep 17 00:00:00 2001 From: Ravikishore Pampana Date: Tue, 22 Dec 2020 20:21:32 +0530 Subject: [PATCH 158/190] ARM: dts: msm: camera: Add hw pid and mid info to jpeg nodes Jpeg enc and dma hardware has unique pid values. Add pid values to each jpeg node instances. These are used to find the jpeg instance that caused page fault. Added read and write mid values for jpeg enc and dma nodes. CRs-Fixed: 2878371 Change-Id: I96f83874e59b803772a5ca8d76f1f6ebfbbfa2d9 --- bindings/msm-cam-jpeg.txt | 15 +++++++++++++++ lahaina-camera.dtsi | 6 ++++++ shima-camera.dtsi | 6 ++++++ yupik-camera.dtsi | 6 ++++++ 4 files changed, 33 insertions(+) diff --git a/bindings/msm-cam-jpeg.txt b/bindings/msm-cam-jpeg.txt index 73e99b25cd8f..edab1d95e34b 100644 --- a/bindings/msm-cam-jpeg.txt +++ b/bindings/msm-cam-jpeg.txt @@ -122,6 +122,21 @@ the device register map, interrupt map, clocks and regulators. Definition: List of strings corresponds clock-rates levels. Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. +- cam_hw_pid: + Usage: optional + Value type: + Definition: HW unique Pid values + +- cam_hw_rd_mid: + Usage: optional + Value type: + Definition: HW port read mid value + +- cam_hw_wr_mid: + Usage: optional + Value type: + Definition: HW port write mid value + Examples: cam_jpeg_enc: qcom,jpegenc@ac4e000 { cell-index = <0>; diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index 5c273a422233..d3c50b69a3fc 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1899,6 +1899,9 @@ clock-rates = <600000000 0>; src-clock-name = "jpegenc_clk_src"; clock-cntl-level = "nominal"; + cam_hw_pid = <25 26>; + cam_hw_rd_mid = <0>; + cam_hw_wr_mid = <1>; status = "ok"; }; @@ -1922,6 +1925,9 @@ clock-rates = <600000000 0>; src-clock-name = "jpegdma_clk_src"; clock-cntl-level = "nominal"; + cam_hw_pid = <24 27>; + cam_hw_rd_mid = <0>; + cam_hw_wr_mid = <1>; status = "ok"; }; }; diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 269ed5d32abb..7b2f62e37432 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1281,6 +1281,9 @@ clock-rates = <600000000 0>; src-clock-name = "jpegenc_clk_src"; clock-cntl-level = "nominal"; + cam_hw_pid = <25 26>; + cam_hw_rd_mid = <0>; + cam_hw_wr_mid = <1>; status = "ok"; }; @@ -1304,6 +1307,9 @@ clock-rates = <600000000 0>; src-clock-name = "jpegdma_clk_src"; clock-cntl-level = "nominal"; + cam_hw_pid = <24 27>; + cam_hw_rd_mid = <0>; + cam_hw_wr_mid = <1>; status = "ok"; }; diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 13aa22a16bfb..34a8e6be3fa5 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -1065,6 +1065,9 @@ clock-rates = <600000000 0>; src-clock-name = "jpegenc_clk_src"; clock-cntl-level = "nominal"; + cam_hw_pid = <22 23>; + cam_hw_rd_mid = <0>; + cam_hw_wr_mid = <2>; status = "ok"; }; @@ -1088,6 +1091,9 @@ clock-rates = <600000000 0>; src-clock-name = "jpegdma_clk_src"; clock-cntl-level = "nominal"; + cam_hw_pid = <20 21>; + cam_hw_rd_mid = <0>; + cam_hw_wr_mid = <2>; status = "ok"; }; From a70ecee4df01553add576f1ba7e1b2497f9600ec Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Thu, 18 Feb 2021 03:43:44 +0530 Subject: [PATCH 159/190] ARM: dts: msm: Enable io-coherency for camera devices on Yupik Enable io-coherency to avoid cache flush operations when a buffer generated by CPU module is given to a HW as input. CRs-Fixed: 2882101 Change-Id: Ib8720070cd7e907a077241d5f0ad72fb4df538dd --- yupik-camera.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 13aa22a16bfb..64b361ef84ed 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -391,6 +391,7 @@ <&apps_smmu 0xCE0 0x4E0>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; cam-smmu-label = "ife"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { @@ -412,6 +413,7 @@ cam-smmu-label = "jpeg"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -441,6 +443,7 @@ cam-smmu-label = "icp"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + dma-coherent-hint-cached; iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { @@ -498,6 +501,7 @@ cam-smmu-label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 3.4 GB */ @@ -523,6 +527,7 @@ cam-smmu-label = "lrme"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; lrme_iova_mem_map: iova-mem-map { iova-mem-region-shared { /* Shared region is 100MB long */ From c16d7e2389b0890e104ce05c6f0208928b50fd9a Mon Sep 17 00:00:00 2001 From: Pengfei Liu Date: Fri, 19 Feb 2021 10:56:49 +0800 Subject: [PATCH 160/190] ARM: dts: msm: Override eeprom front for HHG camera device Delete eeprom front node cuase failed, so override eeprom front directly in HHG platform. Change-Id: Ib8253147f1b78caa2aea628bf6f733cd3f68aec6 CRs-Fixed: 2853048 --- lahaina-camera-sensor-hhg.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/lahaina-camera-sensor-hhg.dtsi b/lahaina-camera-sensor-hhg.dtsi index 52fbf46d4e32..1fb8607cd36a 100644 --- a/lahaina-camera-sensor-hhg.dtsi +++ b/lahaina-camera-sensor-hhg.dtsi @@ -1,5 +1,4 @@ &cam_cci1 { -/delete-node/ qcom,eeprom5; /delete-node/ qcom,cam-sensor5; qcom,eeprom5 { From e312fcd8f7de2794a1eecac66d0636c774149026 Mon Sep 17 00:00:00 2001 From: Alok Pandey Date: Thu, 18 Feb 2021 17:07:32 +0530 Subject: [PATCH 161/190] ARM: dts: msm: Updating QoS for ICP Updating QoS for a5 to 0xA0A CRs-Fixed: 2880707 Change-Id: I401b61278fa95dc389f0be603b07304a0b76aba8 --- shima-camera.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 3b923c783d9e..7f89fd591b3c 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1181,6 +1181,7 @@ ubwc-ipe-write-cfg = <0x161cf 0x161ef>; ubwc-bps-fetch-cfg = <0x7073 0x707b>; ubwc-bps-write-cfg = <0x161cf 0x161ef>; + qos-val = <0x00000A0A>; status = "ok"; }; From 985dfb69e3daf137c27385c6baa9aa772aa2c966 Mon Sep 17 00:00:00 2001 From: Alok Chauhan Date: Wed, 27 Jan 2021 22:31:37 +0530 Subject: [PATCH 162/190] CAP IPE clk to SVS (450 MHz) Change-Id: Ifab04a6becc7b480356626f55264539598128ecb --- shima-camera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 269ed5d32abb..c7996b136946 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1210,9 +1210,9 @@ clock-rates = <0 0 0 300000000 0>, <0 0 0 450000000 0>, - <0 0 0 525000000 0>, - <0 0 0 700000000 0>, - <0 0 0 700000000 0>; + <0 0 0 450000000 0>, + <0 0 0 450000000 0>, + <0 0 0 450000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; status = "ok"; From 31aec6f1b23bd657f290926e4cc2deab4e8eda69 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Thu, 18 Feb 2021 03:43:44 +0530 Subject: [PATCH 163/190] ARM: dts: msm: Enable io-coherency for camera devices on Yupik Enable io-coherency to avoid cache flush operations when a buffer generated by CPU module is given to a HW as input. CRs-Fixed: 2882101 Change-Id: Ib8720070cd7e907a077241d5f0ad72fb4df538dd --- yupik-camera.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 13aa22a16bfb..64b361ef84ed 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -391,6 +391,7 @@ <&apps_smmu 0xCE0 0x4E0>; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; cam-smmu-label = "ife"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { @@ -412,6 +413,7 @@ cam-smmu-label = "jpeg"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -441,6 +443,7 @@ cam-smmu-label = "icp"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + dma-coherent-hint-cached; iova-region-discard = <0xdff00000 0x300000>; icp_iova_mem_map: iova-mem-map { iova-mem-region-firmware { @@ -498,6 +501,7 @@ cam-smmu-label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 3.4 GB */ @@ -523,6 +527,7 @@ cam-smmu-label = "lrme"; qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; + dma-coherent-hint-cached; lrme_iova_mem_map: iova-mem-map { iova-mem-region-shared { /* Shared region is 100MB long */ From 772334659630163ef004bda08ca54672cb30f2b3 Mon Sep 17 00:00:00 2001 From: Alok Pandey Date: Wed, 10 Feb 2021 11:09:39 +0530 Subject: [PATCH 164/190] ARM: dts: msm: Enable io-coherency for camera devices on Shima Enable io-coherency to avoid cache flush operations when a buffer generated by CPU module is given to a HW as input. CRs-Fixed: 2882101 Change-Id: Ibbc89c10ab8e2f89d1af1568478bafd979f42d7d --- shima-camera.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 269ed5d32abb..d513bce6994e 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -412,6 +412,7 @@ <&apps_smmu 0x1400 0x440>, <&apps_smmu 0x1440 0x440>; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + dma-coherent-hint-cached; cam-smmu-label = "ife", "ife-cdm"; multiple-client-devices; ife_iova_mem_map: iova-mem-map { @@ -432,6 +433,7 @@ <&apps_smmu 0x2C40 0x400>; cam-smmu-label = "jpeg"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { /* IO region is approximately 3.4 GB */ iova-mem-region-io { @@ -461,6 +463,7 @@ <&apps_smmu 0x2820 0x400>, <&apps_smmu 0x2C20 0x400>; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; + dma-coherent-hint-cached; iova-region-discard = <0xdff00000 0x300000>; cam-smmu-label = "icp"; icp_iova_mem_map: iova-mem-map { @@ -519,6 +522,7 @@ <&apps_smmu 0x2CC0 0x400>; cam-smmu-label = "cpas-cdm"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { /* IO region is approximately 3.4 GB */ From db2bf3235834196b9d5776ce949ef126cfb1e8f4 Mon Sep 17 00:00:00 2001 From: Alok Pandey Date: Wed, 27 Jan 2021 22:31:37 +0530 Subject: [PATCH 165/190] ARM: dts: msm: fix for Shima-CAMNOC RDI latency buffer corruption This is a fix to handle line corruption on RDI stream by capping IPE clock to SVS. It will help to avoid back pressure on CAMNOC dur to IPE traffic. This gives more room to IFE RDI stream and hence avoid corruption. CRs-Fixed: 2887253 Change-Id: I8880c08d507ebb90b447815a241870d03fd24bec --- shima-camera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index b8d06d5f711e..7571aa22b285 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1215,9 +1215,9 @@ clock-rates = <0 0 0 300000000 0>, <0 0 0 450000000 0>, - <0 0 0 525000000 0>, - <0 0 0 700000000 0>, - <0 0 0 700000000 0>; + <0 0 0 450000000 0>, + <0 0 0 450000000 0>, + <0 0 0 450000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; status = "ok"; From 6d46298cb79002b36c572d96086efdf3f78c2bff Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Wed, 3 Mar 2021 19:01:33 +0530 Subject: [PATCH 166/190] ARM: dts: msm: Update regulator max vote in sensor DT for shima Update regulator S9B max vote to the max voltage supported in camera sensor DT for shima. CRs-Fixed: 2899053 Change-Id: Ide251ec5b9c43f84c33460ef667f15374ea69baa --- shima-camera-sensor-idp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index ca5552bc945e..876dbec3f8d8 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -141,7 +141,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 3200000 1000000 0>; - rgltr-max-voltage = <1800000 3960000 1200000 0>; + rgltr-max-voltage = <1800000 3960000 1500000 0>; rgltr-load-current = <15000 2000000 805000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; @@ -269,7 +269,7 @@ regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; rgltr-cntrl-support; rgltr-min-voltage = <1800000 3200000 1000000 0>; - rgltr-max-voltage = <1800000 3960000 1200000 0>; + rgltr-max-voltage = <1800000 3960000 1500000 0>; rgltr-load-current = <15000 2000000 805000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; From d20cbbc452655fa90c21ab47151a9068e3713569 Mon Sep 17 00:00:00 2001 From: Thirupathi Reddy R Date: Fri, 19 Mar 2021 11:36:14 +0530 Subject: [PATCH 167/190] Revert "CAP IPE clk to SVS (450 MHz)" This reverts commit 985dfb69e3daf137c27385c6baa9aa772aa2c966. Change-Id: I4284dc78728b45806425bc5c92e50e018527f213 Signed-off-by: Thirupathi Reddy R --- shima-camera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/shima-camera.dtsi b/shima-camera.dtsi index 0e1021143d36..d513bce6994e 100644 --- a/shima-camera.dtsi +++ b/shima-camera.dtsi @@ -1214,9 +1214,9 @@ clock-rates = <0 0 0 300000000 0>, <0 0 0 450000000 0>, - <0 0 0 450000000 0>, - <0 0 0 450000000 0>, - <0 0 0 450000000 0>; + <0 0 0 525000000 0>, + <0 0 0 700000000 0>, + <0 0 0 700000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; status = "ok"; From 791fe4348c4536b22555c00942720db6546ef137 Mon Sep 17 00:00:00 2001 From: Anil Kumar Kanakanti Date: Fri, 19 Mar 2021 18:48:52 +0530 Subject: [PATCH 168/190] ARM: dts: msm: Add VAF regulator to sensor node Add common VAF regulator to each sensor devicetree node to avoid interference with CCI during multicamera scenario. CRs-Fixed: 2894500 Change-Id: Ib5e516d2f1da05f6828dd9225bcb7c1e8495db61 --- yupik-camera-sensor-idp.dtsi | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/yupik-camera-sensor-idp.dtsi b/yupik-camera-sensor-idp.dtsi index f4ed67f88ad1..18489203834a 100644 --- a/yupik-camera-sensor-idp.dtsi +++ b/yupik-camera-sensor-idp.dtsi @@ -143,16 +143,17 @@ led-flash-src = <&led_flash_triple_rear>; cam_vio-supply = <&L3J>; cam_vana-supply = <&L3I>; + cam_vaf-supply = <&L7I>; cam_v_custom1-supply = <&L5I>; cam_vdig-supply = <&L1I>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 3296000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; - rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + rgltr-min-voltage = <1800000 2904000 2960000 1800000 1104000 0 3296000>; + rgltr-max-voltage = <1800000 3000000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 103000 74000 805000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -187,15 +188,16 @@ led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&L3J>; cam_vana-supply = <&L4I>; + cam_vaf-supply = <&L7I>; cam_vdig-supply = <&L2I>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 2960000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 3000000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 103000 140000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -313,15 +315,16 @@ led-flash-src = <&led_flash_triple_rear_aux2>; cam_vio-supply = <&L3J>; cam_vana-supply = <&L6I>; + cam_vaf-supply = <&L7I>; cam_vdig-supply = <&L2I>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <3000 52000 257000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 2960000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 3000000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 103000 257000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active From 6684c30145b5e5d1c37ef6ee36d08a5de44ab09d Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Tue, 4 May 2021 19:33:29 +0530 Subject: [PATCH 169/190] ARM: dts: msm: Add camera sensor dtsi for holi pro Added camera sensor dtsi changes for holi Pro. Change-Id: I92a518a82e2414cbf48c0e05d61dca7c94d11969 CRs-Fixed: 2938922 --- holi-camera-pm6125-overlay.dtsi | 33 ++ holi-camera-sensor-pm6125-cdp.dtsi | 424 ++++++++++++++++++++++++ holi-camera-sensor-pm6125-mtp.dtsi | 424 ++++++++++++++++++++++++ holi-camera-sensor-usbc-pm6125-mtp.dtsi | 424 ++++++++++++++++++++++++ 4 files changed, 1305 insertions(+) create mode 100644 holi-camera-pm6125-overlay.dtsi create mode 100644 holi-camera-sensor-pm6125-cdp.dtsi create mode 100644 holi-camera-sensor-pm6125-mtp.dtsi create mode 100644 holi-camera-sensor-usbc-pm6125-mtp.dtsi diff --git a/holi-camera-pm6125-overlay.dtsi b/holi-camera-pm6125-overlay.dtsi new file mode 100644 index 000000000000..c6c1a183c269 --- /dev/null +++ b/holi-camera-pm6125-overlay.dtsi @@ -0,0 +1,33 @@ +&soc { + cam_csiphy0: qcom,csiphy0 { + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 15900 8900>; + }; + + cam_csiphy1: qcom,csiphy1 { + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 15900 8900>; + }; + + cam_csiphy2: qcom,csiphy2 { + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 15900 8900>; + }; + + cam_csiphy3: qcom,csiphy3 { + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 15900 8900>; + }; +}; diff --git a/holi-camera-sensor-pm6125-cdp.dtsi b/holi-camera-sensor-pm6125-cdp.dtsi new file mode 100644 index 000000000000..1e2ead27039c --- /dev/null +++ b/holi-camera-sensor-pm6125-cdp.dtsi @@ -0,0 +1,424 @@ +#include +&soc { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG0*/ + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG1*/ + qcom,cam-tpg1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG2*/ + qcom,cam-tpg2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <6>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +}; + +&cam_cci1 { + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master= <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; diff --git a/holi-camera-sensor-pm6125-mtp.dtsi b/holi-camera-sensor-pm6125-mtp.dtsi new file mode 100644 index 000000000000..1e2ead27039c --- /dev/null +++ b/holi-camera-sensor-pm6125-mtp.dtsi @@ -0,0 +1,424 @@ +#include +&soc { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG0*/ + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG1*/ + qcom,cam-tpg1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG2*/ + qcom,cam-tpg2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <6>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +}; + +&cam_cci1 { + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master= <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; diff --git a/holi-camera-sensor-usbc-pm6125-mtp.dtsi b/holi-camera-sensor-usbc-pm6125-mtp.dtsi new file mode 100644 index 000000000000..1e2ead27039c --- /dev/null +++ b/holi-camera-sensor-usbc-pm6125-mtp.dtsi @@ -0,0 +1,424 @@ +#include +&soc { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG0*/ + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG1*/ + qcom,cam-tpg1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG2*/ + qcom,cam-tpg2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <6>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +}; + +&cam_cci1 { + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master= <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From 251df031cfdaf875e7d8a77a9968bd5fd777d539 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Mon, 3 May 2021 13:14:49 +0530 Subject: [PATCH 170/190] ARM: dts: msm: Add camera device tree support for Blair Camera Add OPE, CDM, SMMU, TFE, CSID, TPG and CPAS nodes for Blair camera. CRs-Fixed: 2944976 Change-Id: If3a4bf371f16744a8642ca83fe7df0dcf0b6b180 --- blair-camera.dtsi | 741 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 741 insertions(+) create mode 100644 blair-camera.dtsi diff --git a/blair-camera.dtsi b/blair-camera.dtsi new file mode 100644 index 000000000000..4c25045f0e1b --- /dev/null +++ b/blair-camera.dtsi @@ -0,0 +1,741 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + + msm_cam_smmu_tfe { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cam-smmu-label = "tfe"; + tfe_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_ope { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xc20 0x000>, + <&apps_smmu 0xc40 0x000>; + qcom,iommu-faults = "non-fatal"; + multiple-client-devices; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cam-smmu-label = "ope", "ope-cdm"; + ope_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0xc00 0x000>; + cam-smmu-label = "cpas-cdm"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + cam-smmu-label = "cam-secure"; + qcom,secure-cb; + }; + + }; + + qcom,cam-cpas@5c11000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x11000 0x13000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&gcc_camss_top_gdsc>; + clock-names = + "gcc_camss_ahb_clk", + "gcc_camss_top_ahb_clk", + "gcc_camss_top_ahb_clk_src", + "gcc_camss_axi_clk", + "gcc_camss_axi_clk_src", + "gcc_camss_nrt_axi_clk", + "gcc_camss_rt_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_AXI_CLK_SRC>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>; + src-clock-name = "gcc_camss_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0>, + <0 0 19200000 0 19200000 0 0>, + <0 0 80000000 0 150000000 0 0>, + <0 0 80000000 0 240000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", + "svs_l1", "nominal", "nominal_l1", "turbo"; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_CAMERA_CFG>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + cam-ahb-num-cases = <7>; + cam-ahb-bw-KBps = + <0 0>, <0 133333>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", "lowsvs", + "lowsvs", "lowsvs", "svs", "svs_l1", "svs_l1", + "svs_l1", "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "cci0", "cci1", "csid0", "csid1", "csid2", + "tfe0", "tfe1", "tfe2", "ope0", "cam-cdm-intf0", + "cpas-cdm0", "ope-cdm0", "tpg0", "tpg1"; + + camera-bus-nodes { + level2-nodes { + level-index = <2>; + level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level2-rt0-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmrt_virt MASTER_CAMNOC_HF + &bimc SLAVE_EBI>; + }; + }; + + level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level2-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmnrt_virt MASTER_CAMNOC_SF + &bimc SLAVE_EBI>; + }; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr: level1-rt0-wr { + cell-index = <2>; + node-name = "level1-rt0-wr"; + parent-node = <&level2_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd_wr: level1-nrt0-rd-wr { + cell-index = <3>; + node-name = "level1-nrt0-rd-wr"; + parent-node = <&level2_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ope0_all_wr: ope0-all-wr { + cell-index = <4>; + node-name = "ope0-all-wr"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope0_all_rd: ope0-all-rd { + cell-index = <5>; + node-name = "ope0-all-rd"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + tfe0_all_wr: tfe0-all-wr { + cell-index = <6>; + node-name = "tfe0-all-wr"; + client-name = "tfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe1_all_wr: tfe1-all-wr { + cell-index = <7>; + node-name = "tfe1-all-wr"; + client-name = "tfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe2_all_wr: tfe2-all-wr { + cell-index = <8>; + node-name = "tfe2-all-wr"; + client-name = "tfe2"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <9>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope_cdm0_all_rd: ope-cdm0-all-rd { + cell-index = <10>; + node-name = "ope-cdm0-all-rd"; + client-name = "ope-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <2>; + cdm-client-names = "vfe"; + status = "ok"; + }; + + cam_cpas_cdm: qcom,cpas-cdm0@5c23000 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm2_1"; + label = "cpas-cdm"; + reg = <0x5c23000 0x400>; + reg-names = "cpas-cdm0"; + reg-cam-base = <0x23000>; + interrupts = ; + interrupt-names = "cpas-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = "cam_cc_cpas_top_ahb_clk"; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>; + clock-rates = <0>; + clock-cntl-level = "svs"; + cdm-priority-group = <0x3>; + cdm-client-names = "tfe0", "tfe1", "tfe2"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + cam_ope_cdm: qcom,ope-cdm0@5c42000 { + cell-index = <0>; + compatible = "qcom,cam-ope-cdm2_1"; + label = "ope-cdm"; + reg = <0x5c42000 0x400>; + reg-names = "ope-cdm0"; + reg-cam-base = <0x42000>; + interrupts = ; + interrupt-names = "ope-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = <0 0 0>, + <0 0 0>, + <0 0 0>, + <0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ope"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "tfe"; + status = "ok"; + }; + + cam_tfe_csid0: qcom,tfe_csid0@5c6e000 { + cell-index = <0>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c6e000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x6e000 0x11000 0x13000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <266570000 0 0 0 300000000 0>, + <426400000 0 0 0 460800000 0>, + <466500000 0 0 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + ppi-enable; + status = "ok"; + }; + + cam_tfe0: qcom,tfe0@5c6e000 { + cell-index = <0>; + compatible = "qcom,tfe530"; + reg-names = "tfe0"; + reg = <0x5c6e000 0x5000>; + reg-cam-base = <0x6e000>; + interrupt-names = "tfe0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <300000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <4>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + status = "ok"; + }; + + cam_tfe_csid1: qcom,tfe_csid1@5c75000 { + cell-index = <1>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c75000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x75000 0x11000 0x13000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <266570000 0 0 0 300000000 0>, + <426400000 0 0 0 460800000 0>, + <466500000 0 0 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + ppi-enable; + status = "ok"; + }; + + cam_tfe1: qcom,tfe1@5c75000 { + cell-index = <1>; + compatible = "qcom,tfe530"; + reg-names = "tfe1"; + reg = <0x5c75000 0x5000>; + reg-cam-base = <0x75000>; + interrupt-names = "tfe1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <300000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <5>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + status = "ok"; + }; + + cam_tfe_csid2: qcom,tfe_csid2@5c7c000 { + cell-index = <2>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c7c000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x5800>; + reg-cam-base = <0x7c000 0x11000 0x13000>; + interrupt-names = "csid2"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CLK>; + clock-rates = + <266570000 0 0 0 300000000 0>, + <426400000 0 0 0 460800000 0>, + <466500000 0 0 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + ppi-enable; + status = "ok"; + }; + + cam_tfe2: qcom,tfe2@5c7c000 { + cell-index = <2>; + compatible = "qcom,tfe530"; + reg-names = "tfe2"; + reg = <0x5c7c000 0x5000>; + reg-cam-base = <0x7c000>; + interrupt-names = "tfe2"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_2_CLK>; + clock-rates = + <300000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <6>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + status = "ok"; + }; + + cam_ppi0: qcom,ppi0@5cb3000 { + cell-index = <0>; + compatible = "qcom,ppi100"; + reg-names = "ppi0"; + reg = <0x5cb3000 0x200>; + reg-cam-base = <0xb3000>; + interrupt-names = "ppi0"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-names = "gcc_camss_cphy_0_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi1: qcom,ppi1@5cb3200 { + cell-index = <1>; + compatible = "qcom,ppi100"; + reg-names = "ppi1"; + reg = <0x5cb3200 0x200>; + reg-cam-base = <0xb3200>; + interrupt-names = "ppi1"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-names = "gcc_camss_cphy_1_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi2: qcom,ppi2@5cb3400 { + cell-index = <2>; + compatible = "qcom,ppi100"; + reg-names = "ppi2"; + reg = <0x5cb3400 0x200>; + reg-cam-base = <0xb3400>; + interrupt-names = "ppi2"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_2_CLK>; + clock-names = "gcc_camss_cphy_2_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi3: qcom,ppi3@5cb3600 { + cell-index = <3>; + compatible = "qcom,ppi100"; + reg-names = "ppi3"; + reg = <0x5cb3600 0x200>; + reg-cam-base = <0xb3600>; + interrupt-names = "ppi3"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_3_CLK>; + clock-names = "gcc_camss_cphy_3_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_tfe_tpg0: qcom,tpg0@5c66000 { + cell-index = <0>; + compatible = "qcom,tpg101"; + reg-names = "tpg0", "top"; + reg = <0x5c66000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x66000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_0_cphy_rx_clk", + "gcc_camss_cphy_0_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-rates = + <256000000 0 0>, + <384000000 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + cam_tfe_tpg1: qcom,tpg0@5c68000 { + cell-index = <1>; + compatible = "qcom,tpg101"; + reg-names = "tpg1", "top"; + reg = <0x5c68000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x68000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_1_cphy_rx_clk", + "gcc_camss_cphy_1_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-rates = + <256000000 0 0>, + <384000000 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <1>; + status = "ok"; + }; + + ope: qcom,ope@0x5c42000 { + cell-index = <0>; + compatible = "qcom,ope"; + reg = + <0x5c42000 0x400>, + <0x5c42400 0x200>, + <0x5c42600 0x200>, + <0x5c42800 0x4400>, + <0x5c46c00 0x190>, + <0x5c46d90 0xA00>; + reg-names = + "ope_cdm", + "ope_top", + "ope_qos", + "ope_pp", + "ope_bus_rd", + "ope_bus_wr"; + reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>; + interrupts = ; + interrupt-names = "ope"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk_src", + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = + <171428571 0 200000000 0>, + <171428571 0 266600000 0>, + <240000000 0 480000000 0>, + <240000000 0 580000000 0>; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + src-clock-name = "ope_clk_src"; + clock-control-debugfs = "true"; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; + status = "ok"; + }; +}; From 2b1997193c982a6befd89993e24aacc8f1b68f0f Mon Sep 17 00:00:00 2001 From: Om Parkash Date: Wed, 19 May 2021 00:27:56 +0530 Subject: [PATCH 171/190] ARM: dts: msm: Add camera sensor DTSi for monaco Add camera and camera sensor DTSi for monaco platform CRs-Fixed: 2948896 Change-Id: I72338a475962708c6276cf1bb9981fec4ece47db --- monaco-camera-sensor-idp.dtsi | 180 ++++++++ monaco-camera.dtsi | 749 ++++++++++++++++++++++++++++++++++ 2 files changed, 929 insertions(+) create mode 100644 monaco-camera-sensor-idp.dtsi create mode 100644 monaco-camera.dtsi diff --git a/monaco-camera-sensor-idp.dtsi b/monaco-camera-sensor-idp.dtsi new file mode 100644 index 000000000000..3f5d2ef09b65 --- /dev/null +++ b/monaco-camera-sensor-idp.dtsi @@ -0,0 +1,180 @@ +#include +&soc { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L7C>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3C>; + cam_vana-supply = <&L5C>; + cam_vdig-supply = <&L1C>; + cam_vaf-supply = <&L7C>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <2500 50000 180000 0 125000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_front: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L4C>; + cam_vana-supply = <&L6C>; + cam_vdig-supply = <&L2C>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <3000 35000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 33 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L3C>; + cam_vana-supply = <&L5C>; + cam_vdig-supply = <&L1C>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <2500 50000 180000 0 125000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Front*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L4C>; + cam_vana-supply = <&L6C>; + cam_vdig-supply = <&L2C>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <3000 35000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 33 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; +}; diff --git a/monaco-camera.dtsi b/monaco-camera.dtsi new file mode 100644 index 000000000000..55570d5fb6a6 --- /dev/null +++ b/monaco-camera.dtsi @@ -0,0 +1,749 @@ +#include + +&soc { + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + status = "ok"; + }; + + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0x05C52000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x52000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr","mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L12A>; + mipi-csi-vdd2-supply = <&L9A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 900000 1200000>; + rgltr-max-voltage = <0 0 900000 1200000>; + rgltr-load-current = <0 0 126000 74000>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <256000000 0 300000000 0>, + <384000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; + reg = <0x05C54000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x54000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr","mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L12A>; + mipi-csi-vdd2-supply = <&L9A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 0 900000 1200000>; + rgltr-max-voltage = <0 0 900000 1200000>; + rgltr-load-current = <0 0 126000 74000>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "svs", "turbo"; + clock-rates = + <19200000 0 19200000 0>, + <256000000 0 300000000 0>, + <384000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x05C1B000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1B000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_0_CLK>, + <&gcc GCC_CAMSS_CCI_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 37 0>, + <&tlmm 38 0>, + <&tlmm 39 0>, + <&tlmm 40 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + + msm_cam_smmu_tfe { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x400 0x000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cam-smmu-label = "tfe"; + tfe_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_ope { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x820 0x000>, + <&apps_smmu 0x840 0x000>; + qcom,iommu-faults = "non-fatal"; + multiple-client-devices; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cam-smmu-label = "ope", "ope-cdm"; + ope_iova_mem_map: iova-mem-map { + /* IO region is approximately 3.4 GB */ + iova-mem-region-io { + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cpas_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x800 0x000>; + cam-smmu-label = "cpas-cdm"; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; + cpas_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + /* IO region is approximately 3.4 GB */ + iova-region-name = "io"; + iova-region-start = <0x7400000>; + iova-region-len = <0xd8c00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + cam-smmu-label = "cam-secure"; + qcom,secure-cb; + }; + }; + + qcom,cam-cpas@5c11000 { + cell-index = <0>; + compatible = "qcom,cam-cpas", "simple-bus"; + label = "cpas"; + arch-compat = "cpas_top"; + status = "ok"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x11000 0x13000>; + cam_hw_fuse = ; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&gcc_camss_top_gdsc>; + clock-names = + "gcc_camss_ahb_clk", + "gcc_camss_top_ahb_clk", + "gcc_camss_top_ahb_clk_src", + "gcc_camss_axi_clk", + "gcc_camss_axi_clk_src", + "gcc_camss_nrt_axi_clk", + "gcc_camss_rt_axi_clk"; + clocks = + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_AXI_CLK_SRC>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>; + src-clock-name = "gcc_camss_axi_clk_src"; + clock-rates = + <0 0 0 0 0 0 0>, + <0 0 80000000 0 19200000 0 0>, + <0 0 80000000 0 150000000 0 0>, + <0 0 80000000 0 200000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>, + <0 0 80000000 0 300000000 0 0>; + clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", + "svs_l1", "nominal", "turbo"; + qcom,cx-ipeak-gpu-limit = <921600000>; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + interconnect-names = "cam_ahb"; + interconnects =<&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_CAMERA_CFG>; + cam-ahb-num-cases = <7>; + cam-ahb-bw-KBps = + <0 0>, <0 133333>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corners = ; + vdd-corner-ahb-mapping = "suspend", "lowsvs", "lowsvs", + "lowsvs", "lowsvs", "svs", "svs_l1", "svs_l1", + "svs_l1", "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "cci0", + "csid0", "csid1", "tfe0", + "tfe1", "ope0", "cam-cdm-intf0", + "cpas-cdm0", "ope-cdm0", "tpg0", "tpg1"; + + camera-bus-nodes { + level2-nodes { + level-index = <2>; + level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum { + cell-index = <0>; + node-name = "level2-rt0-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0"; + interconnects = + <&mmrt_virt MASTER_CAMNOC_HF + &bimc SLAVE_EBI_CH0>; + }; + }; + + level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level2-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + interconnects = + <&mmnrt_virt MASTER_CAMNOC_SF + &bimc SLAVE_EBI_CH0>; + }; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt0_wr: level1-rt0-wr { + cell-index = <2>; + node-name = "level1-rt0-wr"; + parent-node = <&level2_rt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd_wr: level1-nrt0-rd-wr { + cell-index = <3>; + node-name = "level1-nrt0-rd-wr"; + parent-node = <&level2_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ope0_all_wr: ope0-all-wr { + cell-index = <4>; + node-name = "ope0-all-wr"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope0_all_rd: ope0-all-rd { + cell-index = <5>; + node-name = "ope0-all-rd"; + client-name = "ope0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + tfe0_all_wr: tfe0-all-wr { + cell-index = <6>; + node-name = "tfe0-all-wr"; + client-name = "tfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + tfe1_all_wr: tfe1-all-wr { + cell-index = <7>; + node-name = "tfe1-all-wr"; + client-name = "tfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt0_wr>; + }; + + cpas_cdm0_all_rd: cpas-cdm0-all-rd { + cell-index = <9>; + node-name = "cpas-cdm0-all-rd"; + client-name = "cpas-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + + ope_cdm0_all_rd: ope-cdm0-all-rd { + cell-index = <10>; + node-name = "ope-cdm0-all-rd"; + client-name = "ope-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd_wr>; + }; + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <2>; + cdm-client-names = "vfe"; + status = "ok"; + }; + + cam_cpas_cdm: qcom,cpas-cdm0@5c23000 { + cell-index = <0>; + compatible = "qcom,cam-cpas-cdm2_0"; + label = "cpas-cdm"; + reg = <0x5c23000 0x400>; + reg-names = "cpas-cdm0"; + reg-cam-base = <0x23000>; + interrupts = ; + interrupt-names = "cpas-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = "cam_cc_cpas_top_ahb_clk"; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>; + clock-rates = <0>; + clock-cntl-level = "svs"; + cdm-client-names = "tfe0", "tfe1"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + cam_ope_cdm: qcom,ope-cdm0@5c42000 { + cell-index = <0>; + compatible = "qcom,cam-ope-cdm2_1"; + label = "ope-cdm"; + reg = <0x5c42000 0x400>; + reg-names = "ope-cdm0"; + reg-cam-base = <0x42000>; + interrupts = ; + interrupt-names = "ope-cdm0"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = <0 0 0>, + <0 0 0>, + <0 0 0>, + <0 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + cdm-client-names = "ope"; + config-fifo; + fifo-depths = <64 64 64 64>; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "tfe"; + status = "ok"; + }; + + cam_tfe_csid0: qcom,tfe_csid0@5c6e000 { + cell-index = <0>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c6e000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x6e000 0x11000 0x13000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <240000000 0 0 0 256000000 0>, + <384000000 0 0 0 460800000 0>, + <426400000 0 0 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe0: qcom,tfe0@5c6e000 { + cell-index = <0>; + compatible = "qcom,tfe530"; + reg-names = "tfe0"; + reg = <0x5c6e000 0x5000>; + reg-cam-base = <0x6e000>; + interrupt-names = "tfe0"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CLK>; + clock-rates = + <256000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <4>; + status = "ok"; + }; + + cam_tfe_csid1: qcom,tfe_csid1@5c75000 { + cell-index = <1>; + compatible = "qcom,csid530"; + reg-names = "csid", "top", "camnoc"; + reg = <0x5c75000 0x1000>, + <0x5c11000 0x1000>, + <0x5c13000 0x4000>; + reg-cam-base = <0x75000 0x11000 0x13000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_csid_clk_src", + "tfe_csid_clk", + "cphy_rx_clk_src", + "tfe_cphy_rx_clk", + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <240000000 0 240000000 0 256000000 0>, + <384000000 0 341333333 0 460800000 0>, + <426400000 0 384000000 0 576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_tfe1: qcom,tfe1@5c75000 { + cell-index = <1>; + compatible = "qcom,tfe530"; + reg-names = "tfe1"; + reg = <0x5c75000 0x5000>; + reg-cam-base = <0x75000>; + interrupt-names = "tfe1"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "tfe_clk_src", + "tfe_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CLK>; + clock-rates = + <256000000 0>, + <460800000 0>, + <576000000 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "tfe_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <5>; + status = "ok"; + }; + + cam_tfe_tpg0: qcom,tpg0@5c66000 { + cell-index = <0>; + compatible = "qcom,tpg101"; + reg-names = "tpg0", "top"; + reg = <0x5c66000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x66000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_0_cphy_rx_clk", + "gcc_camss_cphy_0_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-rates = + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + cam_tfe_tpg1: qcom,tpg1@5c68000 { + cell-index = <1>; + compatible = "qcom,tpg101"; + reg-names = "tpg1", "top"; + reg = <0x5c68000 0x400>, + <0x5c11000 0x1000>; + reg-cam-base = <0x68000 0x11000>; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "cphy_rx_clk_src", + "tfe_1_cphy_rx_clk", + "gcc_camss_cphy_1_clk"; + clocks = + <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-rates = + <240000000 0 0>, + <341333333 0 0>, + <384000000 0 0>; + clock-cntl-level = "svs", "svs_l1", "turbo"; + src-clock-name = "cphy_rx_clk_src"; + clock-control-debugfs = "false"; + status = "ok"; + }; + + qcom,cam-ope { + compatible = "qcom,cam-ope"; + compat-hw-name = "qcom,ope"; + num-ope = <1>; + status = "ok"; + }; + + ope: qcom,ope@0x5c42000 { + cell-index = <0>; + compatible = "qcom,ope"; + reg = + <0x5c42000 0x400>, + <0x5c42400 0x200>, + <0x5c42600 0x200>, + <0x5c42800 0x4400>, + <0x5c46c00 0x190>, + <0x5c46d90 0xA00>; + reg-names = + "ope_cdm", + "ope_top", + "ope_qos", + "ope_pp", + "ope_bus_rd", + "ope_bus_wr"; + reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>; + interrupts = ; + interrupt-names = "ope"; + regulator-names = "camss"; + camss-supply = <&gcc_camss_top_gdsc>; + clock-names = + "ope_ahb_clk_src", + "ope_ahb_clk", + "ope_clk_src", + "ope_clk"; + clocks = + <&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_OPE_CLK_SRC>, + <&gcc GCC_CAMSS_OPE_CLK>; + clock-rates = + <171428571 0 200000000 0>, + <171428571 0 266600000 0>, + <240000000 0 465000000 0>, + <240000000 0 580000000 0>; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + src-clock-name = "ope_clk_src"; + status = "ok"; + }; +}; From c36d81957655c5d34df492ea16f17f17228e203b Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Wed, 19 May 2021 14:52:21 +0530 Subject: [PATCH 172/190] ARM: dts: msm: Add sensor devicetree for blair camera Added camera sensor dtsi changes for blair. CRs-Fixed: 2954621 Change-Id: I1e9c53a837bd461e64b9cea1f410e8a236fb1eaf --- blair-camera-sensor-cdp.dtsi | 355 +++++++++++++++++++++++++++++ blair-camera-sensor-mtp.dtsi | 425 +++++++++++++++++++++++++++++++++++ 2 files changed, 780 insertions(+) create mode 100644 blair-camera-sensor-cdp.dtsi create mode 100644 blair-camera-sensor-mtp.dtsi diff --git a/blair-camera-sensor-cdp.dtsi b/blair-camera-sensor-cdp.dtsi new file mode 100644 index 000000000000..fc59c2425df0 --- /dev/null +++ b/blair-camera-sensor-cdp.dtsi @@ -0,0 +1,355 @@ +#include +&soc { + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master= <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; diff --git a/blair-camera-sensor-mtp.dtsi b/blair-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..948832e81cc0 --- /dev/null +++ b/blair-camera-sensor-mtp.dtsi @@ -0,0 +1,425 @@ +#include +&soc { + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1056000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG0*/ + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG1*/ + qcom,cam-tpg1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG2*/ + qcom,cam-tpg2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <6>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +}; + +&cam_cci1 { + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master= <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From 6f36f361fe81dbc8402550c366afcece11ddf4e3 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Tue, 18 May 2021 11:11:40 +0530 Subject: [PATCH 173/190] ARM: dts: msm: Add CSIPHY/CCI nodes for blair Add support for CSIPHY/CCI for blair camera. CRs-Fixed: 2954621 Change-Id: Ic1aca1f2f858dc3a802977e62154543e80b461a7 --- blair-camera.dtsi | 322 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 322 insertions(+) diff --git a/blair-camera.dtsi b/blair-camera.dtsi index 4c25045f0e1b..8e691e387231 100644 --- a/blair-camera.dtsi +++ b/blair-camera.dtsi @@ -6,6 +6,328 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0 { + cell-index = <0>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0x05C52000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x52000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 16200 9000>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + clock-rates = + <256000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1 { + cell-index = <1>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0x05C54000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x54000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 16200 9000>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + clock-rates = + <256000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2 { + cell-index = <2>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0x05C56000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x56000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 16200 9000>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_2_CLK>, + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + clock-rates = + <256000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3 { + cell-index = <3>; + compatible = "qcom,csiphy-v1.2.1", "qcom,csiphy"; + reg = <0x05C58000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x58000>; + interrupts = ; + interrupt-names = "csiphy"; + regulator-names = "gdscr", "mipi-csi-vdd1", + "mipi-csi-vdd2"; + gdscr-supply = <&gcc_camss_top_gdsc>; + mipi-csi-vdd1-supply = <&L7A>; + mipi-csi-vdd2-supply = <&L4A>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 880000 1200000>; + rgltr-max-voltage = <0 1050000 1300000>; + rgltr-load-current = <0 16200 9000>; + clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, + <&gcc GCC_CAMSS_CPHY_3_CLK>, + <&gcc GCC_CAMSS_CSI3PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMSS_CSI3PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + clock-rates = + <256000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>, + <384000000 0 300000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0x05C1B000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1B000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_0_CLK>, + <&gcc GCC_CAMSS_CCI_0_CLK_SRC>; + clock-names = "cci_0_clk", + "cci_0_clk_src"; + src-clock-name = "cci_0_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci0_active &cci1_active>; + pinctrl-1 = <&cci0_suspend &cci1_suspend>; + gpios = <&tlmm 39 0>, + <&tlmm 40 0>, + <&tlmm 41 0>, + <&tlmm 42 0>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 1 1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0x05C1C000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x1C000>; + interrupt-names = "cci"; + interrupts = ; + status = "ok"; + gdscr-supply = <&gcc_camss_top_gdsc>; + regulator-names = "gdscr"; + clocks = <&gcc GCC_CAMSS_CCI_1_CLK>, + <&gcc GCC_CAMSS_CCI_1_CLK_SRC>; + clock-names = "cci_1_clk", + "cci_1_clk_src"; + src-clock-name = "cci_1_clk_src"; + clock-cntl-level = "svs"; + clock-rates = <0 37500000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + gpios = <&tlmm 43 0>, + <&tlmm 44 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <1>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam-sync { compatible = "qcom,cam-sync"; status = "ok"; From f5be77d714a8c4562a9177ceb39190977c32a762 Mon Sep 17 00:00:00 2001 From: Om Parkash Date: Sun, 23 May 2021 22:28:25 +0530 Subject: [PATCH 174/190] ARM: dts: msm: Add PPI I/F support for monaco camera Add DTSi changes for PPI bridge for monaco camera CRs-Fixed: 2948896 Change-Id: I7f8c34dda71cd25374ae11390d7cc211b12867be --- monaco-camera.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/monaco-camera.dtsi b/monaco-camera.dtsi index 55570d5fb6a6..907e38a316b8 100644 --- a/monaco-camera.dtsi +++ b/monaco-camera.dtsi @@ -551,6 +551,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; + ppi-enable; status = "ok"; }; @@ -614,6 +615,7 @@ clock-cntl-level = "svs", "svs_l1", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; + ppi-enable; status = "ok"; }; @@ -644,6 +646,36 @@ status = "ok"; }; + cam_ppi0: qcom,ppi0@5cb3000 { + cell-index = <0>; + compatible = "qcom,ppi100"; + reg-names = "ppi0"; + reg = <0x5cb3000 0x200>; + reg-cam-base = <0xb3000>; + interrupt-names = "ppi0"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_0_CLK>; + clock-names = "gcc_camss_cphy_0_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + + cam_ppi1: qcom,ppi1@5cb3200 { + cell-index = <1>; + compatible = "qcom,ppi100"; + reg-names = "ppi1"; + reg = <0x5cb3200 0x200>; + reg-cam-base = <0xb3200>; + interrupt-names = "ppi1"; + interrupts = ; + clocks = <&gcc GCC_CAMSS_CPHY_1_CLK>; + clock-names = "gcc_camss_cphy_1_clk"; + clock-cntl-level = "svs"; + clock-rates = <0>; + status = "ok"; + }; + cam_tfe_tpg0: qcom,tpg0@5c66000 { cell-index = <0>; compatible = "qcom,tpg101"; From 91898bbfcdcd2bdc1f6b0b84613fe3a658a5ff44 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Fri, 30 Apr 2021 02:50:07 +0530 Subject: [PATCH 175/190] ARM: dts: msm: Add imx766 configs in DTSI Add actuator, sensor, eeprom nodes for QPD sensor IMX766 in MTP dtsi. CRs-Fixed: 2952585 Change-Id: Ic31c754eb40cf3bcd5af99ba1a9ad991b45b3b76 --- lahaina-camera-sensor-mtp.dtsi | 78 ++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/lahaina-camera-sensor-mtp.dtsi b/lahaina-camera-sensor-mtp.dtsi index 488c6cb18c3c..bde7707381d2 100644 --- a/lahaina-camera-sensor-mtp.dtsi +++ b/lahaina-camera-sensor-mtp.dtsi @@ -217,6 +217,42 @@ clock-rates = <24000000>; }; + eeprom9: qcom,eeprom9 { + cell-index = <7>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vaf-supply = <&L7I>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig", "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 2700000>; + rgltr-max-voltage = <1800000 2900000 1900000 1200000 0 3000000>; + rgltr-load-current = <15000 52000 72000 140000 0 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + qcom,cam-sensor0 { cell-index = <5>; compatible = "qcom,cam-sensor"; @@ -432,6 +468,48 @@ clock-cntl-level = "nominal"; clock-rates = <24000000>; }; + + qcom,cam-sensor9 { + cell-index = <10>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + eeprom-src = <&eeprom9>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_aux>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + cam_vio-supply = <&L3J>; + cam_vana-supply = <&L4I>; + cam_v_custom1-supply = <&L5I>; + cam_vdig-supply = <&L1I>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + "cam_vdig", "cam_clk", "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2700000 1700000 1000000 0 3200000>; + rgltr-max-voltage = <1800000 2900000 1900000 1200000 0 3960000>; + rgltr-load-current = <15000 52000 72000 140000 0 2000000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 17 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; }; &cam_cci1 { From 50435b01206904d8224f08df726f3f9eb5e89cf8 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 27 May 2021 13:02:45 +0530 Subject: [PATCH 176/190] ARM: dts: msm: Add I2C flash node for holi pro Add I2C flash node in sensor device tree for holi pro camera. CRs-Fixed: 2938804 Change-Id: I269bb2658d4b3200a88fb249dab7b887c0b8dade --- holi-camera-sensor-pm6125-cdp.dtsi | 28 +++++++++++++++++++++++++ holi-camera-sensor-pm6125-mtp.dtsi | 28 +++++++++++++++++++++++++ holi-camera-sensor-usbc-pm6125-mtp.dtsi | 28 +++++++++++++++++++++++++ 3 files changed, 84 insertions(+) diff --git a/holi-camera-sensor-pm6125-cdp.dtsi b/holi-camera-sensor-pm6125-cdp.dtsi index 1e2ead27039c..2e0c6eea8568 100644 --- a/holi-camera-sensor-pm6125-cdp.dtsi +++ b/holi-camera-sensor-pm6125-cdp.dtsi @@ -1,4 +1,6 @@ #include +#include + &soc { qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; @@ -93,6 +95,29 @@ clock-rates = <19200000>; }; + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -102,6 +127,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; @@ -145,6 +171,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -388,6 +415,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; diff --git a/holi-camera-sensor-pm6125-mtp.dtsi b/holi-camera-sensor-pm6125-mtp.dtsi index 1e2ead27039c..2e0c6eea8568 100644 --- a/holi-camera-sensor-pm6125-mtp.dtsi +++ b/holi-camera-sensor-pm6125-mtp.dtsi @@ -1,4 +1,6 @@ #include +#include + &soc { qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; @@ -93,6 +95,29 @@ clock-rates = <19200000>; }; + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -102,6 +127,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; @@ -145,6 +171,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -388,6 +415,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; diff --git a/holi-camera-sensor-usbc-pm6125-mtp.dtsi b/holi-camera-sensor-usbc-pm6125-mtp.dtsi index 1e2ead27039c..2e0c6eea8568 100644 --- a/holi-camera-sensor-usbc-pm6125-mtp.dtsi +++ b/holi-camera-sensor-usbc-pm6125-mtp.dtsi @@ -1,4 +1,6 @@ #include +#include + &soc { qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; @@ -93,6 +95,29 @@ clock-rates = <19200000>; }; + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -102,6 +127,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; @@ -145,6 +171,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -388,6 +415,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; From 8a91a050c7e2d28db9793b91976f9bdb5213d2b4 Mon Sep 17 00:00:00 2001 From: Anil Kumar Kanakanti Date: Tue, 1 Jun 2021 13:35:33 +0530 Subject: [PATCH 177/190] ARM: dts: msm: Add VAF regulator to QRD sensor nodes Add common VAF regulator to each sensor devicetree node to avoid interference with CCI during multi camera scenario. CRs-Fixed: 2937228 Change-Id: I2430e572103f1468bac62cd1396270136d0d493d --- yupik-camera-sensor-qrd.dtsi | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/yupik-camera-sensor-qrd.dtsi b/yupik-camera-sensor-qrd.dtsi index 5704d78ed245..676c156100dc 100644 --- a/yupik-camera-sensor-qrd.dtsi +++ b/yupik-camera-sensor-qrd.dtsi @@ -171,15 +171,16 @@ led-flash-src = <&led_flash_triple_rear_aux>; cam_vio-supply = <&L3J>; cam_vana-supply = <&L4I>; + cam_vaf-supply = <&L7I>; cam_vdig-supply = <&L2I>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <10000 52000 140000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 2960000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 3000000 1150000 0 3960000>; + rgltr-load-current = <10000 52000 103000 140000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_active @@ -311,16 +312,17 @@ led-flash-src = <&led_flash_triple_rear>; cam_vio-supply = <&L3J>; cam_vana-supply = <&L3I>; + cam_vaf-supply = <&L7I>; cam_v_custom1-supply = <&L5I>; cam_vdig-supply = <&L1I>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_v_custom1", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_v_custom1", "cam_vdig","cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2904000 1800000 1104000 0 3296000>; - rgltr-max-voltage = <1800000 3000000 1900000 1200000 0 3960000>; - rgltr-load-current = <5000 68000 74000 805000 0 2000000>; + rgltr-min-voltage = <1800000 2904000 2960000 1800000 1104000 0 3296000>; + rgltr-max-voltage = <1800000 3000000 3000000 1900000 1200000 0 3960000>; + rgltr-load-current = <5000 68000 103000 74000 805000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk2_active @@ -355,15 +357,16 @@ led-flash-src = <&led_flash_triple_rear_aux2>; cam_vio-supply = <&L3J>; cam_vana-supply = <&L6I>; + cam_vaf-supply = <&L7I>; cam_vdig-supply = <&L2I>; cam_clk-supply = <&cam_cc_titan_top_gdsc>; cam_bob-supply = <&BOB>; - regulator-names = "cam_vio", "cam_vana", "cam_vdig", + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", "cam_clk", "cam_bob"; rgltr-cntrl-support; - rgltr-min-voltage = <1800000 2800000 1056000 0 3296000>; - rgltr-max-voltage = <1800000 2900000 1150000 0 3960000>; - rgltr-load-current = <3000 52000 257000 0 2000000>; + rgltr-min-voltage = <1800000 2800000 2960000 1056000 0 3296000>; + rgltr-max-voltage = <1800000 2900000 3000000 1150000 0 3960000>; + rgltr-load-current = <3000 52000 103000 257000 0 2000000>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk3_active From 7ed0a0f3b3b2e9dc98eccc9f609d65ab461817c5 Mon Sep 17 00:00:00 2001 From: Shravya Samala Date: Mon, 7 Jun 2021 12:20:08 +0530 Subject: [PATCH 178/190] ARM: dts: msm: Revert cx-ipeak support from Blair Camera Revert cx-ipeak support from blair camera and also mark page faults as fatal. CRs-Fixed: 2963178 Change-Id: Ia2fa010ce043776482a4f42a2af530b50e63226f --- blair-camera.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/blair-camera.dtsi b/blair-camera.dtsi index 8e691e387231..5fced0e6fc48 100644 --- a/blair-camera.dtsi +++ b/blair-camera.dtsi @@ -340,7 +340,6 @@ msm_cam_smmu_tfe { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0x800 0x000>; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cam-smmu-label = "tfe"; tfe_iova_mem_map: iova-mem-map { @@ -359,7 +358,6 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xc20 0x000>, <&apps_smmu 0xc40 0x000>; - qcom,iommu-faults = "non-fatal"; multiple-client-devices; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cam-smmu-label = "ope", "ope-cdm"; @@ -379,7 +377,6 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_smmu 0xc00 0x000>; cam-smmu-label = "cpas-cdm"; - qcom,iommu-faults = "non-fatal"; qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>; cpas_cdm_iova_mem_map: iova-mem-map { iova-mem-region-io { @@ -449,7 +446,6 @@ interconnect-names = "cam_ahb"; interconnects =<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; cam-ahb-num-cases = <7>; cam-ahb-bw-KBps = <0 0>, <0 133333>, <0 150000>, <0 150000>, @@ -762,7 +758,6 @@ src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; cam_hw_pid = <4>; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -827,7 +822,6 @@ src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; cam_hw_pid = <5>; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -892,7 +886,6 @@ src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; cam_hw_pid = <6>; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; @@ -1057,7 +1050,6 @@ clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ope_clk_src"; clock-control-debugfs = "true"; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; status = "ok"; }; }; From ac13dd12054fbf46ba1a6669756bd89eb4786ac7 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Mon, 7 Jun 2021 18:12:00 +0530 Subject: [PATCH 179/190] ARM: dts: msm: Add I2C flash node for blair Add I2C flash node in sensor device tree for blair camera. CRs-Fixed: 2954621 Change-Id: I2f1515de64f8915baf82b731d03c25054bffa1c2 --- blair-camera-sensor-cdp.dtsi | 27 +++++++++++++++++++++++++++ blair-camera-sensor-mtp.dtsi | 27 +++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/blair-camera-sensor-cdp.dtsi b/blair-camera-sensor-cdp.dtsi index fc59c2425df0..99a9ee91672f 100644 --- a/blair-camera-sensor-cdp.dtsi +++ b/blair-camera-sensor-cdp.dtsi @@ -1,4 +1,5 @@ #include +#include &soc { qcom,cam-res-mgr { @@ -94,6 +95,29 @@ clock-rates = <19200000>; }; + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -103,6 +127,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; @@ -146,6 +171,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -319,6 +345,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; diff --git a/blair-camera-sensor-mtp.dtsi b/blair-camera-sensor-mtp.dtsi index 948832e81cc0..494e78a25ff1 100644 --- a/blair-camera-sensor-mtp.dtsi +++ b/blair-camera-sensor-mtp.dtsi @@ -1,4 +1,5 @@ #include +#include &soc { qcom,cam-res-mgr { @@ -94,6 +95,29 @@ clock-rates = <19200000>; }; + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -103,6 +127,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; @@ -146,6 +171,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -389,6 +415,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; From 4f476ed18b5a8f12e358892ee3be24ec1a0689ed Mon Sep 17 00:00:00 2001 From: Yulei Yao Date: Mon, 31 May 2021 15:15:30 +0800 Subject: [PATCH 180/190] ARM: dts: msm: Add camera definition for blair QRD add camera node on blair QRD CRs-Fixed: 2958083 External Impact: No. Change-Id: Ifb813d75c68f8e44654e813a9c2792f2f71c3789 --- blair-camera-sensor-qrd.dtsi | 426 +++++++++++++++++++++++++++++++++++ 1 file changed, 426 insertions(+) create mode 100644 blair-camera-sensor-qrd.dtsi diff --git a/blair-camera-sensor-qrd.dtsi b/blair-camera-sensor-qrd.dtsi new file mode 100644 index 000000000000..a75dd3c094d9 --- /dev/null +++ b/blair-camera-sensor-qrd.dtsi @@ -0,0 +1,426 @@ +#include + +&soc { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_rear: qcom,actuator0 { + cell-index = <0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_rear: qcom,eeprom0 { + cell-index = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2880000 1056000 0 2800000>; + rgltr-max-voltage = <1800000 2880000 1056000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux2: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /* Rear*/ + qcom,cam-sensor0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L4P>; + cam_vaf-supply = <&L5P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vaf", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2880000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2880000 2800000 1056000 0>; + rgltr-load-current = <120000 80000 100000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_rear0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_rear0_reset_suspend>; + gpios = <&tlmm 29 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Rear Aux2*/ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux2>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <120000 80000 1200000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_rear1_reset_active>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_rear1_reset_suspend>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG0*/ + qcom,cam-tpg0 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <4>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG1*/ + qcom,cam-tpg1 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*TPG2*/ + qcom,cam-tpg2 { + cell-index = <6>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <6>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpios = <&tlmm 30 0>, + <&tlmm 35 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + sensor-mode = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +}; + +&cam_cci1 { + actuator_rear_aux: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master= <0>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <100000>; + status = "ok"; + }; + + eeprom_front: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + eeprom_rear_aux: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + /*Front*/ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L3P>; + cam_vdig-supply = <&L2P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1056000 0>; + rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-load-current = <0 80000 105000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_front0_reset_active>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_front0_reset_suspend>; + gpios = <&tlmm 32 0>, + <&tlmm 37 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <24000000>; + }; + + /*Rear Aux*/ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&L6P>; + cam_vana-supply = <&L7P>; + cam_vdig-supply = <&L1P>; + cam_clk-supply = <&gcc_camss_top_gdsc>; + cam_vaf-supply = <&L5P>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_vaf"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; + rgltr-load-current = <120000 80000 1200000 0 100000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_rear2_reset_active>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_rear2_reset_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 36 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-mode = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&gcc GCC_CAMSS_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; From 7ab1a44c96fbf981e45cbe5361d43e479726bc31 Mon Sep 17 00:00:00 2001 From: Om Parkash Date: Wed, 2 Jun 2021 18:23:28 +0530 Subject: [PATCH 181/190] ARM: dts: msm: Add correct voltages for sensor & phy There are voltage limit changes merged recently in regulator DTSi file so updating related values in camera DTSi: Add VAF Supply in camera sensor0 node. Correct CSI PHY regulator voltage values. Correct Sensor1 VDI voltage value. CRs-Fixed: 2948896 Change-Id: Ie93412a51eb06bf56d8d70699d74e108aad18fb9 --- monaco-camera-sensor-idp.dtsi | 21 ++++----- monaco-camera.dtsi | 87 ++++++++++++++++++----------------- 2 files changed, 54 insertions(+), 54 deletions(-) diff --git a/monaco-camera-sensor-idp.dtsi b/monaco-camera-sensor-idp.dtsi index 3f5d2ef09b65..4779882c0764 100644 --- a/monaco-camera-sensor-idp.dtsi +++ b/monaco-camera-sensor-idp.dtsi @@ -14,8 +14,8 @@ cam_vaf-supply = <&L7C>; regulator-names = "cam_vaf"; rgltr-cntrl-support; - rgltr-min-voltage = <2800000>; - rgltr-max-voltage = <2800000>; + rgltr-min-voltage = <3000000>; + rgltr-max-voltage = <3000000>; rgltr-load-current = <100000>; status = "ok"; }; @@ -26,15 +26,14 @@ cam_vio-supply = <&L3C>; cam_vana-supply = <&L5C>; cam_vdig-supply = <&L1C>; - cam_vaf-supply = <&L7C>; cam_clk-supply = <&gcc_camss_top_gdsc>; regulator-names = "cam_vio", "cam_vana", "cam_vdig", - "cam_clk", "cam_vaf"; + "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>; - rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>; - rgltr-load-current = <2500 50000 180000 0 125000>; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; + rgltr-load-current = <2500 50000 180000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -98,7 +97,7 @@ cell-index = <0>; compatible = "qcom,cam-sensor"; csiphy-sd-index = <0>; - sensor-position-roll = <270>; + sensor-position-roll = <90>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; @@ -113,7 +112,7 @@ pwm-switch; rgltr-min-voltage = <1800000 2800000 1200000 0>; rgltr-max-voltage = <1800000 2800000 1200000 0>; - rgltr-load-current = <2500 50000 180000 0 125000>; + rgltr-load-current = <2500 50000 180000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_active @@ -153,8 +152,8 @@ "cam_clk"; rgltr-cntrl-support; pwm-switch; - rgltr-min-voltage = <1800000 2800000 1056000 0>; - rgltr-max-voltage = <1800000 2800000 1056000 0>; + rgltr-min-voltage = <1800000 2800000 1200000 0>; + rgltr-max-voltage = <1800000 2800000 1200000 0>; rgltr-load-current = <3000 35000 80000 0>; gpio-no-mux = <0>; pinctrl-names = "cam_default", "cam_suspend"; diff --git a/monaco-camera.dtsi b/monaco-camera.dtsi index 907e38a316b8..eaeb0b95062c 100644 --- a/monaco-camera.dtsi +++ b/monaco-camera.dtsi @@ -6,6 +6,11 @@ status = "ok"; }; + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + cam_csiphy0: qcom,csiphy0 { cell-index = <0>; compatible = "qcom,csiphy-v1.2.3", "qcom,csiphy"; @@ -20,9 +25,9 @@ mipi-csi-vdd1-supply = <&L12A>; mipi-csi-vdd2-supply = <&L9A>; rgltr-cntrl-support; - rgltr-min-voltage = <0 0 900000 1200000>; - rgltr-max-voltage = <0 0 900000 1200000>; - rgltr-load-current = <0 0 126000 74000>; + rgltr-min-voltage = <0 904000 1232000>; + rgltr-max-voltage = <0 904000 1232000>; + rgltr-load-current = <0 126000 74000>; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_CPHY_0_CLK>, <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, @@ -34,7 +39,7 @@ src-clock-name = "csi0phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs", "turbo"; clock-rates = - <19200000 0 19200000 0>, + <19200000 0 19200000 0>, <256000000 0 300000000 0>, <384000000 0 300000000 0>; status = "ok"; @@ -54,9 +59,9 @@ mipi-csi-vdd1-supply = <&L12A>; mipi-csi-vdd2-supply = <&L9A>; rgltr-cntrl-support; - rgltr-min-voltage = <0 0 900000 1200000>; - rgltr-max-voltage = <0 0 900000 1200000>; - rgltr-load-current = <0 0 126000 74000>; + rgltr-min-voltage = <0 904000 1232000>; + rgltr-max-voltage = <0 904000 1232000>; + rgltr-load-current = <0 126000 74000>; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_CPHY_1_CLK>, <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, @@ -68,7 +73,7 @@ src-clock-name = "csi1phytimer_clk_src"; clock-cntl-level = "lowsvs", "svs", "turbo"; clock-rates = - <19200000 0 19200000 0>, + <19200000 0 19200000 0>, <256000000 0 300000000 0>, <384000000 0 300000000 0>; status = "ok"; @@ -253,7 +258,6 @@ regulator-names = "camss-vdd"; camss-vdd-supply = <&gcc_camss_top_gdsc>; clock-names = - "gcc_camss_ahb_clk", "gcc_camss_top_ahb_clk", "gcc_camss_top_ahb_clk_src", "gcc_camss_axi_clk", @@ -261,7 +265,6 @@ "gcc_camss_nrt_axi_clk", "gcc_camss_rt_axi_clk"; clocks = - <&gcc GCC_CAMERA_AHB_CLK>, <&gcc GCC_CAMSS_TOP_AHB_CLK>, <&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>, <&gcc GCC_CAMSS_AXI_CLK>, @@ -270,15 +273,12 @@ <&gcc GCC_CAMSS_RT_AXI_CLK>; src-clock-name = "gcc_camss_axi_clk_src"; clock-rates = - <0 0 0 0 0 0 0>, - <0 0 80000000 0 19200000 0 0>, - <0 0 80000000 0 150000000 0 0>, - <0 0 80000000 0 200000000 0 0>, - <0 0 80000000 0 300000000 0 0>, - <0 0 80000000 0 300000000 0 0>, - <0 0 80000000 0 300000000 0 0>; - clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + <0 0 0 0 0 0>, + <0 19200000 0 19200000 0 0>, + <0 80000000 0 150000000 0 0>, + <0 80000000 0 300000000 0 0>, + <0 80000000 0 300000000 0 0>; + clock-cntl-level = "suspend", "lowsvs", "svs", "nominal", "turbo"; qcom,cx-ipeak-gpu-limit = <921600000>; control-camnoc-axi-clk; camnoc-bus-width = <32>; @@ -502,10 +502,9 @@ <&gcc GCC_CAMSS_OPE_CLK_SRC>, <&gcc GCC_CAMSS_OPE_CLK>; clock-rates = <0 0 0>, - <0 0 0>, <0 0 0>, <0 0 0>; - clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; + clock-cntl-level = "lowsvs", "svs", "turbo"; cdm-client-names = "ope"; config-fifo; fifo-depths = <64 64 64 64>; @@ -545,10 +544,11 @@ <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <240000000 0 0 0 256000000 0>, - <384000000 0 0 0 460800000 0>, - <426400000 0 0 0 576000000 0>; - clock-cntl-level = "svs", "svs_l1", "turbo"; + <19200000 0 19200000 0 19200000 0>, + <256000000 0 256000000 0 288000000 0>, + <384000000 0 384000000 0 576000000 0>, + <426400000 0 384000000 0 576000000 0>; + clock-cntl-level = "lowsvs", "svs", "nominal", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; ppi-enable; @@ -572,10 +572,10 @@ <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <256000000 0>, - <460800000 0>, + <19200000 0>, + <288000000 0>, <576000000 0>; - clock-cntl-level = "svs", "svs_l1", "turbo"; + clock-cntl-level = "lowsvs", "svs", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; cam_hw_pid = <4>; @@ -609,10 +609,11 @@ <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <240000000 0 240000000 0 256000000 0>, - <384000000 0 341333333 0 460800000 0>, - <426400000 0 384000000 0 576000000 0>; - clock-cntl-level = "svs", "svs_l1", "turbo"; + <19200000 0 19200000 0 19200000 0>, + <256000000 0 256000000 0 288000000 0>, + <384000000 0 384000000 0 576000000 0>, + <426000000 0 384000000 0 576000000 0>; + clock-cntl-level = "lowsvs", "svs", "nominal", "turbo"; src-clock-name = "tfe_csid_clk_src"; clock-control-debugfs = "true"; ppi-enable; @@ -636,10 +637,10 @@ <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <256000000 0>, - <460800000 0>, + <19200000 0>, + <288000000 0>, <576000000 0>; - clock-cntl-level = "svs", "svs_l1", "turbo"; + clock-cntl-level = "lowsvs", "svs", "turbo"; src-clock-name = "tfe_clk_src"; clock-control-debugfs = "true"; cam_hw_pid = <5>; @@ -694,10 +695,10 @@ <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, <&gcc GCC_CAMSS_CPHY_0_CLK>; clock-rates = - <240000000 0 0>, - <341333333 0 0>, + <19200000 0 0>, + <256000000 0 0>, <384000000 0 0>; - clock-cntl-level = "svs", "svs_l1", "turbo"; + clock-cntl-level = "lowsvs", "svs", "turbo"; src-clock-name = "cphy_rx_clk_src"; clock-control-debugfs = "false"; status = "ok"; @@ -721,10 +722,10 @@ <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>, <&gcc GCC_CAMSS_CPHY_1_CLK>; clock-rates = - <240000000 0 0>, - <341333333 0 0>, + <19200000 0 0>, + <256000000 0 0>, <384000000 0 0>; - clock-cntl-level = "svs", "svs_l1", "turbo"; + clock-cntl-level = "lowsvs", "svs", "turbo"; src-clock-name = "cphy_rx_clk_src"; clock-control-debugfs = "false"; status = "ok"; @@ -770,11 +771,11 @@ <&gcc GCC_CAMSS_OPE_CLK_SRC>, <&gcc GCC_CAMSS_OPE_CLK>; clock-rates = + <19200000 0 19200000 0>, <171428571 0 200000000 0>, - <171428571 0 266600000 0>, <240000000 0 465000000 0>, <240000000 0 580000000 0>; - clock-cntl-level = "svs", "svs_l1", "nominal", "turbo"; + clock-cntl-level = "lowsvs", "svs", "nominal", "turbo"; src-clock-name = "ope_clk_src"; status = "ok"; }; From f3878fad6099bd0beb16438f169ef0c3e8bfc2a1 Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 17 Jun 2021 12:58:26 +0530 Subject: [PATCH 182/190] ARM: dts: msm: Add shared gpio node for I2C flash for blair This change adds support in device-tree for sharing gpio among multiple nodes. Gpio sharing among nodes enables each camera to have its own unique I2C flash node. CRs-Fixed: 2967922 Change-Id: I198c7141eaf9a8ac0ccde023ad6898138abe2a6c --- blair-camera-sensor-cdp.dtsi | 54 ++++++++++++++++++++++++++++++++++-- blair-camera-sensor-mtp.dtsi | 54 ++++++++++++++++++++++++++++++++++-- 2 files changed, 104 insertions(+), 4 deletions(-) diff --git a/blair-camera-sensor-cdp.dtsi b/blair-camera-sensor-cdp.dtsi index 99a9ee91672f..9791ae7279bd 100644 --- a/blair-camera-sensor-cdp.dtsi +++ b/blair-camera-sensor-cdp.dtsi @@ -5,6 +5,10 @@ qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; + gpios-shared = <407>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; }; }; @@ -118,6 +122,52 @@ status = "ok"; }; + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -171,7 +221,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux2>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -345,7 +395,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; diff --git a/blair-camera-sensor-mtp.dtsi b/blair-camera-sensor-mtp.dtsi index 494e78a25ff1..8c387e2ef242 100644 --- a/blair-camera-sensor-mtp.dtsi +++ b/blair-camera-sensor-mtp.dtsi @@ -5,6 +5,10 @@ qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; + gpios-shared = <407>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; }; }; @@ -118,6 +122,52 @@ status = "ok"; }; + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -171,7 +221,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux2>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -415,7 +465,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; From 8b15ce9ca2c56f2787c34f7bd6bc28e9fbae63f7 Mon Sep 17 00:00:00 2001 From: Yulei Yao Date: Sun, 20 Jun 2021 00:00:18 +0800 Subject: [PATCH 183/190] ARM: dts: msm: Add flash node to Camera on Blair QRD Add flash to camera for Blair QRD CRs-Fixed: 2958083 External Impact: No. Change-Id: Ia2c9971fac776c0cc0861c624854557c34d6773b --- blair-camera-sensor-qrd.dtsi | 77 ++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/blair-camera-sensor-qrd.dtsi b/blair-camera-sensor-qrd.dtsi index a75dd3c094d9..fc513998c44c 100644 --- a/blair-camera-sensor-qrd.dtsi +++ b/blair-camera-sensor-qrd.dtsi @@ -1,9 +1,14 @@ #include +#include &soc { qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; + gpios-shared = <407>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; }; }; @@ -94,6 +99,75 @@ clock-rates = <19200000>; }; + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -104,6 +178,7 @@ sensor-position-yaw = <180>; actuator-src = <&actuator_rear>; eeprom-src = <&eeprom_rear>; + led-flash-src = <&led_flash_rear>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L4P>; cam_vaf-supply = <&L5P>; @@ -147,6 +222,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; eeprom-src = <&eeprom_rear_aux2>; + led-flash-src = <&led_flash_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; cam_vdig-supply = <&L1P>; @@ -390,6 +466,7 @@ sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; eeprom-src = <&eeprom_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; cam_vdig-supply = <&L1P>; From ca84a522e6e8e2529696337b509b39f639a99555 Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Wed, 23 Jun 2021 20:01:13 +0530 Subject: [PATCH 184/190] ARM: dts: msm: Correct csid clock rate in Blair Camera This change is to correct csid clock rate in Blair camera. CRs-Fixed: 2944976 Change-Id: Ifb7dc37eac2df5530a9a7c7fec6dc6f69e067b97 --- blair-camera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/blair-camera.dtsi b/blair-camera.dtsi index 5fced0e6fc48..f2537858db28 100644 --- a/blair-camera.dtsi +++ b/blair-camera.dtsi @@ -724,7 +724,7 @@ <&gcc GCC_CAMSS_TFE_0_CLK_SRC>, <&gcc GCC_CAMSS_TFE_0_CLK>; clock-rates = - <266570000 0 0 0 300000000 0>, + <266571429 0 0 0 300000000 0>, <426400000 0 0 0 460800000 0>, <466500000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; @@ -788,7 +788,7 @@ <&gcc GCC_CAMSS_TFE_1_CLK_SRC>, <&gcc GCC_CAMSS_TFE_1_CLK>; clock-rates = - <266570000 0 0 0 300000000 0>, + <266571429 0 0 0 300000000 0>, <426400000 0 0 0 460800000 0>, <466500000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; @@ -852,7 +852,7 @@ <&gcc GCC_CAMSS_TFE_2_CLK_SRC>, <&gcc GCC_CAMSS_TFE_2_CLK>; clock-rates = - <266570000 0 0 0 300000000 0>, + <266571429 0 0 0 300000000 0>, <426400000 0 0 0 460800000 0>, <466500000 0 0 0 576000000 0>; clock-cntl-level = "svs", "svs_l1", "turbo"; From 7d7c52de371d95c60517939f54cf04967c10b6eb Mon Sep 17 00:00:00 2001 From: shiwgupt Date: Thu, 24 Jun 2021 21:19:04 +0530 Subject: [PATCH 185/190] ARM: dts: msm: Add shared gpio node for I2C flash for holi Pro This change adds support in device-tree for sharing gpio among multiple nodes. Gpio sharing among nodes enables each camera to have its own unique I2C flash node. CRs-Fixed: 2976840 Change-Id: Ib4ab92908b51c17f806e5acf2abe86cf41707e43 --- holi-camera-sensor-pm6125-cdp.dtsi | 54 ++++++++++++++++++++++++- holi-camera-sensor-pm6125-mtp.dtsi | 54 ++++++++++++++++++++++++- holi-camera-sensor-usbc-pm6125-mtp.dtsi | 54 ++++++++++++++++++++++++- 3 files changed, 156 insertions(+), 6 deletions(-) diff --git a/holi-camera-sensor-pm6125-cdp.dtsi b/holi-camera-sensor-pm6125-cdp.dtsi index 2e0c6eea8568..9a64b040cca0 100644 --- a/holi-camera-sensor-pm6125-cdp.dtsi +++ b/holi-camera-sensor-pm6125-cdp.dtsi @@ -5,6 +5,10 @@ qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; + gpios-shared = <407>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; }; }; @@ -118,6 +122,52 @@ status = "ok"; }; + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -171,7 +221,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux2>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -415,7 +465,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; diff --git a/holi-camera-sensor-pm6125-mtp.dtsi b/holi-camera-sensor-pm6125-mtp.dtsi index 2e0c6eea8568..9a64b040cca0 100644 --- a/holi-camera-sensor-pm6125-mtp.dtsi +++ b/holi-camera-sensor-pm6125-mtp.dtsi @@ -5,6 +5,10 @@ qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; + gpios-shared = <407>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; }; }; @@ -118,6 +122,52 @@ status = "ok"; }; + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -171,7 +221,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux2>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -415,7 +465,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; diff --git a/holi-camera-sensor-usbc-pm6125-mtp.dtsi b/holi-camera-sensor-usbc-pm6125-mtp.dtsi index 2e0c6eea8568..9a64b040cca0 100644 --- a/holi-camera-sensor-usbc-pm6125-mtp.dtsi +++ b/holi-camera-sensor-usbc-pm6125-mtp.dtsi @@ -5,6 +5,10 @@ qcom,cam-res-mgr { compatible = "qcom,cam-res-mgr"; status = "ok"; + gpios-shared = <407>; + pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; }; }; @@ -118,6 +122,52 @@ status = "ok"; }; + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + cci-master = <1>; + flash-type = ; + cam_vio-supply = <&L6P>; + regulator-names = "cam_vio"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000>; + rgltr-max-voltage = <1800000>; + rgltr-load-current = <120000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_flash_hwen_active>; + pinctrl-1 = <&cam_flash_hwen_suspend>; + gpios = <&tlmm 52 0>; + gpio-custom1 = <0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <0>; + gpio-req-tbl-label = "CUSTOM_GPIO1"; + status = "ok"; + }; + /* Rear*/ qcom,cam-sensor0 { cell-index = <0>; @@ -171,7 +221,7 @@ sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux2>; eeprom-src = <&eeprom_rear_aux2>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L3P>; @@ -415,7 +465,7 @@ sensor-position-pitch = <0>; sensor-position-yaw = <180>; actuator-src = <&actuator_rear_aux>; - led-flash-src = <&led_flash_rear>; + led-flash-src = <&led_flash_rear_aux>; eeprom-src = <&eeprom_rear_aux>; cam_vio-supply = <&L6P>; cam_vana-supply = <&L7P>; From 57f791965d089422a969cfe18d6f5f0d143a40de Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Thu, 15 Apr 2021 12:18:22 +0530 Subject: [PATCH 186/190] ARM: dts: msm: Add fuse support to enable OT value for RT block This change is to add fuse based control to enable and disable OT value of RT block for Yupik camera. CRs-Fixed: 2924987 Change-Id: I7d10b4da261cfc57c170d417bd74749a564bc767 --- yupik-camera.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index beb11cfba3da..9d76d3cd6f7e 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -1147,7 +1147,8 @@ , , , - ; + , + ; interrupt-names = "cpas_camnoc"; interrupts = ; camnoc-axi-min-ib-bw = <3000000000>; From 9d5808326fb4aee7766f6cb5e02af844d4c0cdd2 Mon Sep 17 00:00:00 2001 From: Vishal Verma Date: Fri, 9 Jul 2021 20:23:12 +0530 Subject: [PATCH 187/190] ARM: dts: msm: Correct the PHY index for TPG nodes update csiphy index in tpg dt node to fix max csiphy index issue. CRs-Fixed: 2990938 Change-Id: Ia2856441b218ad291b09ef0dd8415793eff09d7b --- holi-camera-sensor-mtp.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/holi-camera-sensor-mtp.dtsi b/holi-camera-sensor-mtp.dtsi index 39c9f5cdbdc2..eb919029cb2d 100644 --- a/holi-camera-sensor-mtp.dtsi +++ b/holi-camera-sensor-mtp.dtsi @@ -212,7 +212,7 @@ qcom,cam-tpg0 { cell-index = <4>; compatible = "qcom,cam-sensor"; - csiphy-sd-index = <4>; + csiphy-sd-index = <0>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; @@ -235,7 +235,7 @@ qcom,cam-tpg1 { cell-index = <5>; compatible = "qcom,cam-sensor"; - csiphy-sd-index = <5>; + csiphy-sd-index = <1>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; @@ -258,7 +258,7 @@ qcom,cam-tpg2 { cell-index = <6>; compatible = "qcom,cam-sensor"; - csiphy-sd-index = <6>; + csiphy-sd-index = <2>; sensor-position-roll = <270>; sensor-position-pitch = <0>; sensor-position-yaw = <180>; From f955f9553530b4962898d6b405b08f63fc7724a2 Mon Sep 17 00:00:00 2001 From: Shravya Samala Date: Mon, 10 May 2021 17:38:16 +0530 Subject: [PATCH 188/190] ARM: dts: msm: Control stall disable Camera and display shares same SMMU context bank. Set stall disable from DTSI to prevent device crash from display. CRs-Fixed: 2936331 Change-Id: Id4bc9e4aefc9b6a0d7fd11885a196c04fdda50dc --- yupik-camera.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index beb11cfba3da..78f16afcd37d 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -393,6 +393,7 @@ qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; cam-smmu-label = "ife"; + stall-disable; multiple-client-devices; ife_iova_mem_map: iova-mem-map { /* IO region is approximately 4 GB */ @@ -412,6 +413,7 @@ <&apps_smmu 0x20E0 0x20>; cam-smmu-label = "jpeg"; qcom,iommu-faults = "non-fatal"; + stall-disable; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; jpeg_iova_mem_map: iova-mem-map { @@ -442,6 +444,7 @@ <&apps_smmu 0x2140 0x0>; cam-smmu-label = "icp"; qcom,iommu-faults = "non-fatal"; + stall-disable; qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>; dma-coherent-hint-cached; iova-region-discard = <0xdff00000 0x300000>; @@ -500,6 +503,7 @@ iommus = <&apps_smmu 0x2040 0x0>; cam-smmu-label = "cpas-cdm"; qcom,iommu-faults = "non-fatal"; + stall-disable; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; cpas_cdm_iova_mem_map: iova-mem-map { @@ -526,6 +530,7 @@ <&apps_smmu 0x2120 0x20>; cam-smmu-label = "lrme"; qcom,iommu-faults = "non-fatal"; + stall-disable; qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>; dma-coherent-hint-cached; lrme_iova_mem_map: iova-mem-map { From 923fd239daddc1b5590a47cbd23a426d5f11cfdb Mon Sep 17 00:00:00 2001 From: Ayush Kumar Date: Mon, 21 Jun 2021 17:50:48 +0530 Subject: [PATCH 189/190] ARM: dts: msm: Add cx-ipeak support from Blair Camera This change is to add cx-ipeak support from blair camera. CRs-Fixed: 2944976 Change-Id: I5628bcae9ac75d9b7a36d15a14ab5ee23ef8dec1 --- blair-camera.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/blair-camera.dtsi b/blair-camera.dtsi index f2537858db28..865690b33507 100644 --- a/blair-camera.dtsi +++ b/blair-camera.dtsi @@ -23,6 +23,7 @@ rgltr-min-voltage = <0 880000 1200000>; rgltr-max-voltage = <0 1050000 1300000>; rgltr-load-current = <0 16200 9000>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_CPHY_0_CLK>, <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>, @@ -58,6 +59,7 @@ rgltr-min-voltage = <0 880000 1200000>; rgltr-max-voltage = <0 1050000 1300000>; rgltr-load-current = <0 16200 9000>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_CPHY_1_CLK>, <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>, @@ -93,6 +95,7 @@ rgltr-min-voltage = <0 880000 1200000>; rgltr-max-voltage = <0 1050000 1300000>; rgltr-load-current = <0 16200 9000>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_CPHY_2_CLK>, <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK_SRC>, @@ -128,6 +131,7 @@ rgltr-min-voltage = <0 880000 1200000>; rgltr-max-voltage = <0 1050000 1300000>; rgltr-load-current = <0 16200 9000>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, <&gcc GCC_CAMSS_CPHY_3_CLK>, <&gcc GCC_CAMSS_CSI3PHYTIMER_CLK_SRC>, @@ -413,6 +417,7 @@ camnoc-axi-min-ib-bw = <3000000000>; regulator-names = "camss-vdd"; camss-vdd-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "gcc_camss_ahb_clk", "gcc_camss_top_ahb_clk", @@ -709,6 +714,7 @@ interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "tfe_csid_clk_src", "tfe_csid_clk", @@ -744,6 +750,7 @@ interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "tfe_clk_src", "tfe_clk"; @@ -773,6 +780,7 @@ interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "tfe_csid_clk_src", "tfe_csid_clk", @@ -808,6 +816,7 @@ interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "tfe_clk_src", "tfe_clk"; @@ -837,6 +846,7 @@ interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "tfe_csid_clk_src", "tfe_csid_clk", @@ -872,6 +882,7 @@ interrupts = ; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "tfe_clk_src", "tfe_clk"; @@ -1032,6 +1043,7 @@ interrupt-names = "ope"; regulator-names = "camss"; camss-supply = <&gcc_camss_top_gdsc>; + qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>; clock-names = "ope_ahb_clk_src", "ope_ahb_clk", From 38a0e9b40199c0e0306b24b72bf629a50964f7b1 Mon Sep 17 00:00:00 2001 From: Dharmender Sharma Date: Thu, 29 Jul 2021 00:03:52 +0530 Subject: [PATCH 190/190] ARM: dts: msm: jpeg misr enable Enable jpeg misr for both DMA and Encoder and also supports base address for camnoc. CRs-Fixed: 3012752 Change-Id: I3e8ef8907214adcf779d5a28a420c50b1a76ddb1 --- bindings/msm-cam-jpeg.txt | 6 ++++++ lahaina-camera.dtsi | 18 ++++++++++-------- yupik-camera.dtsi | 18 ++++++++++-------- 3 files changed, 26 insertions(+), 16 deletions(-) diff --git a/bindings/msm-cam-jpeg.txt b/bindings/msm-cam-jpeg.txt index edab1d95e34b..e4687dccf9bb 100644 --- a/bindings/msm-cam-jpeg.txt +++ b/bindings/msm-cam-jpeg.txt @@ -48,6 +48,7 @@ Required Node Structure ======================= Encoder/DMA Nodes provide interface for JPEG driver about the device register map, interrupt map, clocks and regulators. +Compatible string definition should be based on target. - cell-index Usage: required @@ -58,6 +59,11 @@ the device register map, interrupt map, clocks and regulators. Usage: required Value type: Definition: Should be "qcom,cam_jpeg_enc". + Definition: Should be "qcom,cam_jpeg_enc_165". + Definition: Should be "qcom,cam_jpeg_enc_580". + Definition: Should be "qcom,cam_jpeg_dma". + Definition: Should be "qcom,cam_jpeg_dma_165". + Definition: Should be "qcom,cam_jpeg_dma_580". - reg-names Usage: optional diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index d3c50b69a3fc..75c74b67d738 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1881,10 +1881,11 @@ cam_jpeg_enc: qcom,jpegenc { cell-index = <0>; - compatible = "qcom,cam_jpeg_enc"; - reg-names = "jpege_hw"; - reg = <0xac53000 0x4000>; - reg-cam-base = <0x53000>; + compatible = "qcom,cam_jpeg_enc_580"; + reg-names = "jpege_hw","cam_camnoc"; + reg = <0xac53000 0x4000>, + <0x0ac42000 0x8000>; + reg-cam-base = <0x53000 0x42000>; interrupt-names = "jpeg"; interrupts = ; regulator-names = "camss-vdd"; @@ -1907,10 +1908,11 @@ cam_jpeg_dma: qcom,jpegdma { cell-index = <0>; - compatible = "qcom,cam_jpeg_dma"; - reg-names = "jpegdma_hw"; - reg = <0xac57000 0x4000>; - reg-cam-base = <0x57000>; + compatible = "qcom,cam_jpeg_dma_580"; + reg-names = "jpegdma_hw", "cam_camnoc"; + reg = <0xac57000 0x4000>, + <0x0ac42000 0x8000>; + reg-cam-base = <0x57000 0x42000>; interrupt-names = "jpegdma"; interrupts = ; regulator-names = "camss-vdd"; diff --git a/yupik-camera.dtsi b/yupik-camera.dtsi index 6c1867d88fa6..45e79ce70c0d 100644 --- a/yupik-camera.dtsi +++ b/yupik-camera.dtsi @@ -1057,10 +1057,11 @@ cam_jpeg_enc: qcom,jpegenc { cell-index = <0>; - compatible = "qcom,cam_jpeg_enc"; - reg-names = "jpege_hw"; - reg = <0xac4e000 0x4000>; - reg-cam-base = <0x4e000>; + compatible = "qcom,cam_jpeg_enc_165"; + reg-names = "jpege_hw", "cam_camnoc"; + reg = <0xac4e000 0x4000>, + <0x0ac9f000 0x10000>; + reg-cam-base = <0x4e000 0x9f000>; interrupt-names = "jpeg"; interrupts = ; regulator-names = "camss-vdd"; @@ -1083,10 +1084,11 @@ cam_jpeg_dma: qcom,jpegdma { cell-index = <0>; - compatible = "qcom,cam_jpeg_dma"; - reg-names = "jpegdma_hw"; - reg = <0xac52000 0x4000>; - reg-cam-base = <0x52000>; + compatible = "qcom,cam_jpeg_dma_165"; + reg-names = "jpegdma_hw", "cam_camnoc"; + reg = <0xac52000 0x4000>, + <0x0ac9f000 0x10000>; + reg-cam-base = <0x52000 0x9f000>; interrupt-names = "jpegdma"; interrupts = ; regulator-names = "camss-vdd";