mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-11 15:11:48 -04:00
Merge "ARM: dts: msm: Add wlan device tree for SA8195 VM"
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qctecmdr
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1 changed files with 311 additions and 0 deletions
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@ -117,6 +117,300 @@
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};
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&soc {
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/* Rome 3.3V supply */
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vreg_wlan: vreg_wlan {
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compatible = "qcom,stub-regulator";
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regulator-name = "vreg_wlan";
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};
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/* PWR_CTR2_VDD_1P8 supply */
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vreg_conn_1p8: vreg_conn_1p8 {
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compatible = "regulator-fixed";
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regulator-name = "vreg_conn_1p8";
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pinctrl-names = "default";
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pinctrl-0 = <&conn_power_1p8_active>;
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startup-delay-us = <4000>;
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enable-active-high;
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gpio = <&tlmm 173 0>;
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};
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/* PWR_CTR1_VDD_PA supply */
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vreg_conn_pa: vreg_conn_pa {
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compatible = "regulator-fixed";
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regulator-name = "vreg_conn_pa";
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pinctrl-names = "default";
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pinctrl-0 = <&conn_power_pa_active>;
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startup-delay-us = <4000>;
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enable-active-high;
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gpio = <&tlmm 174 0>;
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};
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qcom,cnss-qca-converged {
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compatible = "qcom,cnss-qca-converged";
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qcom,converged-dt;
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qcom,wlan-rc-num = <0>;
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qcom,bus-type=<0>;
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qcom,notify-modem-status;
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#address-cells=<1>;
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#size-cells=<1>;
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ranges = <0xb0000000 0xb0000000 0x10000>;
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vdd-wlan-ctrl1-supply = <&vreg_conn_pa>;
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vdd-wlan-ctrl2-supply = <&vreg_conn_1p8>;
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vdd-wlan-supply = <&vreg_wlan>;
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vdd-wlan-aon-supply = <&pm8195_1_s5>;
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vdd-wlan-rfa1-supply = <&pm8195_1_s2>;
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vdd-wlan-rfa2-supply = <&pm8195_2_s5>;
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vdd-wlan-rfa3-supply = <&pm8195_2_l7>;
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wlan_vregs = "vdd-wlan-ctrl1", "vdd-wlan-ctrl2";
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qcom,vdd-wlan-ctrl1-config = <0 0 0 0>;
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qcom,vdd-wlan-ctrl2-config = <0 0 0 0>;
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wlan-en-gpio = <&tlmm 169 0>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&cnss_wlan_en_active>;
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pinctrl-1 = <&cnss_wlan_en_sleep>;
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chip_cfg@0 {
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reg = <0x10000000 0x10000000>,
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<0x20000000 0x10000>;
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reg-names = "smmu_iova_base", "smmu_iova_ipa";
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supported-ids = <0x003e>;
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wlan_vregs = "vdd-wlan";
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qcom,vdd-wlan-info = <0 0 0 10>;
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qcom,smmu-s1-enable;
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qcom,wlan-ramdump-dynamic = <0x200000>;
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};
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chip_cfg@1 {
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reg = <0xb0000000 0x10000>;
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reg-names = "smmu_iova_ipa";
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supported-ids = <0x1101>;
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wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
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"vdd-wlan-rfa2", "vdd-wlan-rfa3";
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qcom,vdd-wlan-aon-config = <1000000 1000000 0 0 1>;
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qcom,vdd-wlan-rfa1-config = <1370000 1370000 0 0 1>;
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qcom,vdd-wlan-rfa2-config = <2040000 2040000 0 0 1>;
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qcom,vdd-wlan-rfa3-config = <1900000 1900000 450000 0 1>;
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qcom,wlan-ramdump-dynamic = <0x400000>;
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mhi,max-channels = <30>;
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mhi,timeout = <10000>;
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mhi,buffer-len = <0x8000>;
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mhi,m2-no-db-access;
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mhi_channels {
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#address-cells = <1>;
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#size-cells = <0>;
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mhi_chan@0 {
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reg = <0>;
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label = "LOOPBACK";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <1>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@1 {
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reg = <1>;
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label = "LOOPBACK";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <2>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@4 {
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reg = <4>;
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label = "DIAG";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <1>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@5 {
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reg = <5>;
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label = "DIAG";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <2>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@20 {
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reg = <20>;
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label = "IPCR";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <1>;
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mhi,data-type = <1>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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mhi,auto-start;
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};
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mhi_chan@21 {
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reg = <21>;
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label = "IPCR";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <2>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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mhi,auto-queue;
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mhi,auto-start;
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};
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};
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mhi_events {
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mhi_event@0 {
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mhi,num-elements = <32>;
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mhi,intmod = <1>;
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mhi,msi = <1>;
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mhi,priority = <1>;
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mhi,brstmode = <2>;
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mhi,data-type = <1>;
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};
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mhi_event@1 {
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mhi,num-elements = <256>;
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mhi,intmod = <1>;
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mhi,msi = <2>;
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mhi,priority = <1>;
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mhi,brstmode = <2>;
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};
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};
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};
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chip_cfg@2 {
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reg = <0xa0000000 0x10000000>,
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<0xb0000000 0x10000>;
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reg-names = "smmu_iova_base", "smmu_iova_ipa";
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supported-ids = <0x1102>;
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wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
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"vdd-wlan-rfa2", "vdd-wlan-rfa3";
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qcom,vdd-wlan-aon-config = <1055000 1055000 0 0 1>;
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qcom,vdd-wlan-rfa1-config = <1370000 1370000 0 0 1>;
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qcom,vdd-wlan-rfa2-config = <2040000 2040000 0 0 1>;
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qcom,vdd-wlan-rfa3-config = <1900000 1900000 0 0 1>;
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qcom,wlan-ramdump-dynamic = <0x300000>;
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mhi,max-channels = <30>;
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mhi,timeout = <10000>;
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mhi,ee = <0x3>, <0x4>;
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mhi,ee-names = "SBL", "RDDM";
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mhi,bhie-offset = <0x0324>;
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mhi_channels {
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#address-cells = <1>;
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#size-cells = <0>;
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mhi_chan@0 {
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reg = <0>;
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label = "LOOPBACK";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <1>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@1 {
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reg = <1>;
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label = "LOOPBACK";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <2>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@4 {
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reg = <4>;
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label = "DIAG";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <1>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@5 {
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reg = <5>;
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label = "DIAG";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <2>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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};
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mhi_chan@16 {
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reg = <16>;
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label = "IPCR";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <1>;
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mhi,data-type = <1>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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mhi,auto-start;
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};
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mhi_chan@17 {
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reg = <17>;
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label = "IPCR";
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mhi,num-elements = <32>;
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mhi,event-ring = <1>;
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mhi,chan-dir = <2>;
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mhi,data-type = <0>;
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mhi,doorbell-mode = <2>;
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mhi,ee = <0x14>;
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mhi,auto-queue;
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mhi,auto-start;
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};
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};
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mhi_events {
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mhi_event@0 {
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mhi,num-elements = <32>;
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mhi,intmod = <1>;
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mhi,msi = <1>;
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mhi,priority = <1>;
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mhi,brstmode = <2>;
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mhi,data-type = <1>;
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};
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mhi_event@1 {
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mhi,num-elements = <256>;
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mhi,intmod = <1>;
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mhi,msi = <2>;
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mhi,priority = <1>;
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mhi,brstmode = <2>;
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};
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};
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};
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};
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apps_smmu: apps-smmu@0x15000000 {
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compatible = "qcom,qsmmu-v500";
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reg = <0x15000000 0x100000>,
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@ -555,6 +849,23 @@
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status = "ok"
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};
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&pcie_rc0 {
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cnss_pci: cnss_pci {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&cnss_pci_iommu_group>;
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#address-cells = <1>;
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#size-cells = <1>;
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cnss_pci_iommu_group: cnss_pci_iommu_group {
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-dma = "bypass";
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qcom,iommu-faults = "stall-disable", "no-CFRE",
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"non-fatal";
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};
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};
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};
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&qupv3_0 {
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/delete-property/ qcom,msm-bus,num-paths;
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/delete-property/ qcom,msm-bus,vectors-bus-ids;
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