From 8a8da4d34d7ae7fdcbaf8070513c69fe60cb216c Mon Sep 17 00:00:00 2001 From: Anirudh Ghayal Date: Thu, 23 Jul 2020 10:00:20 +0530 Subject: [PATCH] power: qpnp-qg: Battery-temp based ESR enable Add a logic to ignore ESR based on battery temperature. This is useful for very-low temperature based charging where ESR could be way off. The default threshold is set to 10degC and configurable via "qcom,esr-low-temp-threshold". Change-Id: Ic5b918434c63f71c412f782564e7a7aa818da6f1 Signed-off-by: Anirudh Ghayal --- drivers/power/supply/qcom/qg-core.h | 1 + drivers/power/supply/qcom/qpnp-qg.c | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/power/supply/qcom/qg-core.h b/drivers/power/supply/qcom/qg-core.h index 575b4a6ecca1..b0909d23c20c 100644 --- a/drivers/power/supply/qcom/qg-core.h +++ b/drivers/power/supply/qcom/qg-core.h @@ -64,6 +64,7 @@ struct qg_dt { int sys_min_volt_mv; int fvss_vbat_mv; int tcss_entry_soc; + int esr_low_temp_threshold; bool hold_soc_while_full; bool linearize_soc; bool cl_disable; diff --git a/drivers/power/supply/qcom/qpnp-qg.c b/drivers/power/supply/qcom/qpnp-qg.c index f6ce32977ad0..3b01b4e5b35a 100644 --- a/drivers/power/supply/qcom/qpnp-qg.c +++ b/drivers/power/supply/qcom/qpnp-qg.c @@ -1036,7 +1036,7 @@ static int qg_process_esr_data(struct qpnp_qg *chip) static int qg_esr_estimate(struct qpnp_qg *chip) { - int rc, i, ibat = 0; + int rc, i, ibat = 0, temp = 0; u8 esr_done_count, reg0 = 0, reg1 = 0; bool is_charging = false; @@ -1062,6 +1062,17 @@ static int qg_esr_estimate(struct qpnp_qg *chip) !chip->dt.esr_discharge_enable) return 0; + /* Ignore ESR if battery-temp is below a threshold */ + rc = qg_get_battery_temp(chip, &temp); + if (rc < 0) + return rc; + if (temp < chip->dt.esr_low_temp_threshold) { + qg_dbg(chip, QG_DEBUG_ESR, + "Battery temperature(%d) below threshold(%d) for ESR\n", + temp, chip->dt.esr_low_temp_threshold); + return 0; + } + if (chip->batt_soc != INT_MIN && (chip->batt_soc < chip->dt.esr_disable_soc)) { qg_dbg(chip, QG_DEBUG_ESR, @@ -4171,6 +4182,7 @@ static int qg_parse_cl_dt(struct qpnp_qg *chip) #define DEFAULT_SYS_MIN_VOLT_MV 2800 #define DEFAULT_FVSS_VBAT_MV 3500 #define DEFAULT_TCSS_ENTRY_SOC 90 +#define DEFAULT_ESR_LOW_TEMP_THRESHOLD 100 /* 10 deg */ static int qg_parse_dt(struct qpnp_qg *chip) { int rc = 0; @@ -4358,6 +4370,13 @@ static int qg_parse_dt(struct qpnp_qg *chip) else chip->dt.esr_min_ibat_ua = (int)temp; + rc = of_property_read_u32(node, "qcom,esr-low-temp-threshold", &temp); + if (rc < 0) + chip->dt.esr_low_temp_threshold = + DEFAULT_ESR_LOW_TEMP_THRESHOLD; + else + chip->dt.esr_low_temp_threshold = (int)temp; + rc = of_property_read_u32(node, "qcom,shutdown_soc_threshold", &temp); if (rc < 0) chip->dt.shutdown_soc_threshold = -EINVAL;