From 66d043d43ab5a93d11a8a7016a0b93f723ad321d Mon Sep 17 00:00:00 2001 From: Alok Chauhan Date: Tue, 22 Dec 2020 16:52:47 +0530 Subject: [PATCH] msm: camera: cdm: corrected submit bl logic CDM driver check for available bl fifo slots before submitting to HW. If no free slots available then it wait for CDM HW to process all the BLs and return available slots. CDM driver was incorrectly calculating the available bl slots and causing bl fifo overflow. Corrected the sequence in wait for bl fifo logic. CRs-Fixed: 2837583 Change-Id: I2861f8c66822e0739f0546eaf153d8e2af0caefe Signed-off-by: Alok Chauhan --- drivers/cam_cdm/cam_cdm_hw_core.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/cam_cdm/cam_cdm_hw_core.c b/drivers/cam_cdm/cam_cdm_hw_core.c index eb39ecded292..eb9cab56c634 100644 --- a/drivers/cam_cdm/cam_cdm_hw_core.c +++ b/drivers/cam_cdm/cam_cdm_hw_core.c @@ -586,13 +586,9 @@ int cam_hw_cdm_wait_for_bl_fifo( pending_bl); break; } - if (bl_count < (available_bl_slots - 1)) { - CAM_DBG(CAM_CDM, - "BL slot available_cnt=%d requested=%d", - (available_bl_slots - 1), bl_count); - rc = available_bl_slots - 1; - break; - } else if (0 == (available_bl_slots - 1)) { + if (0 == (available_bl_slots - 1)) { + reinit_completion(&core->bl_fifo[fifo_idx].bl_complete); + rc = cam_hw_cdm_enable_bl_done_irq(cdm_hw, true, fifo_idx); if (rc) { @@ -619,7 +615,10 @@ int cam_hw_cdm_wait_for_bl_fifo( rc = 1; CAM_DBG(CAM_CDM, "CDM HW is ready for data"); } else { - rc = (bl_count - (available_bl_slots - 1)); + CAM_DBG(CAM_CDM, + "BL slot available_cnt=%d requested=%d", + (available_bl_slots - 1), bl_count); + rc = available_bl_slots - 1; break; } } while (1);